Gain control device of silicon photomultiplier

Abstract

The utility model provides a gain control device of a silicon photomultiplier, which comprises a temperature sensing module arranged on the surface of the silicon photomultiplier and used for sensing the temperature of the silicon photomultiplier and generating temperature information; one end of the voltage conversion circuit is connected with the first power supply, the other end is connected with the power supply input end of the silicon photomultiplier, and the voltage conversion circuit is used for performing voltage conversion on the first power supply and outputting conversion voltage to the silicon photomultiplier; the processing module is connected with the temperature sensing module and the voltage conversion circuit and used for obtaining the temperature information, generating a voltage control signal based on the temperature information and according to the temperature-voltage mapping relation, sending the voltage control signal to the voltage conversion circuit so as to supply power to the voltage conversion circuit, conducting voltage conversion on the first power source based on the voltage control signal and outputting the converted voltage. And outputting a conversion voltage corresponding to the voltage control signal. The gain control device of the silicon photomultiplier provided by the utility model improves the accuracy of gain control of the silicon photomultiplier.

Description

Technical Field

[0001] This utility model belongs to the field of photoelectric detection technology, and specifically relates to a gain control device for a silicon photomultiplier tube. Background Technology

[0002] Silicon photomultiplier tubes (SMTs) are a new type of photodetector that can convert weak light signals into electrical signals. They have advantages such as high gain amplification, fast response, low voltage, and low magnetic field sensitivity, and are widely used in medical imaging, high-energy physics, optical measurement, and lidar.

[0003] Because the breakdown voltage of silicon photomultiplier tubes (SPDs) is easily affected by temperature, an increase in temperature requires a higher electric field to achieve breakdown, leading to a decrease in the overvoltage. Since the overvoltage of a SPD is positively correlated with its gain, an increase in temperature reduces the gain, causing instability in the output signal and affecting the accuracy of measurement results. Current technologies typically use power management chips with temperature compensation to monitor the output voltage of the SPD and adjust it according to a preset compensation coefficient to compensate for the voltage and control its gain. However, power management chips with temperature compensation are expensive, and their voltage compensation mechanism is primarily based on circuit design and component characteristics, resulting in a fixed voltage compensation range and accuracy. The compensation voltage of a SPD is affected by many factors, including temperature changes, photoelectric conversion characteristics, and gain stability. Therefore, the compensation voltage output by the power management chip with temperature compensation function differs significantly from the actual compensation voltage required by the silicon photomultiplier tube, resulting in limited gain control accuracy for the silicon photomultiplier tube.

[0004] Therefore, how to provide a gain control device that can accurately control the gain of silicon photomultiplier tubes is an important problem that urgently needs to be solved. Utility Model Content

[0005] In view of the shortcomings of the prior art described above, the purpose of this utility model is to provide a gain control device for silicon photomultiplier tubes, so as to solve the problem that the existing gain control devices have limited gain control accuracy for silicon photomultiplier tubes.

[0006] To achieve the above and other related objectives, this utility model provides a gain control device for a silicon photomultiplier tube, comprising:

[0007] A temperature sensing module is disposed on the surface of the silicon photomultiplier tube to sense the temperature of the silicon photomultiplier tube and generate temperature information;

[0008] A voltage conversion circuit, with one end connected to a first power supply and the other end connected to the power input terminal of the silicon photomultiplier tube, is used to convert the voltage of the first power supply and output the converted voltage to the silicon photomultiplier tube.

[0009] The processing module is connected to the temperature sensing module and the voltage conversion circuit respectively. It is used to acquire the temperature information, generate a voltage control signal based on the temperature information and according to the temperature-voltage mapping relationship, and send the voltage control signal to the voltage conversion circuit so that the voltage conversion circuit can perform voltage conversion on the first power supply based on the voltage control signal and output the converted voltage corresponding to the voltage control signal.

[0010] In one embodiment of this utility model, the temperature sensing module is disposed on the mounting surface of the silicon photomultiplier tube.

[0011] In one embodiment of this utility model, the processing module includes: a storage unit; the storage unit stores a pre-constructed temperature-voltage mapping table; the temperature-voltage mapping table includes: the required supply voltage of the silicon photomultiplier tube at each temperature while keeping the gain constant.

[0012] In one embodiment of this utility model, the voltage conversion circuit includes at least: a power management chip, an energy storage circuit, a voltage output circuit, and a feedback circuit; wherein,

[0013] The power management chip is connected to the first power supply, the processing module, the input terminal of the energy storage circuit, the voltage output circuit, and the feedback signal output terminal of the feedback circuit. The output terminal of the energy storage circuit is connected to the input terminal of the voltage output circuit so that the voltage output circuit can output the converted voltage. The feedback signal input terminal of the feedback circuit is connected between the power management chip and the voltage output circuit to obtain the output voltage value of the output voltage on the voltage output circuit in real time and send the output voltage value to the power management chip. The ground terminal of the feedback circuit is grounded.

[0014] In one embodiment of the present invention, the voltage conversion circuit further includes a filter circuit; the filter circuit is connected between the first power supply and the power management chip.

[0015] In one embodiment of the present invention, the voltage conversion circuit further includes a startup circuit; one end of the startup circuit is connected to the power management chip, and the other end of the startup circuit is grounded.

[0016] In one embodiment of the present invention, the power management chip has a gate control pin; the energy storage circuit includes: a first inductor and a field-effect transistor; one end of the first inductor is connected between the first power supply and the power management chip, and the other end of the first inductor is connected to the drain of the field-effect transistor; the gate of the field-effect transistor is connected to the gate control pin of the power management chip, and the source of the field-effect transistor is grounded.

[0017] In one embodiment of this utility model, the power management chip has a first chip select signal pin and a second chip select signal pin; the voltage output circuit includes: a diode, a first resistor, a second inductor, a first capacitor, a second capacitor, and a third capacitor; wherein,

[0018] The positive terminal of the diode is connected between the first inductor and the field-effect transistor, the negative terminal of the diode is connected to one end of the first resistor, the other end of the first resistor is connected to one end of the second inductor, and the other end of the second inductor is connected to the silicon photomultiplier tube; one end of the first capacitor is connected between the diode and the first resistor, and the other end of the first capacitor is grounded; one end of the second capacitor is connected between the first resistor and the first inductor, and the other end of the second capacitor is grounded; one end of the third capacitor is connected to the current path between the first inductor and the silicon photomultiplier tube, and the other end of the third capacitor is grounded; the first chip select signal pin of the power management chip is connected between the first capacitor and the first resistor, and the second chip select signal pin of the power management chip is connected between the first resistor and the second capacitor.

[0019] In one embodiment of the present invention, the device further includes: an operational amplifier circuit; the operational amplifier circuit includes: a first amplification unit and a second amplification unit; the signal input terminal of the first amplification unit is connected to the signal output terminal of the silicon photomultiplier tube, the power input terminal of the first amplification unit is connected to a second power supply, the signal output terminal of the first amplification unit is connected to the signal input terminal of the second amplification unit, and the power input terminal of the second amplification unit is connected to a third power supply.

[0020] In one embodiment of the present invention, the device further includes: a waveform shaping circuit; the waveform shaping circuit includes: a reference voltage circuit and a waveform shaping unit; one end of the reference voltage circuit is connected to a fourth power supply, the other end of the reference voltage circuit is connected to the signal input terminal of the waveform shaping unit, and the signal output terminal of the waveform shaping unit is connected to the operational amplifier circuit so that the operational amplifier circuit outputs an inverted amplified voltage signal with a target waveform.

[0021] Compared with the prior art, the gain control device for a silicon photomultiplier tube provided by this utility model has at least the following advantages:

[0022] Beneficial effects:

[0023] By placing a temperature sensing module on the surface of a silicon photomultiplier tube (SMT) to sense the temperature of the SMT in real time and generate temperature information, and by setting a voltage conversion circuit with one end connected to a first power supply and the other end connected to the power input terminal of the SMT to convert the voltage of the first power supply and output the converted voltage to the SMT, and by setting a processing module connected to both the temperature sensing module and the voltage conversion circuit to acquire the temperature information in real time, generate a voltage control signal corresponding to the temperature information, and send the voltage control signal to the voltage conversion circuit, the voltage conversion circuit can convert the voltage of the first power supply based on the voltage control signal and output the converted voltage corresponding to the voltage control signal. The device can adjust the magnitude of the converted voltage according to the temperature information of the SMT in real time, so as to output a converted voltage to the SMT that is highly consistent with the actual power supply voltage required by the SMT, thereby reducing the measurement error caused by temperature changes in the SMT and improving the accuracy of gain control of the SMT. Attached Figure Description

[0024] Figure 1 The diagram shows the overall structure of a gain control device for a silicon photomultiplier tube provided by this utility model in the first embodiment.

[0025] Figure 2 The diagram shows a structural schematic of a voltage conversion circuit provided by the present invention in one embodiment.

[0026] Figure 3 The diagram shows a structural schematic of the voltage conversion circuit provided by the present invention in another embodiment.

[0027] Figure 4 The diagram shows a structural schematic of the voltage conversion circuit provided by the present invention in yet another embodiment.

[0028] Figure 5 The diagram shows a connection diagram of the power management module, power management chip and processing module provided by this utility model in one embodiment.

[0029] Figure 6 The diagram shows the overall structure of the gain control device for the silicon photomultiplier tube provided by this utility model in the second embodiment.

[0030] Figure 7The diagram shows a schematic representation of an operational amplifier circuit provided by this utility model in one embodiment.

[0031] Figure 8 The diagram shows the overall structure of the gain control device for the silicon photomultiplier tube provided by this utility model in the third embodiment.

[0032] Figure 9 The diagram shows a schematic representation of a waveform shaping circuit provided by this utility model in one embodiment.

[0033] Explanation of icon numbers

[0034] A. Silicon photomultiplier tube; 1. Temperature sensing module; 2. Voltage conversion circuit; 21. Power management chip; 22. Energy storage circuit; 23. Voltage output circuit; 24. Feedback circuit; 25. Filtering circuit; 26. Start-up circuit; 3. Processing module; 4. Operational amplifier circuit; 41. First amplification unit; 42. Second amplification unit; 5. Waveform shaping circuit; 51. Reference voltage circuit; 52. Waveform shaping unit; U. Voltage reference chip; RU. Variable resistor; TIA. Transimpedance amplifier; IA1. First inverting amplifier; IA2. Second inverting amplifier; VCC1. First power supply; VCC2. Second power supply; VCC3. Third power supply; VCC4. Fourth power supply; VCC5, Fifth power supply; GATE, Gate control pin; CS1, First chip select signal pin; CS2, Second chip select signal pin; CS3, First current sampling pin; CS4, Second current sampling pin; VIN1, First voltage input pin; VIN2, Second voltage input pin; COMP, Compensation pin; GND1, First ground pin; GND2, Second ground pin; DAC_OUT, Digital-to-Analog signal output pin; SDA1, First serial data pin; SDA2, Second serial data pin; SCL1, First serial clock pin; SCL2, Second serial clock pin; SCL3, Third serial clock pin; SCL... 4. Fourth serial clock pin; DIN, data input pin; VOUT, voltage output pin; TRI, voltage adjustment pin; L1, first inductor; L2, second inductor; Q, field-effect transistor; D, diode; R1, first resistor; R2, second resistor; R3, third resistor; R4, fourth resistor; R5, fifth resistor; R6, sixth resistor; R7, seventh resistor; R8, eighth resistor; R9, ninth resistor; R10, tenth resistor; R11, eleventh resistor; R12, twelfth resistor; R13, thirteenth resistor; R14, fourteenth resistor; R15, fifteenth resistor; R16, sixteenth resistor; R17, seventeenth resistor; R18. The eighteenth resistor; C1, the first capacitor; C2, the second capacitor; C3, the third capacitor; C4, the fourth capacitor; C5, the fifth capacitor; C6, the sixth capacitor; C7, the seventh capacitor; C8, the eighth capacitor; C9, the ninth capacitor; C10, the tenth capacitor; C11, the eleventh capacitor; C12, the twelfth capacitor; C13, the thirteenth capacitor; C14, the fourteenth capacitor; C15, the fifteenth capacitor; C16, the sixteenth capacitor; C17, the seventeenth capacitor; C18, the eighteenth capacitor; C19, the nineteenth capacitor; C20, the twentieth capacitor; C21, the twenty-first capacitor; C22, the twenty-second capacitor; C23, the twenty-third capacitor; C24, the twenty-fourth capacitor. Detailed Implementation

[0035] The following specific examples illustrate the implementation of this utility model. Those skilled in the art can easily understand other advantages and effects of this utility model from the content disclosed in this specification. This utility model can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this utility model.

[0036] It should be noted that the structures, proportions, sizes, etc., illustrated in the accompanying drawings are merely for illustrative purposes to aid those skilled in the art and are not intended to limit the scope of this invention. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in proportions, or adjustments to size, without affecting the effectiveness and purpose of this invention, should still fall within the scope of the disclosed technical content. Furthermore, the terms "upper," "lower," "left," "right," "middle," and "one" used in this specification are merely for clarity and not intended to limit the scope of this invention. Changes or adjustments to their relative relationships, without substantially altering the technical content, should also be considered within the scope of this invention.

[0037] To facilitate understanding of the technical solutions provided in this application, the relevant terms in this application are explained before the specific embodiments, as follows:

[0038] Gain: The value of the charge generated by the pixel of a silicon photomultiplier tube after detecting a photon divided by the charge of a single electron, characterizing the signal amplification capability of the silicon photomultiplier tube.

[0039] The embodiments of this application will now be described in detail with reference to the accompanying drawings. Unless otherwise specified, the features of the following embodiments and implementation methods can be combined with each other.

[0040] This application relates to a gain control device for a silicon photomultiplier tube (SMT). The device comprises: a temperature sensing module disposed on the surface of the SMT to sense its temperature in real time and generate temperature information; a voltage conversion circuit connected at one end to a first power supply and at the other end to the power input terminal of the SMT to convert the voltage of the first power supply and output a converted voltage to the SMT; and a processing module connected to both the temperature sensing module and the voltage conversion circuit to acquire the temperature information in real time, generate a voltage control signal corresponding to the temperature information, and send the voltage control signal to the voltage conversion circuit. The voltage conversion circuit then converts the voltage of the first power supply based on the voltage control signal and outputs a converted voltage corresponding to the voltage control signal. The device can adjust the magnitude of the converted voltage according to the real-time temperature information of the SMT to output a converted voltage highly consistent with the actual required power supply voltage to the SMT, thereby reducing measurement errors caused by temperature changes in the SMT and improving the accuracy of gain control of the SMT.

[0041] Please see Figure 1 The diagrams show the overall structure of the gain control device for a silicon photomultiplier tube provided by this utility model in the first embodiment.

[0042] like Figure 1 As shown, the gain control device for the silicon photomultiplier tube provided by this utility model includes:

[0043] Temperature sensing module 1 is disposed on the surface of silicon photomultiplier tube A and is used to sense the temperature of silicon photomultiplier tube and generate temperature information;

[0044] Voltage conversion circuit 2, one end is connected to the first power supply VCC1, and the other end is connected to the power input terminal of the silicon photomultiplier tube, used to convert the voltage of the first power supply VCC1 and output the converted voltage to the silicon photomultiplier tube;

[0045] The processing module 3 is connected to the temperature sensing module 1 and the voltage conversion circuit 2 respectively. It is used to acquire the temperature information, generate a voltage control signal based on the working temperature information and according to the temperature-voltage mapping relationship, and send the voltage control signal to the voltage conversion circuit 2 so that the voltage conversion circuit 2 can perform voltage conversion on the first power supply VCC1 based on the voltage control signal and output the converted voltage corresponding to the voltage control signal.

[0046] Specifically, the temperature sensing module 1 senses the temperature of the silicon photodiode, generates temperature information, and sends the temperature information to the processing module 3; based on the temperature information, the processing module 3 obtains the supply voltage corresponding to the temperature information according to the temperature-voltage mapping relationship, generates a voltage control signal corresponding to the supply voltage, and sends the voltage control signal to the voltage conversion circuit 2; based on the voltage control signal, the voltage conversion circuit 2 performs voltage conversion on the first power supply VCC1 and outputs the converted voltage corresponding to the voltage control signal.

[0047] Optionally, the temperature sensing module 1 is disposed on the mounting surface of the silicon photomultiplier tube to accurately obtain the temperature of the silicon photomultiplier tube; the mounting surface of the silicon photomultiplier tube is the side of the silicon photomultiplier tube that is encapsulated.

[0048] It should be noted that the window surface of the silicon photomultiplier tube is easily affected by the external ambient temperature, which can affect the readings of the temperature sensing module. Placing the temperature sensing module on the mounting surface of the silicon photomultiplier tube can yield more accurate temperature measurement results.

[0049] Optionally, the voltage of the first power supply VCC1 is 5V.

[0050] Optionally, the temperature sensing module 1 includes a temperature sensing device such as a temperature sensor.

[0051] Preferably, the temperature sensor includes a high-precision temperature sensor such as SHT31-DIS-B2.5KS or HDC2010YPAR, to reduce temperature errors in the temperature information, improve the accuracy of the voltage control signal generated by the processing module based on the temperature information, and thus improve the accuracy of gain control of the silicon photomultiplier tube; the high-precision temperature sensor is a digital output temperature sensor, which is convenient to lay out and avoids interference introduced by wiring, and its temperature measurement error is less than or equal to 0.2℃.

[0052] Optionally, the processing module 3 includes: a storage unit; the storage unit stores a pre-constructed temperature-voltage mapping table; the temperature-voltage mapping table includes: the required supply voltage of the silicon photomultiplier tube at each temperature while keeping the gain constant.

[0053] Optionally, the temperature-voltage mapping table can be obtained by pre-measuring the operating state of the silicon photomultiplier tube at different temperatures, or by simulation calculation using other existing compensation algorithms; this application does not limit this.

[0054] Optional, such as Figure 2As shown, the voltage conversion circuit 2 includes at least: a power management chip 21, an energy storage circuit 22, a voltage output circuit 23, and a feedback circuit 24; wherein,

[0055] The power management chip 21 is connected to the first power supply VCC1, the processing module 3, the input terminal of the energy storage circuit 22, the voltage output circuit 23, and the feedback signal output terminal of the feedback circuit 24, respectively. The output terminal of the energy storage circuit 22 is connected to the input terminal of the voltage output circuit 23. The feedback signal input terminal of the feedback circuit 24 is connected to the current path between the power management chip 21 and the voltage output circuit 23, and the ground terminal of the feedback circuit 24 is grounded.

[0056] Specifically, the power management chip 21 controls the energy storage circuit 22 to store energy according to the voltage control signal, so that the energy storage circuit 22 stores electrical energy corresponding to the voltage control signal; the feedback circuit 24 obtains the output voltage value of the output voltage on the voltage output circuit 23 in real time and sends the output voltage value to the power management chip 21, so that the power management chip 21 adjusts the electrical energy stored in the energy storage circuit 22 in real time based on the output voltage value, thereby changing the conversion voltage value of the conversion voltage output by the energy storage circuit 22 to the voltage output circuit, ensuring that the conversion voltage is consistent with the target supply voltage; and the power management chip 21 obtains the output current value of the output current on the voltage output circuit 23 in real time, so that the power management chip 21 monitors the output current in real time based on the output current value, and shuts down the switching element or reduces the duty cycle of the output current when the output current value exceeds the preset current value, thereby achieving overcurrent protection.

[0057] Optionally, the temperature sensing module 2 and the processing module 3 are connected via an I2C interface.

[0058] For example, such as Figure 2 As shown, the power management chip 21 has a gate control pin (GATE).

[0059] The energy storage circuit 22 includes: a first inductor L1 and a field-effect transistor Q; wherein...

[0060] One end of the first inductor L1 is connected to the current path between the first power supply VCC1 and the power management chip 21, and the other end of the first inductor L1 is connected to the drain of the field-effect transistor Q; the gate of the field-effect transistor Q is connected to the gate control pin GATE of the power management chip 21, and the source of the field-effect transistor Q is grounded.

[0061] Specifically, when the gate control pin GATE of the power management chip 21 outputs a high level, the field-effect transistor Q is turned on, and current flows to the first inductor L1, which begins to store electrical energy; when the gate control pin GATE of the power management chip 21 outputs a low level, the field-effect transistor Q is turned off, and the first inductor L1 stops storing electrical energy.

[0062] Optionally, the field-effect transistor Q is an N-channel type.

[0063] For example, such as Figure 2 As shown, the power management chip 21 also has a first chip select signal pin CS1 and a second chip select signal pin CS2;

[0064] The voltage output circuit 23 includes: a diode D, a first resistor R1, a second inductor L2, a first capacitor C1, a second capacitor C2, and a third capacitor C3; wherein,

[0065] The anode of diode D is connected to the current path between the first inductor L1 and the field-effect transistor Q. The cathode of diode D is connected to one end of the first resistor R1. The other end of the first resistor R1 is connected to one end of the second inductor L2. The other end of the second inductor L2 is connected to the silicon photomultiplier tube A. One end of the first capacitor C1 is connected to the current path between diode D and the first resistor R1. The other end of the first capacitor C1 is grounded. The first capacitor C1 is used to filter out high-frequency noise in the current flowing through diode D. One end of the second capacitor C2 is connected to the current path between the first resistor R1 and the first inductor L1. The other end of the second capacitor C2 is grounded. The second capacitor C2 is used to filter out high-frequency noise in the current flowing through the first resistor R1; one end of the third capacitor C3 is connected to the current path between the first inductor L1 and the silicon photomultiplier tube A, and the other end of the third capacitor C3 is grounded. The third capacitor C3 is used to filter out high-frequency noise in the current flowing through the first inductor L1; the first chip select signal pin CS1 of the power management chip 21 is connected to the current path between the first capacitor C1 and the first resistor R1, and the second chip select signal pin CS2 of the power management chip 21 is connected to the current path between the first resistor R1 and the second capacitor C2, so as to obtain the output current value of the voltage output circuit 23 in real time.

[0066] For example, such as Figure 2 As shown, the power management chip 21 also has a feedback pin FB and a digital-to-analog signal output pin DAC_OUT;

[0067] The feedback circuit 24 includes: a second resistor R2, a third resistor R3, and a fourth resistor R4; wherein...

[0068] One end of the second resistor R2 is connected to the current path between the first chip select signal pin CS1 and the first resistor R1, and the other end of the second resistor R2 is connected to one end of the third resistor R3, the other end of the third resistor R3 being grounded; the feedback pin FB of the power management chip 21 is connected to the current path between the second resistor R2 and the third resistor R3, so as to obtain the output voltage by obtaining the voltage on the second resistor R2; the digital-to-analog signal output pin DAC_OUT of the power management chip 21 is connected to one end of the fourth resistor R4, and the other end of the fourth resistor R4 is connected to the current path between the feedback pin FB of the power management chip 21 and the second resistor R2.

[0069] Optionally, the second resistor R2 and the third resistor R3 are both high-precision resistors with an accuracy range of less than 0.1%, achieving low voltage fluctuation and controlling the error of the power supply voltage to the silicon photomultiplier tube to within 1°C.

[0070] Optional, such as Figure 3 As shown, the power management chip 21 also has a first voltage input pin VIN1, which is connected to the first power supply VCC1;

[0071] The voltage conversion circuit 2 further includes a filter circuit 25, which is connected to the current path between the first power supply VCC1 and the first voltage input pin VIN1. The filter circuit is used to filter out high-frequency noise in the output current of the first power supply VCC1, so as to avoid high-frequency noise from interfering with the circuit components or signals of the circuit and affecting the normal operation of the circuit, and to provide a stable power supply for the circuit.

[0072] For example, such as Figure 3 As shown, the filter circuit 25 includes: a fourth capacitor C4 and a fifth capacitor C5; wherein,

[0073] One end of the fourth capacitor C4 is connected to the current path between the first power supply VCC1 and the first voltage input pin VIN1, and the other end of the fourth capacitor C4 is grounded; one end of the fifth capacitor C5 is connected to the current path between the first power supply VCC1 and the first voltage input pin VIN1, and the other end of the fifth capacitor C5 is grounded; wherein, the connection point of the fifth capacitor C5 on the current path between the first power supply VCC1 and the first voltage input pin VIN1 is closer to the first power supply VCC1 than the connection point of the energy storage circuit 22 on the current path between the first power supply VCC1 and the first voltage input pin VIN1.

[0074] Optional, such as Figure 4 As shown, the power management chip 21 also has a compensation pin COMP and a first ground pin GND1;

[0075] The voltage conversion circuit 2 further includes a startup circuit 26; one end of the startup circuit 26 is connected to the power management chip 21, and the other end of the startup circuit 26 is grounded, which is used to delay the power supply to the power management chip 21 when the first power supply VCC1 is powered on, so as to avoid generating excessive surge current at the moment of power-on and causing damage to the components in the circuit.

[0076] For example, such as Figure 4 As shown, the startup circuit 26 includes a fifth resistor R5 and a sixth capacitor C6; one end of the fifth resistor R5 is connected to the compensation pin COMP of the power management chip 21, the other end of the fifth resistor R5 is connected to one end of the sixth capacitor C6, and the other end of the sixth capacitor C6 is connected to the first ground pin GND1 of the power management chip 21 and then grounded.

[0077] Optionally, the processing module 3 includes a microprocessor such as an MCU.

[0078] For example, such as Figure 5 As shown, the temperature sensing module 1 has a first serial data pin SDA1 and a first serial clock pin SCL1;

[0079] The power management chip 21 also has a data input pin DIN, a second serial clock pin SCL2, and a first current sampling pin CS3.

[0080] The processing module 3 has a second serial data pin SDA2, a third serial clock pin SCL3, a fourth serial clock pin SCL4, a receive pin PA, and a second current sampling pin CS4; wherein...

[0081] The second serial data pin SDA2 of the processing module 3 is connected to the first serial data pin SDA1 of the temperature sensing module 1, and the third serial clock pin SCL3 of the processing module 3 is connected to the first serial clock pin SCL1 of the temperature sensing module 1; the receive pin PA of the processing module 3 is connected to the data input pin DIN of the power management chip 21, the fourth serial clock pin SCL4 of the processing module 3 is connected to the second serial clock pin SCL2 of the power management chip 21, and the second current sampling pin CS4 of the processing module 3 is connected to the first current sampling pin CS3 of the power management chip 21.

[0082] This embodiment provides a gain control device for a silicon photomultiplier tube (SMT). A temperature sensing module is placed on the surface of the SMT to sense its temperature in real time and generate temperature information. A voltage conversion circuit is connected at one end to a first power supply and at the other end to the power input terminal of the SMT to convert the voltage of the first power supply and output a converted voltage to the SMT. A processing module is connected to both the temperature sensing module and the voltage conversion circuit to acquire the temperature information in real time, generate a voltage control signal corresponding to the temperature information, and send the voltage control signal to the voltage conversion circuit. The voltage conversion circuit then converts the voltage of the first power supply based on the voltage control signal and outputs a converted voltage corresponding to the voltage control signal. The device can adjust the magnitude of the converted voltage according to the real-time temperature information of the SMT to output a converted voltage that closely matches the actual required power supply voltage to the SMT, reducing measurement errors caused by temperature changes and improving the accuracy of gain control of the SMT.

[0083] Please see Figure 6 The diagram shows the overall structure of the gain control device for the silicon photomultiplier tube provided by this utility model in the second embodiment.

[0084] like Figure 6 As shown, the gain control device for the silicon photomultiplier tube provided by this utility model further includes:

[0085] Operational amplifier circuit 4 is connected to the signal output terminal of the silicon photomultiplier tube A and is used to perform operational amplification on the current pulse signal output by the silicon photomultiplier tube A, and output the operationally amplified inverted voltage signal.

[0086] Optional, such as Figure 7 As shown, the operational amplifier circuit 4 includes: a first amplification unit 41 and a second amplification unit 42; the first amplification unit 41 is used to convert the current pulse signal into a voltage signal; the second amplification unit 42 is used to invert and amplify the voltage signal, and output the inverted amplified voltage signal; wherein,

[0087] The signal input terminal of the first amplification unit 41 is connected to the signal output terminal of the silicon photomultiplier tube A. The power input terminal of the first amplification unit 41 is connected to the second power supply VCC2. The signal output terminal of the first amplification unit 41 is connected to the signal input terminal of the second amplification unit 42. The power input terminal of the second amplification unit 42 is connected to the third power supply VCC3. The signal output terminal of the second amplification unit 42 is used to output the amplified inverted voltage signal.

[0088] Specifically, the first amplification unit 41 converts the current pulse signal into a voltage signal, and the second amplification unit 42 performs inverted amplification on the voltage signal to output the inverted amplified voltage signal; the inverted amplification includes: after amplifying the voltage signal, inverting the signal phase of the amplified voltage signal.

[0089] Optionally, the first amplification unit 41 and the second amplification unit 42 are connected by a resistor.

[0090] Optionally, the voltage of both the second power supply VCC2 and the third power supply VCC3 is 5V.

[0091] For example, such as Figure 7 As shown, the first amplification unit 41 includes: a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a seventh capacitor C7, an eighth capacitor C8, a ninth capacitor C9, a tenth capacitor C10, an eleventh capacitor C11, and a transimpedance amplifier TIA; wherein,

[0092] One end of the sixth resistor R6 is connected to the signal output terminal of the silicon photomultiplier tube A, and the other end of the sixth resistor R6 is connected to the signal output terminal of the transimpedance amplifier TIA; the seventh capacitor C7 is connected in parallel with the sixth resistor R6 for AC coupling, blocking the DC component from passing through, while allowing the AC signal to enter the transimpedance amplifier TIA; the inverting input pin of the transimpedance amplifier TIA is connected to the current path between the seventh capacitor C7 and the silicon photomultiplier tube A, the non-inverting input pin of the transimpedance amplifier TIA is connected to the seventh resistor R7 and then grounded, and the signal output terminal of the transimpedance amplifier TIA is connected to the second amplification unit 42; the positive power supply pin of the transimpedance amplifier TIA is connected to one end of the eighth resistor R8, and the other end of the eighth resistor R8 is connected to the positive terminal of the second power supply VCC2; the eighth One end of capacitor C8 is connected to the current path between the eighth resistor R8 and the transimpedance amplifier TIA, and the other end of the eighth capacitor C8 is grounded; one end of the ninth capacitor C9 is connected to the current path between the eighth capacitor C8 and the transimpedance amplifier TIA, and the other end of the ninth capacitor C9 is grounded; the negative power supply pin of the transimpedance amplifier TIA is connected to one end of the ninth resistor R9, and the other end of the ninth resistor R9 is connected to the negative terminal of the second power supply VCC2; one end of the tenth capacitor C10 is connected to the current path between the ninth resistor R9 and the transimpedance amplifier TIA, and the other end of the tenth capacitor C10 is grounded; one end of the eleventh capacitor C11 is connected to the current path between the tenth capacitor C10 and the transimpedance amplifier TIA, and the other end of the eleventh capacitor C11 is grounded.

[0093] For example, such as Figure 7 As shown, the second amplification unit 42 includes: a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a twelfth capacitor R12, a thirteenth capacitor R13, a fourteenth capacitor R14, a fifteenth capacitor R15, a sixteenth capacitor R16, and a first inverting amplifier IA1; wherein,

[0094] The inverting input pin of the first inverting amplifier IA1 is connected to the signal output terminal of the first amplification unit 41; one end of the tenth resistor R10 is connected to the current path between the first amplification unit 41 and the first inverting amplifier IA1, and the other end of the tenth resistor R10 is connected to the signal output terminal of the first inverting amplifier IA1; the twelfth capacitor R12 is connected in parallel with the tenth resistor R10 for AC coupling, blocking the DC component from passing through, while allowing the AC signal to enter the first inverting amplifier IA1; the non-inverting input pin of the first inverting amplifier IA1 is connected to the eleventh resistor R11 and then grounded, and the signal output terminal of the first inverting amplifier IA1 outputs the inverted amplified voltage signal; the positive power supply pin of the first inverting amplifier IA1 is connected to one end of the twelfth resistor R12, and the other end of the twelfth resistor R12 is connected to the positive terminal of the third power supply VCC3; one end of the thirteenth capacitor R13 is connected to the... The 12th resistor R12 is connected to the current path between the 13th capacitor R13 and the first inverting amplifier IA1, and the other end of the 14th capacitor R14 is grounded. One end of the 14th capacitor R14 is connected to the current path between the 13th capacitor R13 and the first inverting amplifier IA1, and the other end of the 14th capacitor R14 is grounded. The negative power supply pin of the first inverting amplifier IA1 is connected to one end of the 13th resistor R13, and the other end of the 13th resistor R13 is connected to the negative terminal of the third power supply VCC3. One end of the 15th capacitor R15 is connected to the current path between the 13th resistor R13 and the first inverting amplifier IA1, and the other end of the 15th capacitor R15 is grounded. One end of the 16th capacitor R16 is connected to the current path between the 15th capacitor R15 and the first inverting amplifier IA1, and the other end of the 16th capacitor R16 is grounded.

[0095] It should be noted that each pixel of the silicon photomultiplier tube outputs a current pulse of corresponding amplitude when it detects a photon. When multiple pixels receive incident photons, each pixel will output a current pulse of corresponding amplitude. The current pulses are superimposed and output from the signal output terminal of the silicon photomultiplier tube.

[0096] This embodiment provides a gain control device for a silicon photomultiplier tube. By setting an operational amplifier circuit connected to the signal output terminal of the silicon photomultiplier tube, the device performs operational amplification on the pulse current signal output by the silicon photomultiplier tube and outputs an operationally amplified inverted voltage signal. The device realizes compensation and filtering of the pulse current signal output by the silicon photomultiplier tube, reduces high-frequency noise and interference in the output signal of the silicon photomultiplier tube, and can accurately control the gain of the silicon photomultiplier tube.

[0097] Please see Figure 8 The diagram shows the overall structure of the gain control device for the silicon photomultiplier tube provided by this utility model in the third embodiment.

[0098] like Figure 8 As shown, the gain control device for the silicon photomultiplier tube provided by this utility model further includes:

[0099] Waveform shaping circuit 5 is connected to the non-inverting input pin of the first inverting amplifier IA1 and is used to shape the waveform of the inverting amplified voltage signal to zero the output signal bias caused by the leakage current of the operational amplifier circuit 4, so that the first inverting amplifier IA1 can output an inverting amplified voltage signal with a stable level and low ripple after zeroing.

[0100] Optional, such as Figure 9 As shown, the waveform shaping circuit 5 includes: a reference voltage circuit 51 and a waveform shaping unit 52; the reference voltage circuit 51 is used to provide a stable reference voltage signal; the waveform shaping unit 52 is used to invert and amplify the reference voltage signal, and based on the inverted and amplified reference voltage signal, to shape the waveform of the inverted and amplified voltage signal so that the operational amplifier circuit 4 can output an inverted and amplified voltage signal with a target waveform; wherein,

[0101] One end of the reference voltage circuit 51 is connected to the fourth power supply VCC4, and the other end of the reference voltage circuit 51 is connected to the signal input terminal of the waveform shaping unit 52. The power input terminal of the waveform shaping unit 52 is connected to the fifth power supply VCC5, and the signal output terminal of the waveform shaping unit 52 is connected to the non-inverting input pin of the first inverting amplifier IA1.

[0102] Optionally, the voltage of the fifth power supply VCC5 is 5V.

[0103] For example, such as Figure 9As shown, the reference voltage circuit 51 includes: a voltage reference chip U, a seventeenth capacitor C17, an eighteenth capacitor C18, and a nineteenth capacitor C19; the voltage reference chip 51 has a second voltage input pin VIN2, a second ground pin GND2, a voltage output pin VOUT, and a voltage adjustment pin TRI; wherein,

[0104] The second voltage input pin VIN2 of the voltage reference chip 51 is connected to the fourth power supply VCC4, and the second ground pin GND2 of the voltage reference chip 51 is grounded; one end of the seventeenth capacitor C17 is connected to the current path between the voltage reference chip 51 and the fourth power supply VCC4, and the other end of the seventeenth capacitor C17 is grounded; the voltage output pin VOUT of the voltage reference chip 51 is connected to the signal input terminal of the waveform shaping unit 52; one end of the eighteenth capacitor C18 is connected to the current path between the voltage reference chip 51 and the waveform shaping unit 52, the voltage adjustment pin TRI of the voltage reference chip 51 is connected to one end of the nineteenth capacitor C19, and the other end of the eighteenth capacitor C18 is connected to the other end of the nineteenth capacitor C19 and then grounded.

[0105] For example, such as Figure 9 As shown, the waveform shaping unit 52 includes: a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, a seventeenth resistor R17, an eighteenth resistor R18, a twentieth capacitor C20, a twenty-first capacitor C21, a twenty-second capacitor C22, a twenty-third capacitor C23, a twenty-fourth capacitor C24, a variable resistor RU, and a second inverting amplifier IA2; wherein,

[0106] One end of the fourteenth resistor R14 is connected to the signal output terminal of the reference voltage circuit 51, and the other end of the fourteenth resistor R14 is connected to the inverting input pin of the second inverting amplifier IA2; the first fixed terminal of the variable resistor RU is connected to the current path between the fourteenth resistor R14 and the reference voltage circuit 51, the second fixed terminal of the variable resistor RU is grounded, and the resistance adjustment terminal of the variable resistor RU is connected to the non-inverting input pin of the second inverting amplifier IA2; one end of the second twentieth capacitor C20 is connected to the current path between the variable resistor RU and the second inverting amplifier IA2, and the other end of the second twentieth capacitor C20 is connected to the resistance adjustment terminal of the variable resistor RU and then grounded;

[0107] The positive power supply pin of the second inverting amplifier IA2 is connected to one end of the fifteenth resistor R15, and the other end of the fifteenth resistor R15 is connected to the positive terminal of the fifth power supply VCC5; one end of the twenty-first capacitor C21 is connected in the current path between the fifteenth resistor R15 and the second inverting amplifier IA2, and the other end of the twenty-first capacitor C21 is grounded; the negative power supply pin of the second inverting amplifier IA2 is connected to one end of the sixteenth resistor R16, and the other end of the sixteenth resistor R16 is connected to the negative terminal of the fifth power supply VCC5.

[0108] One end of the 22nd capacitor C22 is connected to the current path between the 16th resistor R16 and the second inverting amplifier IA2, and the other end of the 22nd capacitor C22 is grounded; the signal output terminal of the second inverting amplifier IA2 is connected to one end of the 17th resistor R17, and the other end of the 17th resistor is grounded; the common connection terminal of the second inverting amplifier IA2 and the 17th resistor R17 is connected to the non-inverting input pin of the first inverting amplifier IA1, for waveform shaping of the inverted amplified voltage signal generated by the first inverting amplifier IA1; one end of the 23rd capacitor C23 is connected to the second inverting amplifier IA2 and the 17th resistor R16. The common connection terminal of resistor 17 is connected to the other end of the 23rd capacitor C23 and then grounded; one end of the 24th capacitor C24 is connected to the current path between the 14th resistor R14 and the second inverting amplifier IA2, and the other end of the 24th capacitor C24 is connected to the current path between the second inverting amplifier IA2 and the 17th resistor R17; one end of the 18th resistor R18 is connected to the current path between the 24th capacitor C24 and the second inverting amplifier IA2, and the other end of the 18th resistor R18 is connected to the current path between the second inverting amplifier IA2 and the 24th capacitor C24.

[0109] In this embodiment, by adjusting the resistance value of the variable resistor in the waveform shaping unit, the output signal bias caused by the leakage current of the operational amplifier circuit can be compensated, thereby achieving zeroing of the output signal of the operational amplifier circuit and further improving the accuracy of gain control of the silicon photomultiplier tube.

[0110] This embodiment provides a gain control device for a silicon photomultiplier tube. By setting a waveform shaping circuit connected to an operational amplifier circuit, the waveform shaping circuit performs signal zeroing and waveform shaping on the inverted amplified voltage signal after operational amplification by the operational amplifier circuit. This compensates for the output signal bias caused by leakage current of the operational amplifier circuit and filters out high-frequency noise in the inverted amplified voltage signal, allowing the operational amplifier circuit to output an inverted amplified voltage signal with the target waveform. This further improves the control accuracy of the output gain of the silicon photomultiplier tube.

[0111] In summary, the gain control device for a silicon photomultiplier tube provided by this utility model involves: placing a temperature sensing module on the surface of the silicon photomultiplier tube to sense its temperature in real time and generate temperature information; connecting one end of a voltage conversion circuit to a first power supply and the other end to the power input terminal of the photomultiplier tube to convert the voltage of the first power supply and output a converted voltage to the silicon photomultiplier tube; and connecting a processing module to both the temperature sensing module and the voltage conversion circuit to acquire the temperature information in real time, generate a voltage control signal corresponding to the temperature information, and send the voltage control signal to the voltage conversion circuit. The voltage conversion circuit then converts the voltage of the first power supply based on the voltage control signal and outputs a converted voltage corresponding to the voltage control signal. The device can adjust the magnitude of the converted voltage according to the real-time acquired temperature information of the silicon photomultiplier tube to output a converted voltage to the silicon photomultiplier tube that is highly consistent with its actual required supply voltage. The device reduces measurement errors caused by temperature changes in the silicon photomultiplier tube (SPD), improving the accuracy of gain control. Furthermore, by connecting an operational amplifier circuit to the SPD's signal output terminal, the device amplifies the pulse current signal output by the SPD, outputting an operationally amplified inverted voltage signal. This achieves compensation and filtering of the pulse current signal output by the SPD, reducing high-frequency noise and interference in the SPD's output signal and enabling precise gain control. Additionally, by connecting a waveform shaping circuit to the operational amplifier circuit, the device performs signal zeroing and waveform shaping on the operationally amplified inverted voltage signal to compensate for output signal bias caused by leakage current in the operational amplifier circuit and filter out high-frequency noise in the inverted voltage signal, providing the operational amplifier circuit with an inverted voltage signal having the target waveform, further improving the accuracy of gain control over the SPD. Therefore, this utility model effectively overcomes the various shortcomings of the prior art and has high industrial application value.

[0112] The above embodiments are merely illustrative of the principles and effects of this application and are not intended to limit this application. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of this application. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this application should still be covered by the claims of this application.

Claims

1. A gain control device for a silicon photomultiplier tube, characterized in that, include: A temperature sensing module is disposed on the surface of the silicon photomultiplier tube to sense the temperature of the silicon photomultiplier tube and generate temperature information; A voltage conversion circuit, with one end connected to a first power supply and the other end connected to the power input terminal of the silicon photomultiplier tube, is used to convert the voltage of the first power supply and output the converted voltage to the silicon photomultiplier tube. The processing module is connected to the temperature sensing module and the voltage conversion circuit respectively. It is used to acquire the temperature information, generate a voltage control signal based on the temperature information and according to the temperature-voltage mapping relationship, and send the voltage control signal to the voltage conversion circuit so that the voltage conversion circuit can perform voltage conversion on the first power supply based on the voltage control signal and output the converted voltage corresponding to the voltage control signal.

2. The apparatus according to claim 1, characterized in that, The temperature sensing module is disposed on the mounting surface of the silicon photomultiplier tube.

3. The apparatus according to claim 1, characterized in that, The processing module includes: a storage unit; the storage unit stores a pre-constructed temperature-voltage mapping table; the temperature-voltage mapping table includes: the required supply voltage of the silicon photomultiplier tube at each temperature while keeping the gain constant.

4. The apparatus according to claim 1, characterized in that, The voltage conversion circuit includes at least: a power management chip, an energy storage circuit, a voltage output circuit, and a feedback circuit; wherein, The power management chip is connected to the first power supply, the processing module, the input terminal of the energy storage circuit, the voltage output circuit, and the feedback signal output terminal of the feedback circuit. The output terminal of the energy storage circuit is connected to the input terminal of the voltage output circuit so that the voltage output circuit can output the converted voltage. The feedback signal input terminal of the feedback circuit is connected between the power management chip and the voltage output circuit to obtain the output voltage value of the output voltage on the voltage output circuit in real time and send the output voltage value to the power management chip. The ground terminal of the feedback circuit is grounded.

5. The apparatus according to claim 4, characterized in that, The voltage conversion circuit further includes a filter circuit; the filter circuit is connected between the first power supply and the power management chip.

6. The apparatus according to claim 4, characterized in that, The voltage conversion circuit further includes a startup circuit; one end of the startup circuit is connected to the power management chip, and the other end of the startup circuit is grounded.

7. The apparatus according to claim 4, characterized in that, The power management chip has a gate control pin; the energy storage circuit includes a first inductor and a field-effect transistor; one end of the first inductor is connected between the first power supply and the power management chip, and the other end of the first inductor is connected to the drain of the field-effect transistor; the gate of the field-effect transistor is connected to the gate control pin of the power management chip, and the source of the field-effect transistor is grounded.

8. The apparatus according to claim 7, characterized in that, The power management chip has a first chip select signal pin and a second chip select signal pin; the voltage output circuit includes: a diode, a first resistor, a second inductor, a first capacitor, a second capacitor, and a third capacitor; wherein, The positive terminal of the diode is connected between the first inductor and the field-effect transistor, the negative terminal of the diode is connected to one end of the first resistor, the other end of the first resistor is connected to one end of the second inductor, and the other end of the second inductor is connected to the silicon photomultiplier tube; one end of the first capacitor is connected between the diode and the first resistor, and the other end of the first capacitor is grounded; one end of the second capacitor is connected between the first resistor and the first inductor, and the other end of the second capacitor is grounded; one end of the third capacitor is connected to the current path between the first inductor and the silicon photomultiplier tube, and the other end of the third capacitor is grounded; the first chip select signal pin of the power management chip is connected between the first capacitor and the first resistor, and the second chip select signal pin of the power management chip is connected between the first resistor and the second capacitor.

9. The apparatus according to claim 1, characterized in that, The device further includes an operational amplifier circuit; the operational amplifier circuit includes a first amplification unit and a second amplification unit; the signal input terminal of the first amplification unit is connected to the signal output terminal of the silicon photomultiplier tube, the power input terminal of the first amplification unit is connected to a second power supply, the signal output terminal of the first amplification unit is connected to the signal input terminal of the second amplification unit, and the power input terminal of the second amplification unit is connected to a third power supply.

10. The apparatus according to claim 9, characterized in that, The device further includes a waveform shaping circuit; the waveform shaping circuit includes a reference voltage circuit and a waveform shaping unit; one end of the reference voltage circuit is connected to a fourth power supply, the other end of the reference voltage circuit is connected to the signal input terminal of the waveform shaping unit, and the signal output terminal of the waveform shaping unit is connected to the operational amplifier circuit so that the operational amplifier circuit outputs an inverted amplified voltage signal with the target waveform.

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