Power supply simplex communication circuit between master machine and slave machine

Abstract

The embodiment of the utility model discloses a power supply simplex communication circuit between a master machine and a slave machine, which comprises a master machine circuit and a slave machine circuit, the master machine circuit is electrically connected with the slave machine circuit through two power lines, the master machine circuit further comprises an MOS (Metal Oxide Semiconductor) tube M1, an MOS tube M2, an MOS tube M3 and an MOS tube M4, and the slave machine circuit further comprises a power supply circuit and a simplex communication circuit which are electrically connected with a slave machine MCU (Microprogrammed Control Unit), d poles of the MOS tube M1 and the MOS tube M4 and S poles of the MOS tube M2 and the MOS tube M3 are respectively connected with a positive pole and a negative pole of a power supply end, G poles of the MOS tube M1 and the MOS tube M3 and G poles of the MOS tube M2 and the MOS tube M4 are respectively connected with two GPIO (General Purpose Input / Output) pins of a host MCU (Microprogrammed Control Unit), and the S pole of the MOS tube M1 and the D pole of the MOS tube M2 are electrically connected with a power line. According to the utility model, the power consumption of the product is reduced, the space limitation of the structure on the wire harness is reduced, and the wire cost is reduced.

Description

Technical Field

[0001] This utility model relates to the field of communications, and in particular to a power simplex communication circuit between a master and slave device. Background Technology

[0002] Existing serial simplex communication between the main board and the slave board (i.e., master and slave) requires at least three wires (positive power, negative power, and signal line) to enable power control and communication between the main board and the slave board. Existing technology suffers from high cost and large space requirements due to the wiring harness. Utility Model Content

[0003] The technical problem to be solved by this utility model embodiment is to provide a power simplex communication circuit between master and slave devices to reduce costs and reduce the space occupied by the wiring harness.

[0004] To address the aforementioned technical problems, this utility model proposes a power supply simplex communication circuit between a master and slave device, comprising a master circuit and a slave circuit. The master circuit includes a master MCU, and the slave circuit includes a slave MCU. The master circuit and the slave circuit are electrically connected via two power lines. The master circuit also includes MOSFETs M1, M2, M3, and M4. The slave circuit further includes a power supply circuit and a simplex communication circuit electrically connected to the slave MCU.

[0005] The drains (D) of MOSFETs M1 and M4, and the sources (S) of MOSFETs M2 and M3 are connected to the positive and negative terminals of the power supply, respectively. The gates (G) of MOSFETs M1 and M3, and the gates of MOSFETs M2 and M4 are connected to two GPIO pins of the host MCU, respectively. The source (S) of MOSFET M1 and the drain (D) of MOSFET M2 are electrically connected to one power line, and the source (S) of MOSFET M4 and the drain (D) of MOSFET M3 are electrically connected to another power line. Both the power supply circuit and the simplex communication circuit are electrically connected to the two power lines.

[0006] Furthermore, the power supply circuit includes a full-bridge rectifier D1, capacitor C1, an LDO voltage regulator, and capacitor C2. The positive power supply pin of the slave MCU is connected to the positive output terminal of the full-bridge rectifier D1 through the LDO voltage regulator, and the negative power supply pin of the slave MCU is connected to the negative output terminal of the full-bridge rectifier D1. The positive and negative input terminals of the full-bridge rectifier D1 are connected to two power lines respectively. The two ends of capacitor C1 are connected to the positive and negative output terminals of the full-bridge rectifier D1 respectively, and the two ends of capacitor C2 are connected to the positive and negative power supply pins of the slave MCU respectively.

[0007] Furthermore, the simplex communication circuit includes resistors R2, R3, R4, and R5. One GPIO pin of the slave MCU is connected to one of the power lines and ground through resistors R2 and R4, respectively. The other GPIO pin of the slave MCU is connected to the other power line and ground through resistors R3 and R5, respectively.

[0008] The beneficial effects of this utility model are: it reduces the power consumption of the product, reduces the spatial constraints of the structure on the wire harness, and reduces the cost of the wire. Attached Figure Description

[0009] Figure 1 This is a circuit diagram of the power supply simplex communication circuit between the master and slave devices according to an embodiment of this utility model. Detailed Implementation

[0010] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of this application can be combined with each other. The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0011] In this embodiment of the invention, directional indicators (such as up, down, left, right, front, back, etc.) are only used to explain the relative positional relationship and movement of the components in a specific posture (as shown in the attached figure). If the specific posture changes, the directional indicators will also change accordingly.

[0012] Furthermore, in this utility model, descriptions involving "first," "second," etc., are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of those features.

[0013] Please refer to Figure 1 The power supply simplex communication circuit between the master and slave devices in this embodiment of the invention includes a master circuit and a slave circuit. The master circuit is integrated on the master board, and the slave circuit is integrated on the slave board.

[0014] The master circuit includes a master MCU, and the slave circuit includes a slave MCU. The master circuit and slave circuit are connected by two power lines (i.e., Figure 1 The POWER_A and POWER_B in the circuit are electrically connected. The master circuit also includes MOSFETs M1, M2, M3, and M4. The slave circuit also includes a power supply circuit and a simplex communication circuit that are electrically connected to the slave MCU.

[0015] The drains (D) of MOSFETs M1 and M4, and the sources (S) of MOSFETs M2 and M3 are connected to the positive and negative terminals of the power supply, respectively. The gates (G) of MOSFETs M1 and M3, and the gates of MOSFETs M2 and M4 are connected to two GPIO pins of the host MCU, respectively. The source (S) of MOSFET M1 and the drain (D) of MOSFET M2 are electrically connected to one power line, and the source (S) of MOSFET M4 and the drain (D) of MOSFET M3 are electrically connected to another power line. Both the power supply circuit and the simplex communication circuit are electrically connected to the two power lines.

[0016] In one implementation, the power supply circuit includes a full-bridge rectifier D1, capacitor C1, an LDO voltage regulator, and capacitor C2. The positive power supply pin of the slave MCU is connected to the positive output terminal of the full-bridge rectifier D1 through the LDO voltage regulator, and the negative power supply pin of the slave MCU is connected to the negative output terminal of the full-bridge rectifier D1. The positive and negative input terminals of the full-bridge rectifier D1 are connected to two power lines respectively. The two ends of capacitor C1 are connected to the positive and negative output terminals of the full-bridge rectifier D1 respectively, and the two ends of capacitor C2 are connected to the positive and negative power supply pins of the slave MCU respectively.

[0017] In one implementation, the simplex communication circuit includes resistors R2, R3, R4, and R5. One GPIO pin of the slave MCU is connected to one of the power lines and ground through resistors R2 and R4, respectively. The other GPIO pin of the slave MCU is connected to the other power line and ground through resistors R3 and R5, respectively.

[0018] The control power supply principle of this utility model is as follows:

[0019] When the host MCU (MCU1) of the host circuit outputs a low level through MCU1_GPIO_1 and MCU1_GPIO_2, the MOSFETs M1, M2, M3, and M4 are not turned on, resulting in no output on the POWER_A and POWER_B lines. Consequently, the power supply system of the slave circuit is completely de-energized, thus reducing the power consumption of the product.

[0020] When the host MCU (MCU1) of the host circuit outputs a high level through MCU1_GPIO_1 and a low level through MCU1_GPIO_2, MOSFETs M1 and M3 are turned on, POWER_A outputs VCC_1 voltage, and POWER_B outputs a low level. The slave circuit receives POWER_A and POWER_B, and after rectification and filtering by a full-bridge rectifier D1, capacitor C1, LDO voltage regulator, and capacitor C2, outputs a stable voltage to power the slave board and slave MCU.

[0021] When the host MCU (MCU1) of the host circuit outputs a low level through MCU1_GPIO_1 and a high level through MCU1_GPIO_2, MOSFETs M2 and M4 are turned on, POWER_A outputs a low level, and POWER_B outputs VCC_1 voltage. The slave circuit receives POWER_A and POWER_B, and after rectification and filtering by a full-bridge rectifier D1, capacitor C1, LDO voltage regulator, and capacitor C2, outputs a stable voltage to power the slave board, slave MCU, etc.

[0022] The communication principle of this utility model is as follows:

[0023] POWER_A and POWER_B are divided by resistors R2, R3, R4, and R5 to bring the voltages of MCU2_GPIO_1 and MCU2_GPIO_2 up to the level that the MCU2 slave device on the slave board can recognize. The MCU2 slave device identifies logic 0 and logic 1 by judging the differential signals of MCU2_GPIO_1 and MCU2_GPIO_2, thereby enabling serial simplex communication.

[0024] Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the present invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A power simplex communication circuit between a master and a slave device, comprising a master circuit and a slave circuit, wherein the master circuit includes a master MCU and the slave circuit includes a slave MCU, characterized in that, The master circuit and slave circuit are electrically connected via two power lines. The master circuit also includes MOSFETs M1, M2, M3, and M4. The slave circuit includes a power supply circuit and a simplex communication circuit electrically connected to the slave MCU. The drains (D) of MOSFETs M1 and M4, and the sources (S) of MOSFETs M2 and M3 are connected to the positive and negative terminals of the power supply, respectively. The gates (G) of MOSFETs M1 and M3, and the gates of MOSFETs M2 and M4 are connected to two GPIO pins of the host MCU, respectively. The source (S) of MOSFET M1 and the drain (D) of MOSFET M2 are electrically connected to one power line, and the source (S) of MOSFET M4 and the drain (D) of MOSFET M3 are electrically connected to another power line. Both the power supply circuit and the simplex communication circuit are electrically connected to the two power lines.

2. The power supply simplex communication circuit between master and slave devices as described in claim 1, characterized in that, The power supply circuit includes a full-bridge rectifier D1, capacitor C1, an LDO voltage regulator, and capacitor C2. The positive power supply pin of the slave MCU is connected to the positive output terminal of the full-bridge rectifier D1 through the LDO voltage regulator. The negative power supply pin of the slave MCU is connected to the negative output terminal of the full-bridge rectifier D1. The positive and negative input terminals of the full-bridge rectifier D1 are connected to two power lines respectively. The two ends of capacitor C1 are connected to the positive and negative output terminals of the full-bridge rectifier D1 respectively. The two ends of capacitor C2 are connected to the positive and negative power supply pins of the slave MCU respectively.

3. The power supply simplex communication circuit between master and slave devices as described in claim 1, characterized in that, The simplex communication circuit includes resistors R2, R3, R4, and R5. One GPIO pin of the slave MCU is connected to one of the power lines and ground through resistors R2 and R4, respectively. The other GPIO pin of the slave MCU is connected to the other power line and ground through resistors R3 and R5, respectively.

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