Surface-mounted packaging voltage protector with high surge resistance and low clamping voltage

Abstract

The utility model discloses a surface-mounted packaging voltage protector with high surge resistance and low clamping voltage, which comprises a first pin support, a second pin support, a copper jumper wire, a first chip and a second chip, and is characterized in that the first chip is stacked above the second chip through a soldering layer; the first pin support is provided with a first boss, the first boss is provided with a first channel, and the first boss is connected to the first chip through a tin soldering layer. One end of the copper jumper wire is provided with a second boss, the other end of the copper jumper wire is provided with a third boss, the second boss is provided with a second channel, the second boss is connected to the second chip through a tin soldering layer, and the third boss is connected to the second pin support through a tin soldering layer. According to the TVS / ESD chip, the channels are arranged at the welding positions between the chip and the pins and between the chip and the copper jumpers, so that the welding strength can be enhanced, the welding flux is uniform, the contact is good, the TVS / ESD chip is not easy to break, the anti-surge capability and the through-current capability of the TVS / ESD chip are improved, and the clamping voltage is reduced.

Description

TECHNICAL FIELD

[0001] The utility model relates to a voltage protector, specifically is a surface mount type packaging voltage protector of high surge resistance ability low clamping voltage. BACKGROUND

[0002] TVS / ESD chip is used for protecting sensitive electronic components, such as transistor, integrated circuit etc., the connection between pin and chip is usually welding at present, however, welding surface is usually plane, uneven welding, poor contact phenomenon occurs, the current carrying capacity or surge resistance of TVS / ESD chip is reduced, and clamping voltage is unstable. CONTENT OF UTILITY MODEL

[0003] In order to solve the defects of the prior art, the utility model provides a surface mount type packaging voltage protector of high surge resistance ability low clamping voltage, the utility model discloses a channel is arranged between the welding of chip and pin, copper jumper wire, can enhance the welding strength, make the solder even, contact well, not easy to disconnect, improve the surge resistance, current carrying capacity of TVS / ESD chip, reduce the clamping voltage.

[0004] In order to realize the above technical purpose, the utility model adopts the following technical scheme: a surface mount type packaging voltage protector of high surge resistance ability low clamping voltage, including first pin support, second pin support, copper jumper wire, chip one and chip two, the chip one is stacked in the upper of the chip two through the tin solder layer;

[0005] The first pin support is provided with the first boss, the first boss is opened with the first channel, the first boss is connected to the chip one through the tin solder layer, and the free end of the first pin support is used as the first pin A;

[0006] One end of the copper jumper wire is provided with the second boss, and the other end is provided with the third boss, the second boss is opened with the second channel, the second boss is connected to the chip two through the tin solder layer, the third boss is connected to the second pin support through the tin solder layer, and the free end of the second pin support is used as the second pin B.

[0007] The first pin support includes a first connecting section and a first pin section, the first boss is arranged on the first connecting section, and the connecting part of the first connecting section and the first pin section is provided with a slot on both sides.

[0008] The copper jumper wire includes a second connecting section, a third connecting section and a second pin section, the second boss is arranged on the second connecting section, and the third boss is arranged on the second pin section;One end of the third connecting section is connected to the second connecting section, and the other end is connected to the second pin section.

[0009] The first pin support is further provided with a first heat-conducting layer.

[0010] A heat-conducting paste layer is arranged between the first pin support and the first heat-conducting layer.

[0011] The copper jumper wire is further provided with a second heat-conducting layer.

[0012] A heat-conducting paste layer is arranged between the copper jumper wire and the second heat-conducting layer.

[0013] Therefore, the anti-high-surge-capability low-clamp-voltage surface-mounted packaged voltage protector is provided.

[0014] The groove is arranged at the welding position between the chip and the pin and the copper jumper wire, so that the welding strength is enhanced, the solder is uniform, the contact is good, the disconnection is not easy, the surge resistance and the current flow capacity of the TVS / ESD chip are improved, and the clamping voltage is reduced.

[0015] The heat-conducting layer is arranged to quickly dissipate heat. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1 It is an anti-high-surge-capability low-clamp-voltage surface-mounted packaged voltage protector.

[0017] Figure 2 It is a first pin support schematic diagram.

[0018] Figure 3 It is a copper jumper wire schematic diagram.

[0019] Figure 4 It is Figure 1 It is a schematic diagram of the added heat dissipation layer. DETAILED DESCRIPTION

[0020] The utility model will be further and specifically explained in connection with the drawings.

[0021] The embodiment is only an explanation of the utility model, and is not a limitation of the utility model.

[0022] In the description of the utility model, it is necessary to understand that the orientation or positional relationship indicated by the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential" is the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, which is only for the convenience of describing the utility model and simplifying the description, and therefore cannot be understood as limiting the utility model.

[0023] In addition, the terms "first" and "second" are only for the purpose of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined with "first" and "second" can explicitly or implicitly include one or more of the features. In the description of the utility model, the meaning of "multiple" is two or more than two, unless otherwise specifically limited.

[0024] In the utility model, unless otherwise specifically defined and limited, the terms "mounting", "connection", "connection", "fixing" and the like should be understood in a broad sense, for example, it can be fixedly connected, or it can be detachably connected, or it can be integrated; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium; it can be the communication or interaction relationship between two elements. For ordinary skilled persons in the art, the specific meaning of the above terms in the utility model can be understood according to the specific circumstances.

[0025] In the utility model, unless otherwise specifically defined and limited, the first feature is "on" or "under" the second feature. The first and second features can be in direct contact, or the first and second features can be in indirect contact through an intermediate medium. Moreover, the first feature "above", "above" and "above" the second feature can be directly above or obliquely above the first feature, or only indicate that the horizontal height of the first feature is higher than that of the second feature. The first feature "below", "below" and "below" the second feature can be directly below or obliquely below the first feature, or only indicate that the horizontal height of the first feature is less than that of the second feature.

[0026] Embodiment:

[0027] Figure 1 It is a kind of anti-high surge ability low clamping voltage's surface mount package voltage protector, including first pin support 2, second pin support 4, copper jumper 3, chip one 5 and chip two 6, chip one 5 is stacked in the upper of chip two 6 by tin solder layer 7;

[0028] The first pin support 2 is provided with a first boss 21, the first boss 21 is provided with a first channel 24, the first boss 21 is connected to the chip one 5 through a tin solder layer 7, and the free end of the first pin support 2 serves as a first pin A;

[0029] One end of the copper jumper 3 is provided with a second boss 31, the other end is provided with a third boss 35, the second boss 31 is provided with a second channel 36, the second boss 31 is connected to the chip two 6 through a tin solder layer 7, and the third boss 35 is connected to the second pin support 4 through a tin solder layer 7; the free end of the second pin support 4 serves as a second pin B.

[0030] The utility model discloses a first boss 21, second boss 31, third boss 35 are arranged at the connecting place, can strengthen the close connection, and it is convenient to set up the tin solder layer. The first channel 24, second channel 36 are convenient for sending solder, make the solder even, and the welding effect is better, effectively reduces the stress, and the contact is good, thereby improving the anti-surge capacity, the through-flow capacity of TVS / ESD chip, reduces the clamping voltage. The first channel 24, second channel 36 adopt the sawtooth, wavy line structure, increase length, accommodate more solder, weld more evenly, better reduce stress.

[0031] Specifically, Figure 2 It is first pin support schematic drawing, the first pin support 2 includes first connecting section 22 and first pin section 23, the first boss 21 is located on the first connecting section 22, and the connecting place of the first connecting section 22 and the first pin section 23 is provided with the embedding slot 25 on both sides. The embedding slot 25 is convenient for the first pin section 23 to bend, and the flexibility is higher.

[0032] Figure 3 It is copper jumper schematic drawing, the copper jumper 3 includes second connecting section 32, third connecting section 33 and second pin section 34, the second boss 31 is located on the second connecting section 32, and the third boss 35 is located on the second pin section 34, one end of the third connecting section 33 is connected to the second connecting section 32, and the other end is connected to the second pin section 34. The third connecting section 33 and the second pin section 34 are vertically arranged, and connection is more convenient.

[0033] Figure 4 It is Figure 1 It is the schematic drawing of adding heat dissipation layer, the first pin support 2 is further provided with a first heat conduction layer 9. The copper jumper 3 is further provided with a second heat conduction layer 10. The utility model adds the heat conduction layer, and can quickly dissipate heat.

[0034] Among them, the first pin support 2 and the first heat conduction layer 9 are provided with a heat conduction paste layer 8. The copper jumper 3 and the second heat conduction layer 10 are provided with a heat conduction paste layer 8.

[0035] The first heat-conducting layer 9 and the second heat-conducting layer 10 adopt copper material, which is flush with the surface of the sealing glue layer 1 or protrudes from the sealing glue layer 1, and is beneficial to heat dissipation. The heat-conducting paste layer 8 is made of heat-conducting particles and glue, and improves the heat dissipation capacity.

[0036] The above is only a preferred embodiment of the present application, and is not intended to limit the present application in any form. Any simple modification, equivalent change and modification made according to the technical essence of the present application to the above embodiment are within the scope of the technical scheme of the present application.

Claims

1. A surface mount packaged voltage protector with low clamping voltage and high surge immunity, characterized by: It comprises a first pin support (2), a second pin support (4), a copper jumper (3), a chip one (5) and a chip two (6), the chip one (5) is stacked above the chip two (6) through a tin solder layer (7); The first pin support (2) is provided with a first boss (21), the first boss (21) is provided with a first channel (24), the first boss (21) is connected to the chip one (5) through the tin solder layer (7), and the free end of the first pin support (2) is used as a first pin A; One end of the copper jumper (3) is provided with a second boss (31), the other end is provided with a third boss (35), the second boss (31) is provided with a second channel (36), the second boss (31) is connected to the chip two (6) through the tin solder layer (7), the third boss (35) is connected to the second pin support (4) through the tin solder layer (7), and the free end of the second pin support (4) is used as a second pin B.

2. The surface mount packaged voltage protector with high surge resistance and low clamping voltage of claim 1, wherein: The first pin support (2) comprises a first connecting section (22) and a first pin section (23), the first boss (21) is arranged on the first connecting section (22), and the first connecting section (22) and the first pin section (23) are provided with a groove (25) on both sides at the connection position.

3. The surface-mount packaged voltage protector with high surge resistance and low clamping voltage according to claim 1, characterized in that: The copper jumper (3) comprises a second connecting section (32), a third connecting section (33) and a second pin section (34), the second boss (31) is arranged on the second connecting section (32), and the third boss (35) is arranged on the second pin section (34); one end of the third connecting section (33) is connected to the second connecting section (32), and the other end is connected to the second pin section (34).

4. The low clamping voltage surge resistant surface mount packaged voltage protector of claim 1, wherein: The first pin support (2) is further provided with a first heat conduction layer (9).

5. The low clamping voltage surge resistant surface mount packaged voltage protector of claim 4, wherein: The first pin support (2) and the first heat conduction layer (9) are provided with a heat conduction paste layer (8).

6. The low clamping voltage surge resistant surface mount packaged voltage protector of claim 1, wherein: The copper jumper (3) is further provided with a second heat conduction layer (10).

7. The low clamping voltage surge resistant surface mount packaged voltage protector of claim 6, wherein: The copper jumper (3) and the second heat conduction layer (10) are provided with a heat conduction paste layer (8).

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