Chip packaging structure and magnetic-core-free Hall type current sensor

Abstract

The utility model discloses a chip packaging structure and a magnetic-core-free Hall type current sensor, and relates to the technical field of Hall detection, and the chip packaging structure comprises a mainboard, a magnetic-core-free Hall chip and an output copper bar. The main board and the output copper bar are oppositely arranged at an interval in a first direction; the non-magnetic-core Hall chip comprises a chip body and chip pins electrically connected with the chip body and the mainboard, the chip body is located between the mainboard and the output copper bar, and the chip pins are located between the mainboard and the chip body, so that a distance reducing gap is formed between the chip body and the mainboard. The utility model aims to solve the problem that the magnetic-core-free Hall chip is too far away from the output copper bar, and improves the detection precision.

Description

TECHNICAL FIELD

[0001] The utility model relates to hall detection technical field, especially relate to a chip packaging structure and non -magnetic core hall type current sensor. BACKGROUND

[0002] Non -magnetic core hall detection is widely used in the automotive industry, such as wheel speed detection, electronic compass, position sensing, speed sensing etc. Non -magnetic core hall detection is a kind of method for detecting magnetic field using hall effect principle, it does not rely on the traditional magnetic core to concentrate or guide magnetic field, since it does not need magnetic core, therefore can reduce the volume of sensor assembly, suitable for space limited application. In this method, hall sensor directly detects the magnetic field generated by target object, or detects the magnetic field change caused by target object.

[0003] Parallel detection of non -magnetic core hall element refers to the parallel placement of non -magnetic core hall chip and the magnetic field source (such as copper bar) to be measured, and the non -magnetic core hall chip directly detects the magnetic field perpendicular to its plane and the current direction, thereby indirectly measuring the current passing through. The common parallel detection scheme structure at present: the mainboard and the output copper bar are parallel and interval arrangement (usually the minimum interval needs to be kept between the two), the non -magnetic core hall chip is attached to the adapter board and is close to the output copper bar downward by increasing the adapter board between the mainboard and the output copper bar, and the mainboard and the adapter board are connected by plug-in terminal or wire.

[0004] Although the above non -magnetic core hall parallel detection scheme aims to make the non -magnetic core hall chip as close to the copper bar as possible by increasing the adapter board to reduce the attenuation and interference that the magnetic field generated by the copper bar may encounter in the propagation process, thereby improving the sensitivity and accuracy of detection, but in actual application, the non -magnetic core hall chip is connected with the copper bar through the adapter board, on the one hand, a long size chain is formed, which makes the relative position between the non -magnetic core hall chip and the copper bar more easily deviate under the influence of external factors such as vibration and temperature change, on the other hand, the use of connector increases the probability of system failure, such as terminal short circuit, foreign matter introduction and other problems, thereby leading to that the parallel detection scheme of non -magnetic core hall cannot further improve the detection accuracy in the vertical direction of copper bar. UTILITY MODEL CONTENTS

[0005] The main purpose of the utility model is to provide a kind of chip packaging structure and non -magnetic core hall type current sensor, to solve the problem that non -magnetic core hall chip distance output copper bar distance is too far, while improving its detection accuracy.

[0006] In order to achieve the above object, the utility model provides a chip packaging structure, including mainboard, non magnetic core hall chip and output copper row, the mainboard with output copper row is opposite and interval setting in the first direction, the non magnetic core hall chip includes chip body and chip pin of electric connection chip body with mainboard, chip body is located between mainboard with output copper row, chip pin is located between mainboard with chip body, to make that chip body with mainboard forms the gap of reducing distance between.

[0007] In an embodiment, the output copper row includes a first vertical segment, a narrowing segment, and a second vertical segment connected in sequence in a length direction of the output copper row, the narrowing segment is gradually reduced in width from both ends to the middle in the length direction of the output copper row; the narrowing segment is spaced apart from the chip body in the first direction; wherein the first direction is perpendicular to the length direction of the output copper row and the width direction of the output copper row, respectively;

[0008] The non-magnetic core Hall chip further includes two Hall elements, the two Hall elements are spaced apart from the chip body along the length direction of the output copper row or the width direction of the output copper row, and the two Hall elements are used to detect the magnetic field strength of two different positions in the magnetic field of the output copper row. In an embodiment, the output copper row has a central axis extending along the length direction thereof;

[0009] The projections of the two Hall elements on the output copper row along the first direction are symmetrically arranged about the central axis to detect the magnetic field strength of two symmetric positions in the magnetic field of the output copper row.

[0010] In an embodiment, one side of the chip body is formed with a mounting surface, and the mounting surface is parallel to the first direction;

[0011] The two Hall elements are arranged on the mounting surface.

[0012] In an embodiment, the chip packaging structure further includes an insulating member, the insulating member is attached to one side of the mainboard close to the output copper row and covers the outside of the non-magnetic core Hall chip.

[0013] In an embodiment, the chip packaging structure further includes an insulating layer, and the insulating layer covers the outside of the output copper row.

[0014] In an embodiment, the insulating layer is a plastic-coated member or an insulating film.

[0015] In an embodiment, one side of the mainboard away from the output copper row is provided with a throughly arranged welding hole, and one end of the chip pin penetrates the welding hole and is welded with the mainboard.

[0016] In an embodiment, the chip pin comprises a connecting segment and a bending segment connected with the connecting segment, the connecting segment is attached to the mainboard, and the bending segment is accommodated in the distance-reducing gap and is electrically connected with the chip body.

[0017] The utility model also provides a no magnetic core hall type current sensor, including the chip package structure as above.

[0018] The chip package structure provided by the utility model directly installs the chip pin of the no magnetic core hall chip on the mainboard, and forms an adjustable distance-reducing gap between the chip body and the mainboard through the chip pin, so that the chip package structure can adjust the length or angle (bending pin) of the chip pin according to specific requirements, and can ensure that the induction distance between the no magnetic core hall chip and the output copper bar can always be kept within a suitable range under different environments or conditions. At the same time, the chip body and the mainboard are directly connected through the chip pin, which can avoid using the adapter plate and the connector, not only can reduce the probability of system failure, improve the stability and reliability of the system, but also can make the distance between the no magnetic core hall chip and the output copper bar more stable, reduce the influence of external factors on the relative position between the two, thereby improving the performance and stability of the system. BRIEF DESCRIPTION OF DRAWINGS

[0019] In order to more clearly illustrate the technical scheme in the embodiments of the utility model or the prior art, the drawings needed to be used in the embodiment or the prior art description will be briefly introduced below, and obviously, the drawings in the following description are only some embodiments of the utility model, and for those skilled in the art, other drawings can be obtained according to the structure shown in these drawings without creative labor.

[0020] Fig. 1 It is a structural schematic diagram of an embodiment of the chip package structure provided by the utility model;

[0021] Fig. 2 It is a structural schematic diagram of another embodiment of the chip package structure provided by the utility model;

[0022] Fig. 3 It is a structural schematic diagram of still another embodiment of the chip package structure provided by the utility model.

[0023] EXPLANATION OF DRAWINGS:

[0024] 100, chip packaging structure; 1, mainboard; 11, welding hole; 2, coreless Hall chip; 21, chip body; 22, chip pin; 221, connecting section; 222, bending section; 23, Hall element; 3, output copper bar; 31, first vertical section; 32, narrowing section; 33, second vertical section; 34, mounting hole; 4, insulating piece; 5, insulating layer.

[0025] The realization, functional features and advantages of the utility model will be further described in combination with embodiments with reference to the drawings. DETAILED DESCRIPTION

[0026] The technical solutions in the embodiments of the utility model will be clearly and completely described below in combination with the drawings in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, rather than all the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by those skilled in the art without creative labor belong to the protection scope of the utility model.

[0027] It should be noted that if the embodiments of the utility model involve directional indications (such as up, down, left, right, front, back, etc.), the directional indications are only used to explain the relative position relationship, movement condition, etc. between components in a certain posture, and if the certain posture changes, the directional indications also change accordingly.

[0028] In addition, if the embodiments of the utility model involve descriptions of "first", "second", etc., the descriptions of "first", "second", etc. are only for description purposes, and cannot be understood as indicating or implying the relative importance or implicitly indicating the number of indicated technical features. Therefore, the features limited by "first", "second" can explicitly or implicitly include at least one feature. In addition, "and / or" or "and / or" appearing throughout the text means that the three parallel schemes are included, taking "A and / or B" as an example, including A scheme, or B scheme, or A and B simultaneously meet the scheme. In addition, the technical solutions of each embodiment can be combined with each other, but it must be based on the realization of the ordinary skill in the art, and when the combination of technical solutions appears contradictory or unachievable, it should be considered that the combination of technical solutions does not exist, and is not within the protection scope required by the utility model.

[0029] The utility model provides a kind of chip packaging structure 100.

[0030] Please refer to Figs. 1 to 3In an embodiment of the utility model, this chip package structure 100 includes mainboard 1, non -magnetic core hall chip 2 and output copper row 3, mainboard 1 and output copper row 3 are relatively and interval set up in the first direction, non -magnetic core hall chip 2 includes chip body 21 and the chip pin 22 of electric connection chip body 21 and mainboard 1, chip body 21 is located between mainboard 1 and output copper row 3, and the chip pin 22 is located between mainboard 1 and chip body 21, to make the gap of shortening between chip body 21 and mainboard 1.

[0031] The chip package structure 100 provided by the utility model directly installs the chip pin 22 of non -magnetic core hall chip 2 on mainboard 1, and forms adjustable gap of shortening between chip body 21 and mainboard 1 by the chip pin 22, to make this chip package structure 100 can adjust the length or angle (bend pin) of chip pin 22 according to specific demand, can ensure that the induction distance between non -magnetic core hall chip 2 and output copper row 3 can always be kept in the proper range under different environments or situations. Meanwhile, by directly connecting chip body 21 and mainboard 1 by the chip pin 22, can avoid using adapter plate and connector, not only can reduce the probability of system failure, improve the stability and reliability of system, but also can make the distance between non -magnetic core hall chip 2 and output copper row 3 more stable, reduce the influence of external factors on the relative position between the two, thereby improve the performance and stability of system.

[0032] It needs to be supplemented that non -magnetic core hall chip 2 is a kind of sensor based on Hall effect, it can detect the intensity and direction of magnetic field, when current passes through output copper row 3, magnetic field will be generated around copper row, if non -magnetic core hall chip 2 is located in the vicinity of output copper row 3, it will be influenced by magnetic field, thereby generating Hall voltage, the size of Hall voltage is directly proportional to the intensity of magnetic field, therefore by measuring Hall voltage, can indirectly measure the intensity of current in output copper row 3. In the above embodiment, mainboard 1 includes any shape size circuit board, as long as it is relatively and interval set up with output copper row 3 in the first direction, and can realize the electric connection with non -magnetic core hall chip 2.

[0033] In addition, the "shrinkage gap" mentioned above refers to the space gap between the chip body 21 and the mainboard 1, and the distance of this gap is not fixed, but can be changed by changing the length of the chip pin 22 or bending it, so as to change the relative position between the chip body 21 and the mainboard 1. It should be emphasized that the key feature of the shrinkage gap is that it is adjustable, which means that during assembly, the size of the gap can be adjusted according to specific design requirements or application environment, and the main purpose is to adjust the induction distance between the non-magnetic core Hall chip 2 and the output copper bar 3. The traditional packaging structure needs to use a adapter plate and a connector to fix the chip body 21 and the mainboard 1, while the design of the shrinkage gap allows the chip body 21 to be directly connected to the mainboard 1 through the chip pin 22, reducing the intermediate link, thereby reducing the failure rate and improving the stability of the connection.

[0034] In an embodiment, the output copper bar 3 has a length direction and a width direction, and the output copper bar 3 includes a first vertical section 31, a narrowing section 32 and a second vertical section 33 connected in sequence in the length direction, and the width of the narrowing section 32 gradually decreases from both ends to the middle in the length direction; the narrowing section 32 is arranged in a first direction away from the chip body 21; wherein the first direction is arranged perpendicular to the length direction and the width direction; the non-magnetic core Hall chip 2 further includes two Hall elements 23, which are arranged in the chip body 21 along the length direction or the width direction, and the two Hall elements 23 are used to detect the magnetic field strength at two different positions in the magnetic field of the output copper bar 3. By arranging the narrowing section 32 on the output copper bar 3, the width of the copper bar gradually decreases in the length direction, thereby increasing the current carrying area per unit length of the copper bar, effectively improving the current density of the output copper bar 3. When the current density increases, the current in the output copper bar 3 also increases, so that the electric field strength generated by the output copper bar 3 increases. In this way, when the two Hall elements 23 in the non-magnetic core Hall chip 2 detect the magnetic field on the output copper bar 3, the detection sensitivity of the Hall element 23 will also increase due to the increase in the electric field strength, thereby improving the detection accuracy.

[0035] In the prior art, the chip body 21 of the non-magnetic core Hall chip 2 is usually a sheet structure, and in the design, the chip body 21 is usually arranged opposite to the output copper bar 3, and the two Hall elements 23 are usually arranged on the side of the chip body 21 close to the output copper bar 3. Thus, the differential magnetic field direction detected by the original non-magnetic core Hall chip 2 is perpendicular to the surface of the chip body 21, and thus the magnetic field direction does not match the detection direction of the Hall element 23, resulting in errors. Therefore, to solve the above problems, in an embodiment, one side of the chip body 21 is formed with a mounting surface parallel to the first direction; the two Hall elements 23 are arranged on the mounting surface. Thus, compared with the traditional non-magnetic core Hall chip 2, when the two Hall elements 23 are arranged in the length direction or the width direction, the differential magnetic field direction detected by the original non-magnetic core Hall chip 2 can be changed from the direction perpendicular to the surface of the chip body 21 to the direction parallel to the surface of the chip body 21, which helps to optimize the detection of the magnetic field direction, reduce the errors caused by the mismatch between the magnetic field direction and the detection direction of the Hall element 23, and thus avoid the problem of low detection accuracy in the vertical direction of the copper bar in the parallel detection scheme of the non-magnetic core Hall.

[0036] In an embodiment, the output copper bar 3 has a central axis extending in the length direction; the projections of the two Hall elements 23 on the output copper bar 3 in the first direction are symmetrically arranged about the central axis to detect the magnetic field strength at two symmetric positions in the magnetic field of the output copper bar 3. The two Hall elements 23 also need to be symmetrically distributed in the magnetic field as much as possible, and the symmetric arrangement helps to balance the signals detected by the two Hall elements 23, reduces the errors caused by uneven copper bar geometry or current distribution, and for example, when the detection results are disturbed by external factors (such as temperature gradient, magnetic field gradient, etc.), the two elements are disturbed similarly in the symmetric structure, and thus the interference can be eliminated in the form of difference, and the magnetic field distribution can be more accurately calculated and analyzed, thereby improving the overall accuracy of the magnetic field detection.

[0037] In an embodiment, the chip packaging structure 100 further comprises an insulating piece 4, which is attached to the side of the main board 1 close to the output copper bar 3 and covers the outer side of the coreless Hall chip 2. On the one hand, the insulating piece 4 can effectively isolate the electrical connection between the coreless Hall chip 2 and the output copper bar 3, prevent short circuit and current leakage, ensure the safe operation of the circuit, on the other hand, the insulating piece 4 can also provide physical protection for the coreless Hall chip 2, reduce the damage of external impact or vibration to the chip, improve the durability and reliability of the chip, and help to fix the position of the coreless Hall chip 2, prevent the chip from shifting due to vibration and other reasons, at the same time, the insulating piece 4 can also play a certain heat isolation effect, prevent the high temperature of the output copper bar 3 from being directly transmitted to the coreless Hall chip 2, and help to maintain the working temperature of the chip within its normal range. In actual use, the insulating piece 4 can be made of silica gel or polyethylene material, of course, it can also use insulating materials with certain electromagnetic shielding effect, which can help to reduce the influence of external electromagnetic interference on the coreless Hall chip 2.

[0038] In an embodiment, the chip packaging structure 100 further comprises an insulating layer 5, which covers the outer side of the output copper bar 3. On the one hand, the insulating layer 5 can prevent the output copper bar 3 from short circuiting with other conductive elements or signal lines on the circuit board, ensure the electrical safety of the circuit, and the insulating layer 5 can isolate the heat of the copper bar, prevent the heat from being directly transmitted to other circuit elements or circuit board, and help to maintain the normal working temperature of the circuit, on the other hand, the insulating layer 5 can also protect the output copper bar 3 from environmental factors such as humidity, dust, chemical corrosion, etc., thereby prolonging the service life of the copper bar and the entire packaging structure. The insulating layer 5 can be formed by wrapping or pasting an insulating film, the wrapped insulating layer 5 can form a continuous protective layer around the copper bar, providing comprehensive protection, with high strength, heat resistance and chemical resistance, suitable for copper bars of complex shape, while the pasted insulating film is more flexible, easy to operate, cost-effective, suitable for copper bars of different sizes and shapes, and different materials and thicknesses of insulating films can be selected according to needs, suitable for small batch production and scenes requiring quick replacement.

[0039] In an embodiment, the side of the main board 1 away from the output copper bar 3 is provided with a through-welding hole 11, and one end of the chip pin 22 is inserted into the welding hole 11 and welded with the main board 1. By providing the welding hole 11, the chip pin 22 can smoothly pass through the main board 1, so that welding can be performed on the other side of the main board 1. This method is convenient to operate, and also ensures the firmness of welding, and welding not only provides electrical connection, but also fixes the chip, ensuring the stable position of the chip on the main board 1 and preventing displacement due to vibration and other reasons.

[0040] In an embodiment, the chip pin 22 comprises a connecting segment 221 and a bending segment 222 connected with the connecting segment 221, the connecting segment 221 is attached to the mainboard 1, and the bending segment 222 is accommodated in the distance gap and is electrically connected with the chip body 21. It should be noted that the attachment refers to the SMT technology, and the use of the SMT technology can not only avoid the traditional spot welding, crimping and other processes, simplify the manufacturing process, and further reduce the influence of external factors (such as vibration, temperature change, etc.) on the detection accuracy and the probability of system failure, thereby ensuring the stability of the relative position between the chip and the copper bar and improving the robustness of the system.

[0041] It should be noted that in the above embodiments, since the coreless Hall chip 2 is susceptible to magnetic field interference, it is necessary to minimize the noise around the Hall, such as crosstalk or other metal devices causing stray magnetic field effects, and the crosstalk effect can be reduced by increasing the spacing of the output copper bar 3, if the structure design cannot increase the spacing, the crosstalk can also be decoupled by software matrix, and a shield or the output copper bar 3 can be designed into an s bend (S-shaped bend) form to modify the direction of Hall detection to reduce crosstalk.

[0042] The utility model also provides a kind of coreless Hall current sensor, including chip packaging structure 100.The specific structure of the chip packaging structure 100 refers to the above embodiment, since coreless Hall current sensor adopts all technical solutions of the above all embodiments, it at least has all beneficial effects brought by the technical solutions of the above embodiments, and here is not repeated.

[0043] The above is only the exemplary embodiment of the utility model, and does not limit the patent range of the utility model, and any equivalent structural transformation made by using the utility model specification and drawings, or direct / indirect application in other related technical fields is included in the patent protection range of the utility model.

Claims

1. A chip package structure, characterized by, The chip packaging structure comprises a main plate, a non-magnetic core Hall chip and an output copper bar; the main plate and the output copper bar are oppositely and spacedly arranged in a first direction; the non-magnetic core Hall chip comprises a chip body and a chip pin electrically connecting the chip body and the main plate; the chip body is located between the main plate and the output copper bar; and the chip pin is located between the main plate and the chip body, so that a distance-reducing gap is formed between the chip body and the main plate.

2. The chip package structure of claim 1, wherein, The output copper bar comprises a first vertical segment, a narrowing segment and a second vertical segment connected in sequence in the length direction of the output copper bar; the width of the narrowing segment gradually decreases from both ends to the middle in the length direction of the output copper bar; the narrowing segment is spacedly arranged with the chip body in the first direction; and the first direction is perpendicular to the length direction of the output copper bar and the width direction of the output copper bar. The non-magnetic core Hall chip further comprises two Hall elements; the two Hall elements are spacedly arranged on the chip body along the length direction of the output copper bar or the width direction of the output copper bar; and the two Hall elements are used for detecting the magnetic field strength of two different positions in the magnetic field of the output copper bar.

3. The chip package structure of claim 2, wherein, The output copper bar has a central axis extending in the length direction thereof. The projections of the two Hall elements on the output copper bar in the first direction are symmetrically arranged about the central axis, so as to detect the magnetic field strength of two symmetric positions in the magnetic field of the output copper bar.

4. The chip package structure of claim 2, wherein, One side of the chip body is formed with a mounting surface parallel to the first direction. The two Hall elements are arranged on the mounting surface.

5. The chip package structure of any one of claims 1 to 4, wherein, The chip packaging structure further comprises an insulating member attached to the side of the main plate close to the output copper bar and covering the outer side of the non-magnetic core Hall chip.

6. The chip package structure of any one of claims 1 to 4, wherein, The chip packaging structure further comprises an insulating layer covering the outer side of the output copper bar.

7. The chip package structure of claim 6, wherein, The insulating layer is a plastic-coated member or an insulating film.

8. The chip package structure of any one of claims 1 to 4, wherein, The side of the main plate away from the output copper bar is provided with a throughly arranged welding hole; and one end of the chip pin penetrates through the welding hole and is welded with the main plate.

9. The chip package structure of any one of claims 1 to 4, wherein, The chip pin comprises a connecting segment and a bent segment connected with the connecting segment; the connecting segment is attached to the main plate; and the bent segment is accommodated in the distance-reducing gap and is electrically connected with the chip body.

10. A coreless Hall effect current sensor, characterized by The chip packaging structure comprises the chip packaging structure according to any one of claims 1 to 9.

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