Data acquisition station

Abstract

The utility model provides a data acquisition station, which is characterized in that a host and a first-stage docking station are in one-to-one counterpoint connection through a plurality of in-place detection pins and in-place input pins of a plurality of pairs of extension pins, and two adjacent stages of docking stations are in sequential counterpoint connection through the corresponding in-place input pins and in-place output pins; a docking station end in-place detection circuit is also arranged in each stage of docking station, and a target in-place input pin connected with the docking station end in-place detection circuit and an empty target in-place output pin are configured in the plurality of pairs of extension pins; and in-place input pins and in-place output pins, except the target in-place input pins and the target in-place output pins, in the multiple pairs of expansion pins are connected in a one-to-one staggered manner, so that the target in-place input pins are coupled to the corresponding in-place detection pins. As the host end in-situ detection circuits are in one-to-one correspondence with the docking stations, the host can quickly and accurately judge the positions of the broken docking stations.

Description

TECHNICAL FIELD

[0001] The utility model relates to data acquisition technical field especially relates to a data acquisition station. BACKGROUND

[0002] In a related technology, the data acquisition station provides charging and data collection services for peripheral data acquisition equipment. The data acquisition station includes a host computer and a multi-stage docking station connected to the host computer. The multi-stage docking station is coupled to the host computer through a cascading manner. Each docking station is provided with multiple expansion compartments. The expansion compartments provide plug-in charging and data uploading services for corresponding data acquisition equipment.

[0003] The host computer collects data uploaded by each docking station, receives reported data from multiple data acquisition equipment through the multi-stage docking station, and controls the working parameters of the docking station. For example, the host computer can be used to detect whether a docking station is in place. When a docking station is not in place, i.e., the line is disconnected, the host computer notifies relevant personnel for processing in a timely manner.

[0004] However, how to achieve in-place detection of the docking station is a problem that the industry is considering.

[0005] It should be noted that the information disclosed in the above background section is only used to enhance the understanding of the background of the utility model, and therefore can include information that does not constitute prior art known to those skilled in the art. CONTENT OF THE UTILITY MODEL

[0006] To overcome the difficulties of the prior art, the utility model aims to provide a data acquisition station that can accurately detect the in-place docking station.

[0007] The first aspect of the present disclosure provides a data acquisition station comprising a host computer and a multi-stage docking station. The host computer is configured with a plurality of host-side in-place detection circuits corresponding to the multi-stage docking station and a plurality of in-place detection pins connected one-to-one to the plurality of host-side in-place detection circuits.

[0008] Each stage of the docking station is configured with a plurality of pairs of expansion pins corresponding to the plurality of in-place detection pins. Each pair of expansion pins includes an in-place input pin and an in-place output pin.

[0009] The host computer is connected one-to-one to the in-place input pins of the plurality of pairs of expansion pins through the plurality of in-place detection pins between the host computer and the first stage of the docking station. The corresponding in-place input pins and in-place output pins are connected one-to-one between the two adjacent stages of the docking station.

[0010] The docking station end-in-position detection circuit is further arranged in each stage of the docking station, and a target end-in-position output pin is arranged in the plurality of pairs of expansion pins, and a target end-in-position input pin is connected to the docking station end-in-position detection circuit, the target end-in-position input pin and the target end-in-position output pin belong to different pairs of expansion pins, and the end-in-position input pins and the end-in-position output pins in the plurality of pairs of expansion pins are one-to-one misalignedly connected, so that the target end-in-position input pin is coupled to the corresponding end-in-position detection pin.

[0011] In some embodiments, the internal structures of the plurality of stages of the docking station are the same.

[0012] In some embodiments, in each stage of the docking station, the target end-in-position input pin and the target end-in-position output pin are respectively located at the first address bit and the last address bit along the arrangement direction of the plurality of pairs of expansion pins.

[0013] In some embodiments, the one-to-one misaligned connection between the end-in-position input pins and the end-in-position output pins in the plurality of pairs of expansion pins comprises:

[0014] Each end-in-position output pin in the plurality of pairs of expansion pins, except the target end-in-position input pin and the target end-in-position output pin, is misalignedly connected to an end-in-position input pin at an adjacent address bit along the arrangement direction.

[0015] In some embodiments, the host is further configured with a plurality of identification bit detection pins and a host end identification bit detection circuit connected to the identification bit detection pins one-to-one;

[0016] Each stage of the docking station is further configured with a plurality of docking station end identification bit detection circuits corresponding to the plurality of identification bit detection pins, and a plurality of pairs of identification bit transmission pins corresponding to the plurality of docking station end identification bit detection circuits;

[0017] In each stage of the docking station, each pair of identification bit transmission pins comprises an identification bit input pin and an identification bit output pin, each identification bit input pin is coupled to the corresponding docking station end identification bit detection circuit, and a target identification bit output pin is arranged in the plurality of pairs of identification bit transmission pins, and the identification bit output pins and the identification bit input pins in the plurality of pairs of identification bit transmission pins, except the target identification bit output pin, are one-to-one misalignedly connected;

[0018] The host and the first level of the expansion dock are connected one by one through the multiple identification bit detection pins and the identification bit input pins in the multiple pairs of identification bit transmission pins, and the adjacent two levels of the expansion docks are connected one by one through the corresponding identification bit input pins and identification bit output pins.

[0019] In some embodiments, the target identification bit output pin in each level of the expansion dock is located at the first address bit and the last address bit along the arrangement direction of the multiple pairs of identification bit transmission pins.

[0020] In some embodiments, the identification bit output pins in the multiple pairs of identification bit transmission pins, except the target identification bit output pin, are connected one by one in a staggered manner with the identification bit input pins, including:

[0021] Each identification bit output pin in the multiple pairs of identification bit transmission pins, except the target identification bit output pin, is connected in a staggered manner with the identification bit input pin of the adjacent address bit along the arrangement direction.

[0022] In some embodiments, a control module is arranged in each level of the expansion dock, the control module is connected with the multiple expansion dock end identification bit detection circuits, is used for detecting the electrical signals in the multiple expansion dock end identification bit detection circuits, determining the identification bit of the expansion dock according to the electrical signals in the multiple expansion dock end identification bit detection circuits, and reporting to the host.

[0023] In some embodiments, the multiple in-place detection pins are integrated in a first high-speed connector, the in-place input pins in the multiple pairs of expansion pins are integrated in a second high-speed connector, the in-place output pins in the multiple pairs of expansion pins are integrated in a third high-speed connector, the host and the first level of the expansion dock are connected one by one through the first high-speed connector and the second high-speed connector, and the adjacent two levels of the expansion docks are connected one by one through the second high-speed connector and the third high-speed connector.

[0024] In some embodiments, the host end in-place detection circuit is a pull-up circuit, and the expansion dock end in-place detection circuit is a pull-down circuit.

[0025] The data acquisition station provided by the embodiment of the present disclosure has the following beneficial effects:

[0026] Through the staggered connection, the first-stage expansion dock directly receives the in-position detection signal of the corresponding bit from the host computer, and transmits the in-position detection signals of other bits backward, and each subsequent-stage expansion dock receives the in-position detection signal of the corresponding bit and transmits the in-position detection signals of other bits backward until the last-stage expansion dock, which only receives the in-position detection signal of the corresponding bit and does not transmit backward. Meanwhile, each host-end in-position detection circuit in the host computer is connected with only one expansion dock, so that the host computer can locate each expansion dock in position. By inputting the in-position detection signal to each in-position detection pin, the host computer can determine whether the corresponding expansion dock is in position or disconnected by detecting the in-position detection signal in the in-position detection circuit. For each expansion dock, when it is in position, the in-position detection signal in the corresponding host-end in-position detection circuit can be normally transmitted to the expansion-dock-end in-position detection circuit inside the expansion dock, but when it is disconnected and not in position, the in-position detection signal cannot be normally transmitted, resulting in a change in the in-position detection signal collected by the host computer from the corresponding host-end in-position detection circuit, triggering a disconnected warning. Since the host-end in-position detection circuit and the expansion dock are one-to-one corresponding, the host computer can quickly and accurately determine the position of the disconnected expansion dock.

[0027] Therefore, by means of the staggered connection, the in-position detection signal is transmitted from each-stage expansion dock to the host computer, and combined with the one-to-one corresponding monitoring mechanism, efficient expansion dock position detection and fault diagnosis can be achieved. This specifically includes accurate expansion dock in-position detection and signal transmission, rapid expansion dock disconnection identification and warning, and efficient fault positioning, which improves the reliability and maintenance efficiency of the system and reduces the probability of error diagnosis and maintenance cost of the system.

[0028] It should be understood that the foregoing general description and the following detailed description are only exemplary and explanatory, and cannot limit the present disclosure. BRIEF DESCRIPTION OF DRAWINGS

[0029] Other features, objects, and advantages of the present application will become more apparent from the following detailed description of non-limiting embodiments with reference to the drawings.

[0030] Figure 1 A topological structure diagram of a data acquisition station provided for an embodiment of the present disclosure.

[0031] Figure 2 Exhibition Figure 1 An internal structure and connection relationship diagram of a host computer and a first-stage expansion dock in the illustrated data acquisition station.

[0032] Figure 3 For Figure 1 A connection relationship diagram of a host computer and a plurality of expansion docks in the illustrated data acquisition station.

[0033] Figure 4 ForFigure 1 Structure diagram of connection relationship between host and first level docking station in data collection station. DETAILED DESCRIPTION

[0034] Example implementations will now be described more fully with reference to the accompanying drawings. Example implementations may, however, be implemented in many different forms and should not be construed as limited to the examples set forth herein; rather, these implementations are provided so that this disclosure will be thorough and complete, and will fully convey the inventive concept to those skilled in the art. The described features, structures, or characteristics can be combined in one or more implementations in any suitable manner.

[0035] In addition, the accompanying drawings are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this specification, illustrate embodiments described herein, and together with the description serve to explain principles of the disclosure. In the drawings:

[0036] In addition, the concepts of "first", "second", etc. mentioned in the disclosure are only used to distinguish different devices, modules or units, and are not used to limit the order or interdependence of the functions performed by these devices, modules or units.

[0037] The embodiments of the disclosure provide a data collection station for realizing accurate docking station in-position detection.

[0038] As shown in the drawings, Figure 1 The data collection station provided by the embodiments of the disclosure includes a host 1 and a plurality of levels of docking stations 2, which exemplarily include a first level docking station 2a, a second level docking station 2b and a third level docking station 2c. The host 1 is directly cascaded with the first level docking station 2a, and the first level docking station 2a, the second level docking station 2b and the third level docking station 2c are sequentially cascaded.

[0039] It should be noted that the docking stations of each level have the same structure, and the position of any docking station in the cascade can be adjusted arbitrarily, and docking stations can be added or reduced at any position. By using the same structure design for the plurality of levels of docking stations, the design of docking station materials can be facilitated, and costs can be saved; and each docking station uses the same structure design, which can realize automatic in-position detection and ID allocation in cooperation with the host, without the need for additional configuration, and is more convenient.

[0040] As shown in the drawings, Figure 2 Figure 2 ​Only the internal structure and connection relationship between the host 1 and the first level expansion dock 2a are shown, and the host 1 is configured with a plurality of host end in-place detection circuits 3 corresponding to the plurality of levels of expansion docks 2 one by one, and a plurality of in-place detection pins T connected in turn corresponding to the plurality of host end in-place detection circuits 3. For example, the plurality of host end in-place detection circuits 3 include: a first host end in-place detection circuit 3a, a second host end in-place detection circuit 3b and a third host end in-place detection circuit 3c corresponding to the first level expansion dock 2a, the second level expansion dock 2b and the third level expansion dock 2c one by one, and the plurality of in-place detection pins T include a first in-place detection pin T1, a second in-place detection pin T2 and a third in-place detection pin T3 connected one by one corresponding to the first host end in-place detection circuit 3a, the second host end in-place detection circuit 3b and the third host end in-place detection circuit 3c respectively.

[0041] The plurality of pairs of expansion pins J corresponding to the plurality of in-place detection pins T are configured in each level of expansion dock 2, for example, the plurality of pairs of expansion pins J include a first pair of expansion pins J1, a second pair of expansion pins J2 and a third pair of expansion pins J3 corresponding to the first in-place detection pin T1, the second in-place detection pin T2 and the third in-place detection pin T3 one by one. Wherein each pair of expansion pins J includes an in-place input pin Ja and an in-place output pin Jb.

[0042] As shown in Figure 2 The host 1 and the first level expansion dock 2a are connected one by one through the plurality of in-place detection pins T and the in-place input pins Ja of the plurality of pairs of expansion pins J. The one-by-one connection here means sequential connection, for example, from top to bottom between the host 1 and the first level expansion dock 2a, the first in-place detection pin T1, the second in-place detection pin T2 and the third in-place detection pin T3 are connected in turn with the in-place input pins Ja of the first pair of expansion pins J1, the second pair of expansion pins J2 and the third pair of expansion pins J3 respectively.

[0043] As shown in Figure 3 The in-place input pins Ja and the in-place output pins Jb of the corresponding adjacent two levels of expansion docks 2 are connected one by one. Between the first level expansion dock 2a and the second level expansion dock 2b, from top to bottom, the in-place output pins Jb in the first pair of expansion pins J1, the second pair of expansion pins J2 and the third pair of expansion pins J3 in the first level expansion dock 2a are connected with the in-place input pins Ja in the first pair of expansion pins J1, the second pair of expansion pins J2 and the third pair of expansion pins J3 in the second level expansion dock 2b.

[0044] As shown in Figure 2As shown in the figure, in each stage of the docking station 2, a docking station end in-place detection circuit 4 is further arranged, and in multiple pairs of the expansion pins J, a target in-place input pin Jm connected with the docking station end in-place detection circuit 4 and an empty target in-place output pin Jn are arranged, the target in-place input pin Jm and the target in-place output pin Jn belong to different pairs of expansion pins. The in-place input pin Ja and the in-place output pin Jb in the multiple pairs of expansion pins J are connected in a staggered manner, and the target in-place input pin Jm is coupled to the corresponding in-place detection pin T.

[0045] For example, the in-place input pin Ja in the first pair of expansion pins J1 is the target in-place input pin Jm, the in-place output pin Jb in the third pair of expansion pins J3 is the target in-place output pin Jn, and the in-place input pin Ja in the second pair of expansion pins J2 is connected to the in-place output pin Jb in the first pair of expansion pins J1 in a staggered manner.

[0046] As shown in the figure, Figure 2 In this embodiment, the target in-place input pin Jm in the first stage docking station 2a is connected with the corresponding first in-place detection pin T1 in the host 1 and is finally coupled to the first host end in-place detection circuit 3a. As shown in the figure, Figure 3 As shown in the figure, the in-place input pin Ja and the in-place output pin Jb in each stage of the docking station 2 are connected in a staggered manner, and the in-place input pin Ja and the in-place output pin Jb between adjacent two stages of docking stations are connected in a paired manner, so that the target in-place input pin Jm in the next stage of docking station 2 is actually connected with the in-place input pin Ja of other address bits in the previous stage of docking station 2 in a staggered manner between adjacent two stages of docking stations 2, thereby realizing that the target in-place input pin Ja in different docking stations 2 can be coupled to the corresponding different in-place detection pins T and host end in-place detection circuits 3 in the host 1, so that each host end in-place detection circuit 3 is finally coupled to the docking station end in-place detection circuit 4 in the corresponding docking station 2.

[0047] In this case, the first stage docking station 2a directly receives the in-place detection signal of the corresponding bit and transmits the other in-place detection signals backward, and the docking stations in the subsequent stages receive the in-place detection signal of the corresponding bit and transmit the other in-place detection signals backward, until the last stage docking station, which only receives the in-place detection signal of the corresponding bit and no longer transmits backward.

[0048] Since each host-side presence detection circuit 3 in the host 1 is connected with only one docking station 2, and each docking station 2 is connected with only one corresponding host-side presence detection circuit 3, the host 1 can locate each docking station 2 in place. By inputting a presence detection signal to each presence detection pin T, the host 1 can determine whether the corresponding docking station 2 is in place or disconnected by detecting the presence detection signal in the plurality of host-side presence detection circuits 3. For each docking station 2, when it is in place, the presence detection signal in the corresponding host-side presence detection circuit 3 can be normally transmitted to the docking-station-side presence detection circuit 4 inside the docking station 2, but when it is disconnected and not in place, the presence detection signal cannot be normally transmitted, resulting in a change in the presence detection signal collected by the host 1 from the corresponding host-side presence detection circuit 3, triggering a disconnection warning. Since the host-side presence detection circuit 3 and the docking station 2 are one-to-one corresponding, the host 1 can quickly and accurately determine the location of the disconnected docking station.

[0049] Exemplarily, the host 1 uses a binary string to represent the presence information of the docking stations, and the address bits of the multi-level docking stations 2 correspond to the character bits of the binary string in sequence, and the arrangement direction of the multi-level docking stations 2 is from front to back, gradually away from the host 1, corresponding to the arrangement direction of the binary string from low bit to high bit. For example, when none of the three-level docking stations 2 is in place, the host 1 detects the presence information Detect = 0x111, and “1” indicates that it is not in place, and the corresponding “0” indicates that it is in place. When only the first-level docking station 2a is in place, the presence information Detect = 0x110. When the first-level docking station 2a and the second-level docking station 2b are both in place, Detect = 0x100. When the three-level docking stations 2 are all in place, Detect = 0x000.

[0050] In the embodiments of the present disclosure, the docking stations are of the same structure, and in any one / any level docking station 2, the target presence input pin Jm is located at the first corresponding address bit of the docking station 2. Exemplarily, the first corresponding address bit is the first address bit of the first pair of the plurality of expansion pins J in the docking station 2 along the same arrangement direction H (the order from top to bottom is shown in FIG. 1). Figure 2 Figure 2 As shown in FIG. 1, each target presence input pin Jm is located in the first expansion pin J1 in the docking station 2, which is located at the first address bit of the arrangement direction H of the plurality of expansion pins J. This can reduce the wiring difficulty and avoid cross-wiring when the subsequent pairs of expansion pins are connected in error.

[0051] ​In the embodiments of the present disclosure, each docking station structure is the same, and in any one / any level of the docking station 2, the target in-place output pin Jn is located at a second corresponding address bit in the docking station 2. For example, the second corresponding address bit is the last address bit of the plurality of pairs of expansion pins J in the same arrangement direction H in the docking station 2. As shown in Figure 2 In the plurality of docking stations 2, each target in-place output pin Jn is located at the third pair of expansion pins J3 in the docking station 2, which is located at the last address bit of the plurality of pairs of expansion pins J in the arrangement direction H. This can reduce the wiring difficulty and avoid cross-wiring when each pair of expansion pins is connected in a staggered manner.

[0052] In the above embodiments, the first corresponding address bit and the second corresponding address bit are the first address bit and the last address bit, respectively, which is an example and can significantly reduce the layout difficulty and avoid cross-wiring.

[0053] For example, in this case, in each docking station, the in-place input pin Ja and the in-place output pin Jb of the plurality of pairs of expansion pins J, except for the target in-place input pin Jm and the target in-place output pin Jn, are connected in a one-to-one staggered manner, including:

[0054] Each in-place output pin Jb of the plurality of pairs of expansion pins J, except for the target in-place input pin Jm and the target in-place output pin Jn, is connected to the in-place input pin Ja of the adjacent address bit in the arrangement direction H. In this way, the staggered connection can be achieved without cross-wiring, and the layout difficulty can be reduced.

[0055] For example, in each docking station 2, the in-place output pin Jb of the first pair of expansion pins J1 is connected to the in-place input pin Ja of the second pair of expansion pins J2, and the in-place output pin Jb of the second pair of expansion pins J2 is connected to the in-place input pin Ja of the third pair of expansion pins J3. In this way, the second in-place detection pin T2 is coupled to the target in-place input pin Jm of the first pair of expansion pins J1 in the second level docking station 2b and the docking station end in-place detection circuit 4 through the in-place input pin Ja of the second pair of expansion pins J2 and the in-place output pin Jb of the first pair of expansion pins J1 in the first level docking station 2a in sequence. The third in-place detection pin T3 is coupled to the target in-place input pin Jm of the first pair of expansion pins J1 in the third level docking station 2c and the docking station end in-place detection circuit 4 through the in-place input pin Ja of the third pair of expansion pins J3 and the in-place output pin Jb of the second pair of expansion pins J2 in the first level docking station 2a, and the in-place input pin Ja of the second pair of expansion pins J2 and the in-place output pin Jb of the first pair of expansion pins J1 in the second level docking station 2b in sequence.

[0056] In the above embodiment, the middle expansion dock also provides a transmission line for the backward transmission of the presence detection signal, so that each host-side presence detection circuit 3 can perform presence detection on the corresponding expansion dock 2.

[0057] In another implementation, the target-in-place input pin may be located at the last address bit, and the target-in-place output pin may be located at the first address bit.

[0058] In the embodiments described above, the data acquisition station includes a three-level expansion dock, which is an example. In other embodiments, the data acquisition station may include two or more levels of expansion docks, i.e., at least two levels of expansion docks. Accordingly, the number of host-side presence detection circuits and presence detection pins in the host is arranged according to the number of expansion dock levels, and the number of expansion pin pairs and the number of expansion dock-side presence detection circuits in each expansion dock are also configured and arranged according to the number of expansion dock levels.

[0059] In this embodiment, each host-side presence detection circuit 3 is a pull-up circuit, including a first pull-up resistor R1, and is coupled to the control system in the host 1, such as a CPU or microcontroller. The pull-up circuit can pull up the detection signal. Each docking station-side presence detection circuit 4 is a pull-down circuit, including a second pull-down resistor R2, and is ultimately grounded. This pull-down circuit is used to pull down the detection signal. The resistance values ​​of the first pull-up resistor R1 and the second pull-down resistor R2 are not limited here.

[0060] like Figure 2 As shown, the host 1 is also equipped with multiple flag bit detection pins B and host-side flag bit detection circuits 5 that are connected one-to-one with the flag bit detection pins B. For example, the multiple flag bit detection pins B include a first flag bit detection pin B1 and a second flag bit detection pin B2, and the host-side flag bit detection circuits 5 include a first host-side flag bit detection circuit 5a and a second host-side flag bit detection circuit 5b.

[0061] Each of the expansion docks 2 is further configured with multiple expansion dock-end identifier detection circuits 6 corresponding to the multiple identifier detection pins B, and multiple pairs of identifier transmission pins S corresponding one-to-one with the multiple expansion dock-end identifier detection circuits 6. For example, the multiple expansion dock-end identifier detection circuits 6 include a first expansion dock-end identifier detection circuit 6a and a second expansion dock-end identifier detection circuit 6b, and the multiple pairs of identifier transmission pins S include a first pair of identifier transmission pins S1 and a second pair of identifier transmission pins S2.

[0062] In each of the expansion docks 2, each pair of the identification bit transmission pins S includes an identification bit input pin Sa and an identification bit output pin Sb. Each of the identification bit input pins Sa is coupled to a corresponding expansion dock end identification bit detection circuit 6, for example, the identification bit input pin Sa of the first pair of identification bit transmission pins S1 is coupled to the first expansion dock end identification bit detection circuit 6a, and the identification bit input pin Sa of the second pair of identification bit transmission pins S2 is coupled to the second expansion dock end identification bit detection circuit 6b.

[0063] A target identification bit output pin Sn is configured in a plurality of pairs of identification bit transmission pins S, and the identification bit output pins Sb and the identification bit input pins Sa in the plurality of pairs of identification bit transmission pins S are connected in a staggered manner. For example, the identification bit output pin Sb in the first pair of identification bit transmission pins S1 is connected to the identification bit input pin Sa in the second pair of identification bit transmission pins S2 in a staggered manner, and because the target identification bit output pin Sn is not connected, the identification bit input pin Sa in the first pair of identification bit transmission pins S1 is not connected to any identification bit output pin.

[0064] The host 1 and the first level expansion dock 2a are connected in a one-to-one manner through the plurality of identification bit detection pins B and the identification bit input pins Sa in the plurality of pairs of identification bit transmission pins S. For example, the first identification bit detection pin B1 is connected to the identification bit input pin Sa in the first pair of identification bit transmission pins S1 in a one-to-one manner, and the second identification bit detection pin B2 is connected to the identification bit input pin Sa in the second pair of identification bit transmission pins S2 in a one-to-one manner.

[0065] In combination Figure 3 As shown, the adjacent two levels of the expansion docks 2 are connected in a one-to-one manner through the corresponding identification bit input pins Sa and identification bit output pins Sb. For example, between the first level expansion dock 2a and the second level expansion dock 2b, the identification bit output pin Sb in the first pair of identification bit transmission pins S1 in the first level expansion dock 2a is connected to the identification bit input pin Sa in the first pair of identification bit transmission pins S1 in the second level expansion dock 2b, and the identification bit output pin Sb in the second pair of identification bit transmission pins S2 in the first level expansion dock 2a is connected to the identification bit input pin Sa in the second pair of identification bit transmission pins S2 in the second level expansion dock 2b, achieving one-to-one connection. The one-to-one connection between the second level expansion dock 2b and the third level expansion dock 2c is not described in detail.

[0066] The identification bit ID of each level of the expansion dock 2 is obtained by combining the identification bit signals detected by the plurality of expansion dock end identification bit detection circuits 6. Since the host 1 and the first level expansion dock 2a are connected in a one-to-one manner, and the identification bit transmission pins inside each level of the expansion dock 2 are connected in a one-to-two manner, except for the empty target identification bit output pin Sn, the identification bit input pins Sa of the next level expansion dock are actually connected to the identification bit input pins Sa of different address bits of the previous level expansion dock, which makes the identification bits ID of each two expansion docks 2 different.

[0067] For example, in each expansion dock 2, two expansion dock end identification bit detection circuits 6 are connected to the corresponding identification bit input pins Sa, and the first identification bit ID1 and the second identification bit ID2 of the two expansion dock end identification bit detection circuits 6 are respectively pulled up by default, with an initial value ID = 0x11. In the first level expansion dock 2a, the first expansion dock end identification bit detection circuit 6a and the first host end identification bit detection circuit 5a are connected to transmit ID1, and the second expansion dock end identification bit detection circuit 6b and the second host end identification bit detection circuit 5b are connected to transmit ID2. At this time, ID1 and ID2 are both pulled down, and the ID of the first level expansion dock 2a is 0x00. At the same time, the second host end identification bit detection circuit 5b in the first level expansion dock 2a is coupled to the first expansion dock end identification bit detection circuit 6a of the second level expansion dock 2b, so that ID1 in the second level expansion dock 2b is pulled down and ID2 is pulled up due to the empty connection, and the ID of the second level expansion dock 2b is 0x01. In the third level expansion dock 2c, ID1 and ID2 are both pulled up, and ID = 0x11.

[0068] In the embodiment of the present disclosure, by the one-to-two connection inside each level of the expansion dock 2 and the empty target identification bit output pin Sn, the multi-level expansion dock 2 is connected in a one-to-two manner, the expansion dock identification bit is automatically assigned, and the position of the expansion dock is identified by automatically assigning the identification bit. Compared with the expansion dock in the prior art which can only be inserted in a specified position or manually assigned by a code dialing method, the cost is low, and the expansion dock identification bit is assigned quickly and efficiently.

[0069] In combination with the above in-position detection embodiment, the data acquisition station of the present embodiment can identify each level of the expansion dock by the automatically assigned expansion dock identification bit, and further automatically detect each expansion dock in position.

[0070] In the above embodiment of the present disclosure, in each of the expansion docks 2, the target identification bit output pin Sn is located at the last address bit of the plurality of pairs of identification bit transmission pins S along the same arrangement direction H. In another embodiment, in each of the expansion docks 2, the target identification bit output pin Sn can also be located at the first address bit of the plurality of pairs of identification bit transmission pins S along the same arrangement direction H. This can realize misaligned connection without crossing of wiring, and reduce the difficulty of layout.

[0071] In another embodiment, the target identification bit output pin in the expansion dock can also be located at any other address bit of the plurality of pairs of identification bit transmission pins along the same arrangement direction.

[0072] In the embodiment of the present disclosure, the identification bit output pin Sb other than the target identification bit output pin Sn in the plurality of pairs of identification bit transmission pins S is misalignedly connected with the identification bit input pin Sa, including:

[0073] Each of the identification bit output pins Sb other than the target identification bit output pin Sn in the plurality of pairs of identification bit transmission pins S is misalignedly connected with the identification bit input pin Sa at the adjacent address bit along the arrangement direction H.

[0074] In another embodiment of the present disclosure, the host can also be configured with three or more pairs of identification bit detection pins and corresponding host-side identification bit detection circuits, and each of the expansion docks is correspondingly configured with the same number of expansion dock-side identification bit detection circuits and identification bit transmission pins. Accordingly, the misaligned connection mode between each of the expansion docks can refer to the above embodiment to realize sequential misaligned cascade, and then the identification bit of each of the expansion docks can be characterized by more identification bit signals.

[0075] In another embodiment, when the number of expansion docks is larger, the identification bit detection pins, the corresponding host-side identification bit detection circuits, the expansion dock-side identification bit detection circuits and the identification bit transmission pins can be correspondingly increased, and each of the expansion docks and the cascade mode of the plurality of expansion docks can be configured by referring to the misaligned connection mode of the present embodiment.

[0076] In the embodiment of the present disclosure, each of the expansion docks 2 is provided with a control module (not shown in the figure), which is connected with the plurality of expansion dock-side identification bit detection circuits 6 and used for detecting the electrical signals in the plurality of expansion dock-side identification bit detection circuits 6, determining the identification bit of the expansion dock 2 according to the electrical signals in the plurality of expansion dock-side identification bit detection circuits 6, and reporting to the host 1. The control module can use a single-chip microcomputer.

[0077] As Figure 2As shown, the host-side identification bit detection circuit 5 is a pull-down circuit, which includes a third pull-down resistor R3 for pulling down the identification bit signal. Each docking station-side identification bit detection circuit 6 is a pull-up circuit, which includes a fourth pull-up resistor for pulling up the identification bit signal. The resistance values of R3 and R4 can be configured according to actual conditions, which are not limited here.

[0078] With reference to the above embodiments, the single-chip microcomputer can obtain the identification bit ID of the docking station 2 where it is located, and report it to the host 1 for cross comparison and authentication. Meanwhile, the single-chip microcomputer further obtains the identification bit of each expansion bay, and reports the identification bit of the docking station where it is located together with the identification bit of the expansion bay to the host 1. In this way, the host 1 can be accurately controlled to each expansion bay of each docking station.

[0079] In the embodiments of the present disclosure, as shown in Figure 2 and Figure 4 As shown, a plurality of in-place detection pins T are integrated in the first high-speed connector 71, in-place input pins Ja in the plurality of pairs of expansion pins J are integrated in the second high-speed connector 72, in-place output pins Jb in the plurality of pairs of expansion pins J are integrated in the third high-speed connector 73, and the host 1 and the first-level docking station 2a are connected in place through the first high-speed connector 71 and the second high-speed connector 72, and adjacent two docking stations 2 are connected in place through the second high-speed connector 72 and the third high-speed connector 73.

[0080] Further, the identification bit detection pins B on the host 1 side are integrated in the first high-speed connector 71, identification bit input pins Sa in the plurality of pairs of identification bit transmission pins S in the docking station 2 are integrated in the second high-speed connector 72, and identification bit output pins Sb are integrated in the third high-speed connector.

[0081] The hot plug is realized through the above high-speed connectors, facilitating the connection and separation operation between the host 1 and the first-level docking station 2a and between the plurality of docking stations 2.

[0082] In an embodiment, the first high-speed connector 71, the second high-speed connector 72 and the third high-speed connector 73 are all high-speed connectors, realizing high-speed signal USB transmission between the docking station and the host.

[0083] Other embodiments of the present disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the utility model disclosed herein. The present disclosure is intended to cover any variations, uses or adaptive changes of the present disclosure that follow the general principles of the present disclosure and include common knowledge or conventional technical means in the art not disclosed by the present disclosure. The specification and examples are only regarded as exemplary, and the true scope and spirit of the present disclosure are indicated by the appended claims.

Claims

1. A data acquisition station, characterized in that, Includes main unit and multi-level expansion dock; The host is configured with multiple host-side presence detection circuits corresponding to the multi-level expansion dock and multiple presence detection pins connected to the multiple host-side presence detection circuits. Each level of the expansion dock is configured with multiple pairs of expansion pins corresponding to the multiple in-situ detection pins, and each pair of expansion pins includes an in-situ input pin and an in-situ output pin; The host and the first-level expansion dock are connected one-to-one through multiple in-situ detection pins and multiple pairs of expansion pins in-situ input pins. The two adjacent expansion docks are connected sequentially through corresponding in-situ input pins and in-situ output pins. Each level of the expansion dock is equipped with an expansion dock-end presence detection circuit, and multiple pairs of expansion pins are configured with an unconnected target presence output pin and a target presence input pin connected to the expansion dock-end presence detection circuit. The target presence input pin and the target presence output pin belong to different pairs of expansion pins. The presence input pins and presence output pins in the multiple pairs of expansion pins, except for the target presence input pin and the target presence output pin, are connected in a staggered manner, so that the target presence input pin is coupled to the corresponding presence detection pin.

2. The data acquisition station according to claim 1, characterized in that, The internal structure of the expansion docks described in the multiple levels is the same.

3. The data acquisition station according to claim 2, characterized in that, In each level of the expansion dock, the target in-situ input pin and the target in-situ output pin are located at the first and last address bits, respectively, along the arrangement direction of the multiple pairs of expansion pins.

4. The data acquisition station according to claim 3, characterized in that, The in-situ input pins and in-situ output pins, excluding the target in-situ input pin and the target in-situ output pin, are connected in a staggered manner, including: In the multiple pairs of extended pins, each in-situ output pin, except for the target in-situ input pin and the target in-situ output pin, is connected to the in-situ input pin of the adjacent address bit along the arrangement direction in a staggered manner.

5. The data acquisition station according to claim 1, characterized in that, The host is also equipped with multiple flag detection pins and a host-side flag detection circuit that is connected to each flag detection pin in a corresponding manner. Each level of the expansion dock is also equipped with multiple expansion dock end identifier detection circuits corresponding to the multiple identifier detection pins, and multiple pairs of identifier transmission pins corresponding one-to-one with the multiple expansion dock end identifier detection circuits. In each of the expansion docks, each pair of identifier transmission pins includes an identifier input pin and an identifier output pin. Each identifier input pin is coupled to the corresponding identifier detection circuit at the expansion dock end. A target identifier output pin is configured in one of the multiple pairs of identifier transmission pins. The identifier output pins in the multiple pairs of identifier transmission pins, except for the target identifier output pin, are connected to the identifier input pins in a staggered manner. The host and the first-level expansion dock are connected one-to-one through the multiple flag bit detection pins and the flag bit input pins of the multiple pairs of flag bit transmission pins. The two adjacent expansion docks are connected sequentially through the corresponding flag bit input pins and flag bit output pins.

6. The data acquisition station according to claim 5, characterized in that, In each level of the expansion dock, the target identifier output pin is located at the first and last address bits along the arrangement direction of the multiple pairs of identifier transmission pins.

7. The data acquisition station according to claim 6, characterized in that, The multiple pairs of flag bit transmission pins, excluding the target flag bit output pin, are connected to the flag bit input pins in a staggered manner, including: Each of the multiple pairs of flag bit transmission pins, except for the target flag bit output pin, is connected to the flag bit input pin of the adjacent address bit along the arrangement direction in a staggered manner.

8. The data acquisition station according to claim 5, characterized in that, Each level of the expansion dock is equipped with a control module, which is connected to multiple expansion dock end identifier detection circuits. The control module is used to detect the electrical signals in the multiple expansion dock end identifier detection circuits, determine the identifier of the expansion dock based on the electrical signals in the multiple expansion dock end identifier detection circuits, and report it to the host.

9. The data acquisition station according to claim 1, characterized in that, The plurality of in-situ detection pins are integrated into the first high-speed connector, the in-situ input pins of the plurality of pairs of expansion pins are integrated into the second high-speed connector, and the in-situ output pins of the plurality of pairs of expansion pins are integrated into the third high-speed connector. The host and the first-level expansion dock are aligned and plugged in through the first high-speed connector and the second high-speed connector, and the two adjacent expansion docks are aligned and plugged in through the second high-speed connector and the third high-speed connector.

10. The data acquisition station according to claim 1, characterized in that, The host-side presence detection circuit is a pull-up circuit, and the docking station-side presence detection circuit is a pull-down circuit.

Images