Package substrate and terminal device

Abstract

A packaging substrate comprises a first carrier plate, a second carrier plate, a third carrier plate, a first electronic component, a second electronic component and a third electronic component. The second carrier plate is provided with a through hole, and the second carrier plate is located on one side of the first carrier plate; the third carrier plate is located on the side, away from the first carrier plate, of the second carrier plate. The first electronic component is positioned on one side, facing the second carrier plate, of the first carrier plate; the second electronic component is located on one side, facing the second carrier plate, of the third carrier plate, and the first electronic component and / or the second electronic component are / is partially located in the through hole; the at least two third electronic components are located on the side, away from the second carrier plate, of the third carrier plate. The packaging substrate provided by the utility model is high in integration level. The utility model further provides terminal equipment.

Description

TECHNICAL FIELD

[0001] The present application relates to the packaging technical field, in particular to a packaging substrate and a terminal device. BACKGROUND

[0002] Different electronic components in the conventional packaging substrate are distributed on different carrier boards to realize different functions. However, the multiple electronic components distributed on different carrier boards and then connected with the main board respectively will increase the area of the main board and reduce the integration of the packaging substrate. CONTENT

[0003] Therefore, it is necessary to provide a packaging substrate with high integration to solve the above problems.

[0004] A packaging substrate includes a first carrier board, a second carrier board, a third carrier board, a first electronic component, a second electronic component and a third electronic component. The second carrier board is provided with a through hole, and the second carrier board is located on one side of the first carrier board; the third carrier board is located on a side of the second carrier board away from the first carrier board; the first electronic component is located on a side of the first carrier board facing the second carrier board; the second electronic component is located on a side of the third carrier board facing the second carrier board, and at least part of the first electronic component and / or the second electronic component is located in the through hole; and at least two third electronic components are located on a side of the third carrier board away from the second carrier board.

[0005] In a possible implementation of the present application, the first carrier board is provided with a first receiving groove, the first receiving groove and the through hole are in communication, and at least part of the first electronic component is received in the first receiving groove.

[0006] In a possible implementation of the present application, the third carrier board is provided with a second receiving groove, the second receiving groove and the through hole are in communication, and at least part of the second electronic component is received in the second receiving groove.

[0007] In a possible implementation of the present application, the projection area of each third electronic component in the first direction is less than the projection area of the first electronic component or the second electronic component in the first direction.

[0008] In a possible implementation of the present application, the first carrier board, the second carrier board and the third carrier board are arranged along the first direction, the third carrier board includes a first sub-carrier board and a second sub-carrier board arranged in layers, the second electronic component is connected to the first sub-carrier board, and the third electronic component is connected to the second sub-carrier board.

[0009] In a possible implementation of the present application, the packaging substrate further includes a first packaging layer, and the first packaging layer encapsulates the first electronic component and the second electronic component.

[0010] In a possible implementation of the present application, the packaging substrate further includes a second packaging layer, and the second packaging layer fills the space between the first carrier board and the third carrier board.

[0011] In a possible implementation of the present application, the packaging substrate further comprises a third packaging layer, the third packaging layer covers the third electronic element.

[0012] In a possible implementation of the present application, the packaging substrate further comprises a main plate, the main plate is located on the side of the first carrier plate away from the second carrier plate.

[0013] A terminal device, the terminal device comprises a packaging substrate and a shell, the packaging substrate is accommodated in the shell.

[0014] The packaging substrate provided by the embodiments of the present application can package multiple electronic elements in the same packaging substrate without increasing the projection area of the packaging substrate along the first direction, can realize the structure design of miniaturization of the packaging substrate, and improves the integration of the packaging substrate. BRIEF DESCRIPTION OF DRAWINGS

[0015] Figure 1 The cross-sectional schematic diagram of the packaging substrate provided by some embodiments of the present application is shown.

[0016] Figure 2 The cross-sectional schematic diagram of the packaging substrate provided by some embodiments of the present application is shown.

[0017] Figure 3 The structure schematic diagram of a terminal device provided by the embodiments of the present application is shown. DETAILED DESCRIPTION

[0018] In order to more clearly understand the above-mentioned purposes, features and advantages of the present application, the present application is described in detail below in combination with the drawings and specific embodiments. It should be noted that the embodiments of the present application and the features in the embodiments can be combined with each other without conflict. In the following description, a large number of specific details are described in order to fully understand the present application, and the described embodiments are only part of the embodiments of the present application, but not all the embodiments.

[0019] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present application belongs. The terms used in the specification of the present application are only for the purpose of describing the specific embodiments and are not intended to limit the present application. The term "and / or" used herein includes all and any combinations of one or more related listed items.

[0020] In the embodiments of the present application, for the convenience of description but not limitation of the present application, the term "connection" used in the patent application specification and claims of the present application is not limited to physical or mechanical connection, whether direct or indirect. "Up", "down", "above", "below", "left", "right" and the like are only used to indicate relative positional relationship, which changes accordingly when the absolute position of the described object changes.

[0021] Please refer to Figure 1 , Figure 1 A cross-sectional schematic view of a packaging substrate 100 is provided for some embodiments of the present application. The packaging substrate 100 can include a main board 10, a first carrier board 21, a second carrier board 22, a third carrier board 23, a first electronic element 31, a second electronic element 32, and at least two third electronic elements 33. The main board 10, the first carrier board 21, the second carrier board 22, and the third carrier board 23 are arranged in sequence along a first direction L1, i.e., the first carrier board 21 is located on one side of the main board 10, the second carrier board 22 is located on the side of the first carrier board 21 away from the main board 10, and the third carrier board 23 is located on the side of the second carrier board 22 away from the first carrier board 21. The second carrier board 22 is provided with a through hole 222, which penetrates the second carrier board 22 along the first direction L1, and the first carrier board 21 and the third carrier board 23 are exposed to the through hole 222.

[0022] The first electronic element 31 is located on the side of the first carrier board 21 facing the second carrier board 22, and the second electronic element 32 is located on the side of the third carrier board 23 facing the second carrier board 22. Part of the first electronic element 31 and / or the second electronic element 32 can be located in the through hole 222. The through hole 222 provided on the second carrier board 22 can form a clearance space for arranging the first electronic element 31 and / or the second electronic element 32, which is beneficial to reduce the thickness of the packaging substrate 100 along the first direction L1.

[0023] Each carrier board (i.e., the first carrier board 21, the second carrier board 22, or the third carrier board 23) can include a dielectric layer and a circuit layer, which are stacked. The electronic elements (i.e., the first electronic element 31, the second electronic element 32, or the third electronic element 33) are electrically connected to the corresponding carrier boards, respectively. Adjacent two carrier boards are electrically connected to each other, wherein the second carrier board 22 and the first carrier board 21 can be electrically connected through a first conductive body 51, and the second carrier board 22 and the third carrier board 23 can be electrically connected through a second conductive body 52.

[0024] The first carrier board 21 can be provided with a first receiving groove 212, which is in communication with the through hole 222, and at least part of the first electronic element 31 is received in the first receiving groove 212. The provision of the first receiving groove 212 is beneficial to further reduce the thickness of the packaging substrate 100 along the first direction L1.

[0025] Referring to Figure 2 , Figure 2 A cross-sectional view of the package substrate 100a is provided for other embodiments of the present application. The third carrier plate 23 can also have a second receiving groove 224 formed therein, the second receiving groove 224 being in communication with the through hole 222, and at least a portion of the second electronic component 32 being received in the second receiving groove 224. The provision of the second receiving groove 224 is advantageous in further reducing the thickness of the package substrate 100a along the first direction L1.

[0026] The types of the first electronic component 31, the second electronic component 32 and the third electronic component 33 are not limited. In some embodiments, the first electronic component 31 can be a central processing unit (CPU), the second electronic component 32 can be a double data rate (DDR) synchronous dynamic random access memory, and the third electronic component 33 can be an integrated circuit (IC), a resistor, an inductor, etc.

[0027] At least two third electronic components 33 are provided on the third carrier plate 23. Each third electronic component 33 has a projected area along the first direction L1 that is smaller than the projected area of the first electronic component 31 or the second electronic component 32 along the first direction L1. Therefore, the provision of multiple third electronic components 33 does not increase the projected area of the package substrate 100 along the first direction L1. When the number of third electronic components 33 is multiple, the multiple third electronic components 33 are spaced apart from each other.

[0028] Referring to Figure 1 or Figure 2 , the package substrate 100 can further include a first encapsulation layer 41 encapsulating the first electronic component 31 and the second electronic component 32. The first encapsulation layer 41 can encapsulate the first electronic component 31 on the first carrier plate 21 and encapsulate the second electronic component 32 on the third carrier plate 23. During the fabrication of the package substrate 100, the first encapsulation layer 41 serves to protect the first electronic component 31 and the second electronic component 32.

[0029] The package substrate 100 can further include a second encapsulation layer 42 filling the space between the first carrier plate 21 and the third carrier plate 23. The second encapsulation layer 42 fills a portion of the through hole 222 and covers the opposite surfaces of the second carrier plate 22. The second encapsulation layer 42 serves to connect the first carrier plate 21 and the second carrier plate 22 into a whole.

[0030] The package substrate 100 can further include a third encapsulation layer 43 covering the third electronic component 33 to fix the third electronic component 33 on the third carrier plate 23.

[0031] The third carrier plate 23 can include a first sub-carrier plate 232 and a second sub-carrier plate 234 stacked along the first direction L1, the first sub-carrier plate 232 is located on the side of the second sub-carrier plate 234 close to the second carrier plate 22, the second sub-carrier plate 234 is located on the side of the first sub-carrier plate 232 away from the second carrier plate 22, and the first sub-carrier plate 232 and the second sub-carrier plate 234 can be electrically connected through the third conductive body 53. The second electronic element 32 is connected to the first sub-carrier plate 232, and the third electronic element 33 is connected to the second sub-carrier plate 234. In the process of manufacturing the packaging substrate 100, the electronic elements and the corresponding carrier plates can be initially packaged first, and then packaged again with other structures, which is conducive to reducing the manufacturing difficulty.

[0032] Please refer to Figure 3 , Figure 3 A structure schematic diagram of a terminal device 200 is provided for the embodiments of the present application, and the terminal device 200 can include but is not limited to a mobile phone, a computer, a camera, a camera head, etc. The terminal device 200 includes a packaging substrate 100 (or 100a) and a shell 210, and the packaging substrate 100 (or 100a) is accommodated in the shell 210.

[0033] The packaging substrate 100 (or 100a) provided by the embodiments of the present application can package multiple electronic elements in the same packaging substrate 100 (or 100a) without increasing the projection area of the packaging substrate 100 (or 100a) along the first direction L1, and can realize the structure design of miniaturization of the packaging substrate 100 (or 100a) and improve the integration of the packaging substrate 100 (or 100a).

[0034] The above embodiments are only used to illustrate the technical solutions of the present application and not to limit it. Although the present application has been described in detail with reference to the above preferred embodiments, those skilled in the art should understand that the technical solutions of the present application can be modified or replaced without departing from the scope of the technical solutions of the present application.

Claims

1. A packaging substrate, characterized in that, include: First carrier plate; The second carrier plate has through holes and is located on one side of the first carrier plate; The third carrier plate is located on the side of the second carrier plate opposite to the first carrier plate; The first electronic component is located on the side of the first carrier plate facing the second carrier plate; The second electronic component is located on the side of the third carrier plate facing the second carrier plate, and a portion of the first electronic component and / or the second electronic component is located in the through hole; as well as At least two third electronic components are located on the side of the third carrier plate opposite to the second carrier plate.

2. The packaging substrate according to claim 1, characterized in that, The first carrier board has a first receiving groove, which is connected to the through hole, and at least a portion of the first electronic component is received in the first receiving groove.

3. The packaging substrate according to claim 1 or 2, characterized in that, The third carrier board has a second receiving slot, which is connected to the through hole, and at least a portion of the second electronic component is received in the second receiving slot.

4. The packaging substrate according to claim 1 or 2, characterized in that, The first carrier plate, the second carrier plate, and the third carrier plate are arranged along a first direction. The third carrier plate includes a first sub-carrier plate and a second sub-carrier plate stacked together. The second electronic component is connected to the first sub-carrier plate, and the third electronic component is connected to the second sub-carrier plate.

5. The packaging substrate according to claim 4, characterized in that, The projected area of ​​each of the third electronic components along the first direction is smaller than the projected area of ​​the first electronic component or the second electronic component along the first direction.

6. The packaging substrate according to claim 1 or 2, characterized in that, The packaging substrate further includes a first packaging layer, which encapsulates the first electronic component and the second electronic component.

7. The packaging substrate according to claim 6, characterized in that, The packaging substrate further includes a second packaging layer, which fills the space between the first carrier and the third carrier.

8. The packaging substrate according to claim 1 or 2, characterized in that, The packaging substrate further includes a third packaging layer that covers the third electronic component.

9. The packaging substrate according to claim 1 or 2, characterized in that, The packaging substrate also includes a motherboard, which is located on the side of the first carrier board away from the second carrier board.

10. A terminal device, characterized in that, The terminal device includes: The packaging substrate according to any one of claims 1-9; and The housing contains the encapsulation substrate.

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