Android board card for LED display screen

Abstract

The utility model discloses an Android board card for an LED display screen, which can convert an HDMI video signal into an MIPI DSI / CSI signal through the arrangement of an HDMI processing module and a second HDMI conversion sub-module, thereby improving the processing capability of the Android board card to the high-definition video signal. Therefore, the LED display screen can display clearer and finer pictures. Through the arrangement of the HDMI processing module and the first HDMI conversion sub-module, flexible switching of multiple paths of signal sources is realized, so that the requirements on the signal sources in different scenes are met, and the flexibility and practicability of the system are improved. And the audio coding and decoding module is arranged, so that analog-to-digital conversion and digital-to-analog conversion can be accurately carried out on audio signals, and accurate transmission and processing of the audio signals are ensured. The CPU master control module packages the processed audio and video signals into a format suitable for Ethernet transmission, and the processed audio and video signals are transmitted through the Ethernet signal receiving and transmitting module, so that the transmission efficiency of data is improved, and real-time updating and remote control of the data are realized.

Description

Technical Field

[0001] This utility model relates to the field of display screen technology, specifically to an Android board for LED displays. Background Technology

[0002] Android boards play a crucial role in LED displays, primarily responsible for processing video and audio data. The Android board sends video data to the LED display for showing, and simultaneously sends audio data to the amplifier module for playback.

[0003] Publication No. CN209625764U discloses an Android board and an LED display control system. The Android board includes an input interface, an output interface, and a Field-Programmable Gate Array (FPGA) module and a video processing module that are interconnected. The input interface and the output interface are respectively connected to the FPGA module. The FPGA module includes an FPGA processor for processing video data and an identification module for recognizing video data formats. When the identification module identifies video data as not being processed by the FPGA processor, the FPGA module transmits the video data to the video processing module for conversion to the type processed by the FPGA processor. Thus, the Android board achieves the processing and transmission of video data through the collaborative work of the FPGA module and the video processing module; it can also recognize the format of video data and convert non-FPGA-processed video data into a processable type through the video processing module, thereby expanding the functionality of the Android board and reducing equipment costs.

[0004] However, with the continuous development of multimedia technology, the demand for LED display output is increasing. Although Android boards can process video data, their processing capabilities are still insufficient in handling high-definition video and multi-channel signal switching, and they cannot efficiently process ultra-high-definition video content.

[0005] Therefore, overcoming the aforementioned shortcomings has become an important issue that urgently needs to be addressed by those skilled in the art. Utility Model Content

[0006] This invention overcomes the shortcomings of the above-mentioned technologies and provides an Android board for LED displays.

[0007] To achieve the above objectives, the present invention adopts the following technical solution:

[0008] An Android board for LED displays includes: a CPU main control module 1, an Ethernet signal transceiver module 2, a storage module 3, an HDMI processing module 4, an audio codec module 5, and a power supply module 6 for supplying power to each module.

[0009] The Ethernet signal transceiver module 2, storage module 3, HDMI processing module 4, and audio codec module 5 are all electrically connected to the CPU main control module 1.

[0010] The HDMI processing module 4 includes: a first HDMI conversion submodule 41 for receiving multiple HDMI video signals from external devices and selecting and switching the input multiple HDMI video signals into one for output; and a second HDMI conversion submodule 42 connected to the output of the first HDMI conversion submodule 41 for converting the selected HDMI video signal into a MIPIDS I / CS I signal; the second HDMI conversion submodule 42 transmits the processed video signal to the CPU main control module 1; the audio encoding and decoding module 5 is used to perform analog-to-digital conversion and digital-to-analog conversion on the received audio signal data and transmit it to the CPU main control module 1;

[0011] The CPU main control module 1 is used to encapsulate the processed audio / video signals into a format suitable for Ethernet transmission and send them to the Ethernet signal transceiver module 2. The storage module 3 is used to realize data storage and facilitate data retrieval.

[0012] Preferably, the first HDMI conversion submodule 41 includes: multiple HDMI input interface circuits 411 for receiving multiple HDMI video signals from external devices, an HDMI switching circuit 412 connected to the multiple HDMI input interface circuits 411 for selecting and switching the multiple input HDMI video signals into one, and an HDMI output circuit 413 for receiving the video signal converted by the HDMI switching circuit 412.

[0013] Preferably, the HDMI switching circuit 412 includes: an HDMI switcher chip U1 of model LT8641UXE and its peripheral circuits.

[0014] Preferably, each HDMI input interface circuit 411 includes: an HDMI input interface 4110, wherein an ESD protection circuit 414 is connected between the HDMI input interface 4110 and the HDMI switching circuit 412; the ESD protection circuit 414 includes one or more ESD diodes D1.

[0015] Preferably, the HDMI switcher chip U1 is provided with a first data transmission terminal T1 for transmitting a data clock signal and a second data transmission terminal T2 for transmitting a serial data signal; the HDMI output circuit 413 includes: a pin integrated circuit 4131, a first power conversion circuit 4132, a second power conversion circuit 4133, and a controlled switch circuit 4134.

[0016] The pin integrated circuit 4131 has multiple output pins connected to the second HDMI conversion submodule 42; the first power conversion circuit 4132 includes: multiple surface-mount ferrite beads 41320 connected in parallel and respectively connected to the first output terminal of the power module 6, and a first capacitor C4288 and a second capacitor C4289 connected between the first output terminal of the power module 6 and ground; the second power conversion circuit 4133 includes: multiple first inductors 41330 connected in parallel and respectively connected to the second output terminal of the power module 6, and a third capacitor C4291, a fourth capacitor C4292 and a fifth capacitor C4293 connected between the first output terminal of the power module 6 and ground;

[0017] The controlled switch circuit 4134 includes: a first controlled switch Q1124 connected between the first data transmission terminal T1, the output terminal of the power module 6 and the input terminal of the second HDMI conversion submodule 42, and a second controlled switch Q1125 connected between the second data transmission terminal T2, the output terminal of the power module 6 and the input terminal of the second HDMI conversion submodule 42.

[0018] Preferably, the second HDMI conversion submodule 42 includes: an HDMI receiving circuit 421 for receiving the HDMI video signal output by the first HDMI conversion submodule 41, and an HDMI conversion circuit 422 connected to the HDMI receiving circuit 421 for converting the received HDMI signal into MIP IDS I / MIP ICS I signals; the HDMI conversion circuit 422 is connected to the CPU main control module 1; the HDMI conversion circuit 422 uses a bridge chip U2 of model LT6911UXE, the bridge chip U2 has two MIP I transmitting ports, and each MIP I transmitting port has multiple signal output terminals for outputting MIP IDS I / CS I signals.

[0019] Preferably, the CPU main control module 1 uses a processor chip with the chip model RK3588.

[0020] Preferably, the CPU main control module 1 is also connected to a USB interface module 7 and a WIFI module 8; the USB interface module 7 is used to realize serial communication between an external PC and the CPU main control module 1; the WIFI module 8 is used to receive wireless network signals and transmit them to the CPU main control module 1.

[0021] Preferably, the audio codec module 5 includes: a microphone amplifier circuit 51 for receiving audio signals from a signal source output by an external device; an audio conversion circuit 52 connected to the CPU main control module 1 for performing analog-to-digital conversion and digital-to-analog conversion on the received audio signal data; an earphone amplifier circuit 53 for receiving the converted audio signal and amplifying it for output to an external earphone or speaker; and a backup input circuit 54 for receiving audio signals from another signal source output by an external device; the audio conversion circuit 52 includes an audio interface chip U4 of model ES8388 and its peripheral circuits.

[0022] Preferably, the RK3588 processor chip includes: a PCIe interface circuit 11, an HDMI input interface circuit 12 connected to the output terminal of the second HDMI conversion submodule 42, an HDMI output interface circuit 13 for outputting the packaged video, and a functional interface circuit 14; the functional interface circuit 14 is provided with a data transmission port P3 connected to the audio codec module 5.

[0023] Compared with the prior art, the beneficial effects of this utility model are:

[0024] 1. The Android board in this case significantly improves its high-definition video processing capabilities and the flexibility of multi-signal switching by employing a high-performance CPU main control module such as the RK3588 processor and dedicated HDMI processing modules including the LT8641UXE and LT6911UXE chips. This improvement enables the Android board to efficiently process ultra-high-definition video content and meet the needs of flexible signal source switching in complex application scenarios, thereby improving the output quality of the LED display and the user experience; thus enhancing the high-definition video processing and multi-signal switching capabilities of the Android board in this case.

[0025] 2. The Android board in this case integrates an Ethernet transceiver module and a Wi-Fi module. Combined with the CPU's processing power, it achieves efficient and stable wired and wireless network communication. This improvement enables the Android board to receive and send data in real time, communicate with remote devices or servers, realize real-time data updates and remote control, thereby enhancing the network communication capabilities of this case.

[0026] 3. The audio codec module in this case uses the ES8388 chip, achieving high-fidelity audio acquisition and processing. This improvement not only enhances the transmission and processing quality of audio signals but also enables the Android board to handle audio signals from different sources, meeting the stringent audio quality requirements of multimedia applications and thus optimizing the audio processing capabilities of this case. Simultaneously, the optimized audio processing capabilities also provide strong support for the multimedia playback functions of the LED display screen, enhancing the overall user experience. Attached Figure Description

[0027] Figure 1 This is a schematic block diagram of the Android board in this case.

[0028] Figure 2 This is the circuit diagram of the HDMI input interface circuit in this case.

[0029] Figure 3 This is the circuit diagram of the ESD protection circuit in this case.

[0030] Figure 4 This is the circuit diagram of the HDMI switching circuit in this case.

[0031] Figure 5 This is the circuit diagram of the HDMI output circuit in this case.

[0032] Figure 6 This is the circuit diagram of the HDMI receiver circuit in this case.

[0033] Figure 7 This is the circuit diagram of the HDMI conversion circuit in this case.

[0034] Figure 8 This is a circuit diagram of the PCIe interface section of the CPU main control module in this case.

[0035] Figure 9 This is a circuit diagram of the HDMI input interface section of the CPU main control module in this case.

[0036] Figure 10 This is the circuit diagram of the HDMI output interface section of the CPU main control module in this case.

[0037] Figure 11 This is the circuit diagram of the functional interface section of this case.

[0038] Figure 12 This is the circuit diagram of the audio codec module in this case. Detailed Implementation

[0039] The following embodiments further illustrate the features of this utility model and other related features in detail, so as to facilitate understanding by those skilled in the art:

[0040] like Figures 1 to 12 As shown, the Android board used for the LED display screen in this embodiment mainly consists of the following modules:

[0041] CPU Main Control Module 1: As the core of the system, it is responsible for overall control and data processing. The CPU main control module has high flexibility and programmability, and can efficiently process complex audio and video data.

[0042] Ethernet transceiver module 2: Used to receive and send Ethernet signals to achieve remote data transmission. This enables the Android board to communicate with remote devices or servers, achieving real-time data updates and remote control. In specific implementations, the Ethernet transceiver module 2 generally includes: an RJ45 interface, a coupling transformer, an Ethernet transceiver, etc., preferably using an Ethernet transceiver with chip model RTL8211F-CG.

[0043] Storage Module 3: Used to store audio and video data, configuration files, and other relevant information. The high-speed read and write capabilities of this storage module ensure rapid data retrieval and processing.

[0044] HDMI processing module 4 includes a first HDMI conversion submodule 41 and a second HDMI conversion submodule 42. The first HDMI conversion submodule is responsible for receiving multiple HDMI video signals from external devices and selecting and switching them to one output signal as needed. The second HDMI conversion submodule converts the selected HDMI video signal into a MIP IDS I / CS I signal for processing by the CPU main control module.

[0045] Audio codec module 5: Responsible for performing analog-to-digital and digital-to-analog conversions on the received audio signal data, and then transmitting it to the CPU main control module for processing. This ensures the accurate transmission and processing of audio signals.

[0046] Power module 6: Provides a stable power supply for the entire system, ensuring the normal operation of each module.

[0047] In practice, multiple video signals are input to the HDMI processing module via the external device port. The first HDMI conversion submodule selects and switches between the multiple input HDMI video signals, choosing one as the current output. The second HDMI conversion submodule converts the selected HDMI video signal into a MIP IDS I / CS I signal and transmits it to the CPU main control module. Simultaneously, the audio codec module performs analog-to-digital and digital-to-analog conversion on the received audio signal data and transmits it to the CPU main control module. The CPU main control module processes the received audio and video signals and encapsulates them into a format suitable for Ethernet transmission. The processed audio and video signals are then sent to remote devices or LED displays for display and playback via the Ethernet transceiver module. The storage module stores and processes temporary data during the process for quick retrieval and processing.

[0048] As described above, this invention, through the introduction of an HDMI processing module and its second HDMI conversion submodule, can convert HDMI video signals into MIP IDS I / CS I signals, greatly improving the Android board's ability to process high-definition video signals. This enables the LED display to show clearer and more detailed images. The first HDMI conversion submodule of the HDMI processing module can receive and switch multiple HDMI video signals, enabling flexible switching between multiple signal sources, thus meeting the signal source requirements in different scenarios and improving the system's flexibility and practicality. The audio codec module accurately performs analog-to-digital and digital-to-analog conversion on audio signals, ensuring accurate transmission and processing. The CPU main control module encapsulates the processed audio and video signals into a format suitable for Ethernet transmission and transmits them through the Ethernet signal transceiver module, thereby improving data transmission efficiency and enabling real-time data updates and remote control. Furthermore, this invention uses a CPU main control module instead of an FPGA module because the CPU main control module is better able to handle various complex audio and video data and general tasks, meeting the diverse needs of the LED display.

[0049] like Figures 2-4 As shown, in one specific implementation, the first HDMI conversion submodule 41 includes: multiple HDMI input interface circuits 411 for receiving multiple HDMI video signals from external devices; an HDMI switching circuit 412 connected to the multiple HDMI input interface circuits 411 for selecting and switching the multiple input HDMI video signals into one; and an HDMI output circuit 413 for receiving the video signal converted by the HDMI switching circuit 412. The HDMI switching circuit 412 includes an HDMI switcher chip U1 of model LT8641UXE and its peripheral circuitry. Each HDMI input interface circuit 411 includes an HDMI input interface 4110, and an ESD protection circuit 414 is connected between the HDMI input interface 4110 and the HDMI switching circuit 412; the ESD protection circuit 414 includes one or more ESD diodes 4140.

[0050] As described above, by setting up multiple HDMI input interface circuits 411, this submodule can receive multiple HDMI video signals from external devices. Using an HDMI switcher chip U1 (model LT8641UXE) and its peripheral circuitry, the switching function for multiple signals is implemented, improving the system's integration and reliability. Each HDMI input interface circuit 411 is equipped with an ESD protection circuit 414, which includes one or more ESD diodes 4140, effectively preventing damage to the circuit caused by electrostatic discharge (ESD) and improving the system's stability and durability.

[0051] like Figure 5 As shown, in one specific implementation, the HDMI switcher chip U1 is provided with a first data transmission terminal T1 for transmitting a data clock signal and a second data transmission terminal T2 for transmitting a serial data signal; the HDMI output circuit 413 includes: a pin integrated circuit 4131, a first power conversion circuit 4132, a second power conversion circuit 4133, and a controlled switch circuit 4134.

[0052] The pin integrated circuit 4131 has multiple output pins connected to the second HDMI conversion submodule 42; the first power conversion circuit 4132 includes: multiple surface-mount ferrite beads 41320 connected in parallel and respectively connected to the first output terminal of the power module 6, and a first capacitor C4288 and a second capacitor C4289 connected between the first output terminal of the power module 6 and ground; the second power conversion circuit 4133 includes: multiple first inductors 41330 connected in parallel and respectively connected to the second output terminal of the power module 6, and a third capacitor C4291, a fourth capacitor C4292 and a fifth capacitor C4293 connected between the first output terminal of the power module 6 and ground;

[0053] The controlled switching circuit 4134 includes: a first controlled switch Q1124 connected between the first data transmission terminal T1, the output terminal of the power module 6, and the input terminal of the second HDMI conversion submodule 42; and a second controlled switch Q1125 connected between the second data transmission terminal T2, the output terminal of the power module 6, and the input terminal of the second HDMI conversion submodule 42. In a specific implementation, the power module 6 is a standard power supply circuit, with its first output terminal outputting 1.2V and its second output terminal outputting 3.3V.

[0054] As described above, the HDMI switcher chip U1 is designed with a first data transmission terminal T1 for transmitting data clock signals and a second data transmission terminal T2 for transmitting serial data signals, ensuring clear separation of data transmission, helping to reduce signal interference, and improving the reliability and stability of data transmission. The first power conversion circuit 4132 and the second power conversion circuit 4133 in the HDMI output circuit 413 achieve effective power management and filtering through parallel-connected surface-mount beads and a first inductor, as well as multiple capacitors connected to the output terminal of the power module 6, helping to reduce power noise and improve power stability and efficiency. The controlled switch circuit 4134 includes a first controlled switch Q1124 and a second controlled switch Q1125, and their connections between the first data transmission terminal T1 and the second data transmission terminal T2 and the second HDMI conversion submodule 42, respectively, to facilitate precise control of data transmission, enabling rapid switching of the HDMI signal source when needed, while reducing unnecessary power consumption. By integrating the HDMI switcher chip U1 and the HDMI output circuit 413, the system achieves higher integration, helping to reduce board space and manufacturing costs. At the same time, this design also provides the possibility for future expansion of the system, such as supporting higher resolution or more channels of video transmission by adding more HDMI conversion sub-modules or improving the design of the data transmission end, which is conducive to efficient processing of ultra-high-definition video content in the future.

[0055] like Figure 6 As shown, in one specific implementation, the second HDMI conversion submodule 42 includes: an HDMI receiving circuit 421 for receiving the HDMI video signal output by the first HDMI conversion submodule 41, and an HDMI conversion circuit 422 connected to the HDMI receiving circuit 421 for converting the received HDMI signal into MIPI CSI / MIPI CSI signals; the HDMI conversion circuit 422 is connected to the CPU main control module 1; the HDMI conversion circuit 422 uses a bridge chip U2 of model LT6911UXE. The HDMI receiving circuit 421 includes at least a plurality of resistors (such as R3961-R3968) connected in parallel between the output terminal of the HDMI output circuit 413 and the input terminal of the bridge chip U2, to serve as impedance matching and circuit protection. The bridge chip U2 has two MIPI transmission ports, such as... Figure 6The first MIPI transmitter port is P1, and the second transmitter port is P2. Each MIPI transmitter port has multiple signal output terminals for outputting MIPI 1 / CS 1 signals (such as MIPI_CSIO_RX_D1N, MIPI_CSIO_RX_D1P, etc.). This allows the second HDMI conversion submodule 42 to support output from two MIPI transmitter ports. A single transmitter port supports up to 4K@30Hz, and when both transmitter ports operate simultaneously, they support resolutions up to 4K@60Hz, meeting the requirements for high-resolution, high-refresh-rate displays. Furthermore, this design utilizes the high-performance LT6911UXE bridge chip, a high-performance HDMI 2.0 to MIPI 1 / CS 1 converter, giving the second HDMI conversion submodule 42 better flexibility and scalability.

[0056] like Figures 8-11 As shown in the diagram, in one specific implementation, the CPU main control module 1 uses a processor chip with the model number RK3588. The RK3588 processor chip is divided into a PC IE interface circuit 11, an HDMI input interface circuit 12 connected to the two MIPI transmit ports of the HDMI conversion circuit 422, an HDMI output interface circuit 13 for outputting the packaged video, and a functional interface circuit 14. The functional interface circuit 14 has a data transmission port P3 connected to the audio codec module 5, including data transmission ports P3: I2C7_SDA_M0_CODEC and I2C7_SCL_M0_CODEC. Specifically, the PC IE interface is a high-speed serial computer expansion bus standard. Furthermore, PC IE supports multi-channel configuration, allowing selection of different channel numbers and bandwidths to meet the needs of different devices. When multiple high-definition video source signals are input through the interface device, the RK3588, in conjunction with the LT8641UXE and LT6911UXE chips, selects, switches, and processes the input HDMI video signals. The processed signal is further encapsulated by the RK3588 and forwarded to the HDMI output port and audio port in a suitable format to achieve ultra-high-definition video and audio output.

[0057] As described above, the CPU main control module 1 uses an RK3588 CPU processor chip. On one hand, the multi-channel configuration of the PCIe interface significantly improves the data transmission rate, meeting the data transmission speed requirements of high-performance applications. On the other hand, it can work in conjunction with the HDMI processing module to achieve high-definition video output from multiple signals, meeting the needs of complex application scenarios. The functional interface circuit has a data transmission port connected to the audio codec module, realizing the transmission and processing of audio data.

[0058] like Figure 1 As shown, the CPU main control module 1 is also connected to a USB interface module 7 and a WIFI module 8; the USB interface module 7 is used to realize serial communication between the external PC and the CPU main control module 1; the WIFI module 8 is used to receive wireless network signals and transmit them to the CPU main control module 1. Thus, by integrating the Wi-Fi module and combining it with the CPU's processing power, efficient and stable wireless network communication is achieved.

[0059] like Figure 12 As shown, the audio codec module 5 includes: a microphone amplifier circuit 51 for receiving audio signals from a signal source output by an external device; an audio conversion circuit 52 connected to the CPU main control module 1 for performing analog-to-digital (ADC) and digital-to-analog (DAC) conversions on the received audio signal data; a headphone amplifier circuit 53 for receiving the converted audio signals, amplifying them, and outputting them to external headphones or speakers; and a backup input circuit 54 for receiving audio signals from another signal source output by an external device. The audio conversion circuit 52 includes an ES8388 audio interface chip U4 and its peripheral circuits. In specific implementation, the external audio signal is input through the microphone amplifier circuit 51, amplified by the microphone amplifier, and then converted from analog to digital by the ADC of the audio conversion circuit 52. These digital audio signals are then transmitted to the CPU main control module 1 for processing or storage. The CPU main control module 1 then transmits the digital audio signals back to the audio conversion circuit 52. These digital audio signals are converted from analog to digital by the DAC of the audio conversion circuit 52. Finally, these analog audio signals are amplified by the headphone amplifier circuit 53 and output to headphones or speakers. Meanwhile, when there are multiple audio signal sources, they can be input and processed through the backup input circuit 54.

[0060] As described above, the audio codec module 5 integrates a microphone amplifier circuit 51, an audio conversion circuit 52, a headphone amplifier circuit 53, and a backup input circuit 54, realizing multiple functions such as audio signal reception, conversion, amplification, and backup input, thus improving the system's integration and flexibility. Furthermore, the use of the ES8388 audio interface chip U4 and its peripheral circuits ensures that the audio conversion circuit 52 has high-quality analog-to-digital converter (ADC) and digital-to-analog converter (DAC) performance, accurately converting analog audio signals to digital audio signals and then restoring them to analog audio signals, thereby guaranteeing the fidelity and clarity of the audio signal. Moreover, the module supports receiving audio signals from the microphone amplifier circuit 51 and the backup input circuit 54, enabling the system to process audio signals from different signal sources.

[0061] In summary, the CPU main control module 1 in this case adopts the RK3588 processor, supporting image processing up to 48M pixels and 4K high-definition video processing, significantly improving the device's image and video processing capabilities. The first HDMI conversion submodule 41 uses the LT8641UXE chip, and the second HDMI conversion submodule 42 uses the LT6911UXE chip, realizing the input, switching, and processing of multiple HDMI signals, supporting resolutions up to 4K@60Hz, meeting high-end display requirements. By integrating an Ethernet signal transceiver module and a Wi-Fi module, combined with the CPU's processing power, efficient and stable wired and wireless network communication is achieved. The audio codec module 5 uses the ES8388 chip, realizing high-fidelity audio acquisition and processing functions. Thus, this Android board achieves powerful image processing capabilities, supporting image processing up to 48M pixels, providing efficient video codec capabilities, supporting 4K high-definition video processing, meeting the high computing power requirements of various scenarios, and suitable for multiple application areas such as smart cockpits, smart screens, and AR / VR.

[0062] As stated above, this case protects an Android board for LED displays, and all technical solutions that are the same as or similar to this case should be considered to fall within the scope of protection of this case.

Claims

1. An Android board for an LED display screen, characterized in that, include: The CPU main control module (1), Ethernet signal transceiver module (2), storage module (3), HDMI processing module (4), audio codec module (5), and power supply module (6) for powering each module; The Ethernet signal transceiver module (2), storage module (3), HDMI processing module (4), and audio encoding / decoding module (5) are all electrically connected to the CPU main control module (1); The HDMI processing module (4) includes: a first HDMI conversion submodule (41) for receiving multiple HDMI video signals from external devices and selecting and switching the multiple HDMI video signals into one for output; and a second HDMI conversion submodule (42) connected to the output of the first HDMI conversion submodule (41) for converting the selected HDMI video signal into a MIPIDSI / CSI signal; the second HDMI conversion submodule (42) transmits the processed video signal to the CPU main control module (1); the audio encoding and decoding module (5) is used to perform analog-to-digital conversion and digital-to-analog conversion on the received audio signal data and transmit it to the CPU main control module (1); The CPU main control module (1) is used to encapsulate the processed audio / video signals into a format suitable for Ethernet transmission and send them to the Ethernet signal transceiver module (2). The storage module (3) is used to realize data storage and facilitate data retrieval.

2. The Android board for an LED display screen according to claim 1, characterized in that, The first HDMI conversion submodule (41) includes: multiple HDMI input interface circuits (411) for receiving multiple HDMI video signals from external devices, an HDMI switching circuit (412) connected to the multiple HDMI input interface circuits (411) for selecting and switching multiple input HDMI video signals into one, and an HDMI output circuit (413) for receiving the video signal converted by the HDMI switching circuit (412).

3. The Android board for an LED display screen according to claim 2, characterized in that, The HDMI switching circuit (412) includes: an HDMI switcher chip U1 of model LT8641 UXE and its peripheral circuits.

4. The Android board for an LED display screen according to claim 2, characterized in that, Each HDMI input interface circuit (411) includes: an HDMI input interface (4110), wherein an ESD protection circuit (414) is connected between the HDMI input interface (4110) and the HDMI switching circuit (412); the ESD protection circuit (414) includes one or more ESD diodes (D1).

5. The Android board for an LED display screen according to claim 3, characterized in that, The HDMI switcher chip U1 is provided with a first data transmission terminal (T1) for transmitting data clock signals and a second data transmission terminal (T2) for transmitting serial data signals; The HDMI output circuit (413) includes: a pin integrated circuit (4131), a first power conversion circuit (4132), a second power conversion circuit (4133), and a controlled switch circuit (4134); The pin integrated circuit (4131) is provided with multiple output pins connected to the second HDMI conversion submodule (42); the first power conversion circuit (4132) includes: multiple surface-mount ferrite beads (41320) connected in parallel and respectively connected to the first output terminal of the power module (6), and a first capacitor (C4288) and a second capacitor (C4289) connected between the first output terminal of the power module (6) and ground; the second power conversion circuit (4133) includes: multiple first inductors (41330) connected in parallel and respectively connected to the second output terminal of the power module (6), and a third capacitor (C4291), a fourth capacitor (C4292), and a fifth capacitor (C4293) connected between the first output terminal of the power module (6) and ground; The controlled switch circuit (4134) includes: a first controlled switch (Q1124) connected between the first data transmission terminal (T1), the output terminal of the power module (6) and the input terminal of the second HDMI conversion submodule (42), and a second controlled switch (Q1125) connected between the second data transmission terminal (T2), the output terminal of the power module (6) and the input terminal of the second HDMI conversion submodule (42).

6. An Android board for an LED display screen according to any one of claims 2-5, characterized in that, The second HDMI conversion submodule (42) includes: an HDMI receiving circuit (421) for receiving the HDMI video signal output by the first HDMI conversion submodule (41), and an HDMI conversion circuit (422) connected to the HDMI receiving circuit (421) for converting the received HDMI signal into MIPIDSI / MIPI CSI signals; the HDMI conversion circuit (422) is connected to the CPU main control module (1); the HDMI conversion circuit (422) uses a bridge chip U2 of model LT6911 UXE, the bridge chip U2 is provided with two MIPI transmission ports, and each MIPI transmission port is provided with multiple signal output terminals for outputting MIPIDSI / CSI signals.

7. An Android board for an LED display screen according to claim 1, characterized in that, The CPU main control module (1) uses a CPU processor chip with the chip model RK3588.

8. The Android board for an LED display screen according to claim 1, characterized in that, The CPU main control module (1) is also connected to a USB interface module (7) and a WIFI module (8); the USB interface module (7) is used to realize serial communication between the external PC and the CPU main control module (1); the WIFI module (8) is used to receive wireless network signals and transmit them to the CPU main control module (1).

9. An Android board for an LED display screen according to claim 7, characterized in that, The audio codec module (5) includes: a microphone amplifier circuit (51) for receiving audio signals from a signal source output by an external device; an audio conversion circuit (52) connected to the CPU main control module (1) for performing analog-to-digital conversion and digital-to-analog conversion on the received audio signal data; an earphone amplifier circuit (53) for receiving the converted audio signal and amplifying it for outputting it to an external earphone or speaker; and a backup input circuit (54) for receiving audio signals from another signal source output by an external device. The audio conversion circuit (52) includes an audio interface chip (U4) of model ES8388 and its peripheral circuits.

10. An Android board for an LED display screen according to claim 9, characterized in that, The CPU processor chip of the RK3588 includes: a PCIE interface circuit (11), an HDMI input interface circuit (12) connected to the output end of the second HDMI conversion submodule (42), an HDMI output interface circuit (13) for outputting the packaged video, and a function interface circuit (14); the function interface circuit (14) is provided with a data transmission port (P3) connected to the audio codec module (5).

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