Power device

Abstract

The utility model discloses a power device. The power device comprises a substrate, a plurality of wafers located on the substrate, a plurality of power pins and a plurality of signal pins, wherein the power pins and the signal pins are electrically connected to the substrate. The plurality of power pins are arranged on one side of the substrate, and the plurality of signal pins are arranged on the other side of the substrate. Therefore, a certain distance is kept between the signal pins of the power device and the power pins, and the power pins are prevented from influencing electric signals of the signal pins.

Description

Technical Field

[0001] This application relates to the field of power electronics technology, and in particular to a power device and its application. Background Technology

[0002] Power devices are fundamental components in the field of power electronics, also known as power electronic devices, and are capable of handling high voltage and high current. Early power devices were mainly used in the power control circuits of electrical equipment.

[0003] Power devices can be classified in many different ways. For example, based on the controlled state of their conduction and turn-off, they can be divided into uncontrollable and controllable power devices. Based on the type of control signal, they can be divided into current-driven and voltage-driven power devices. And based on the different semiconductor materials used, they can be divided into silicon-based power devices, SiC power devices, GaN power devices, and so on. Among these, controllable power devices are widely used in the industry due to their controllability and ability to handle high voltage and high current. To adapt to different circuit and process requirements, controllable power devices have developed into many different types, such as thyristors, metal-oxide-semiconductor field-effect transistors (MOSFETs), insulated-gate bipolar transistors (IGBTs), and junction field-effect transistors (JFETs).

[0004] In existing power device products, power devices are typically packaged into small-sized products, containing a single or few power transistor chips, resulting in a simple structure and low integration. In practical applications, especially high-current applications, multiple power devices need to be mounted onto a substrate (e.g., a Printed Circuit Board), which is complex and time-consuming. Furthermore, the electrical parameters of multiple independently packaged power devices differ, leading to deviations during operation and potentially damaging the devices. Additionally, the need for spacing between multiple independently packaged power devices occupies a significant area on the substrate. Utility Model Content

[0005] This application provides a power device that integrates multiple power transistor chips into a single package using a large-size package, replacing multiple small-package devices and reducing installation complexity and cost. Furthermore, the single device package eliminates the differences between multiple small-package products. By rationally arranging the chips and auxiliary components within the power device package, the chip's heat dissipation capability is improved, and the package size is reduced. In addition, the power pins and signal pins of the power device are distributed on different sides of the power device, maintaining a certain distance between them to prevent the power pins from interfering with the electrical signals on the signal pins.

[0006] According to one embodiment of the present invention, a power device is provided, comprising: a substrate; a plurality of chips disposed on the substrate; a plurality of power pins electrically connected to the substrate; and a plurality of signal pins electrically connected to the substrate; wherein the plurality of power pins are disposed on a first side of the substrate, and the plurality of signal pins are disposed on a second side of the substrate, the first side and the second side being opposite to each other.

[0007] According to one embodiment of the present invention, a power device is provided, comprising: a substrate; a plurality of chips disposed on the substrate; a plurality of power pins electrically connected to the substrate; and a plurality of signal pins electrically connected to the substrate; wherein the plurality of power pins and the plurality of signal pins are disposed on different sides of the substrate.

[0008] According to one embodiment of the present invention, a portion of the plurality of power pins of the aforementioned power device is disposed on a first side of the substrate, another portion of the plurality of power pins is disposed on a second side of the substrate, a portion of the plurality of signal pins is disposed on a third side of the substrate, and another portion of the plurality of signal pins is disposed on a fourth side of the substrate, wherein the first side is opposite to the second side, and the third side is opposite to the fourth side.

[0009] According to one embodiment of the present invention, a portion of the plurality of power pins of the aforementioned power device is disposed on a first side of the substrate, another portion of the plurality of power pins is disposed on a second side of the substrate, a portion of the plurality of signal pins is disposed on a third side of the substrate, and another portion of the plurality of signal pins is disposed on a fourth side of the substrate, wherein the first side is opposite to the third side, and the second side is opposite to the fourth side.

[0010] According to one embodiment of the present invention, the plurality of power pins of the aforementioned power device are disposed on a first side of the substrate, and the plurality of signal pins are disposed on a second side, a third side and a fourth side of the substrate.

[0011] According to one embodiment of the present invention, the plurality of signal pins of the aforementioned power device are disposed on the first side of the substrate, and the plurality of power pins are disposed on the second, third and fourth sides of the substrate.

[0012] According to one embodiment of the present invention, the four corners of the substrate of the aforementioned power device are respectively hard-connected to at least four of the plurality of power pins and the plurality of signal pins.

[0013] According to an embodiment of the present invention, the aforementioned power device includes a plurality of power pins, including a first power pin, a second power pin, a third power pin, a fourth power pin, and a fifth power pin; the plurality of signal pins include a first control pin, a second control pin, a third control pin, a fourth control pin, a fifth control pin, a sixth control pin, a first switch pin, a second switch pin, a third switch pin, a fourth switch pin, a fifth switch pin, and a sixth switch pin; wherein the plurality of wafers include: a first power unit, including a first terminal, a second terminal, and a control terminal, wherein the first terminal is electrically connected to the first power pin, the second terminal is electrically connected to the first switch pin and the third power pin, and the control terminal is electrically connected to the first control pin; a second power unit, including a first terminal, a second terminal, and a control terminal, wherein the first terminal is electrically connected to the first switch pin and the third power pin, the second terminal is electrically connected to the second power pin and the second switch pin, and the control terminal is electrically connected to... A third power unit, comprising a first terminal, a second terminal, and a control terminal, wherein the first terminal is electrically connected to the first power pin, the second terminal is electrically connected to the third switch pin and the fourth power pin, and the control terminal is electrically connected to the third control pin; a fourth power unit, comprising a first terminal, a second terminal, and a control terminal, wherein the first terminal is electrically connected to the third switch pin and the fourth power pin, the second terminal is electrically connected to the second power pin and the fourth switch pin, and the control terminal is electrically connected to the fourth control pin; a fifth power unit, comprising a first terminal, a second terminal, and a control terminal, wherein the first terminal is electrically connected to the first power pin, the second terminal is electrically connected to the fifth switch pin and the fifth power pin, and the control terminal is electrically connected to the fifth control pin; and a sixth power unit, comprising a first terminal, a second terminal, and a control terminal, wherein the first terminal is electrically connected to the fifth switch pin and the fifth power pin, the second terminal is electrically connected to the second power pin and the sixth switch pin, and the control terminal is electrically connected to the sixth control pin.

[0014] According to one embodiment of the present invention, at least one of the plurality of power pins and plurality of signal pins of the aforementioned power device has a first portion and a second portion in a direction perpendicular to the substrate, wherein the first portion is close to the end of the corresponding pin, the second portion is close to the substrate, and the width of the first portion is smaller than the width of the second portion. Attached Figure Description

[0015] The above and other objects, features and advantages of this application will become clearer from the following description of embodiments with reference to the accompanying drawings:

[0016] Figure 1 This is a schematic diagram of the circuit structure of the DC / AC converter circuit 100;

[0017] Figure 2 This is a schematic diagram of a power device 200 according to an embodiment of this application;

[0018] Figure 3 This is a schematic diagram of the circuit structure of another DC / AC converter circuit 300;

[0019] Figure 4 This is a schematic diagram of the internal structure of a power device 400 package according to an embodiment of this application;

[0020] Figure 5 This is a schematic diagram of a power device 500 according to an embodiment of this application;

[0021] Figure 6 This is a schematic diagram of a power device 600 according to an embodiment of this application;

[0022] Figure 7 This is a schematic diagram of a power device 700 according to an embodiment of this application. The power device 700 may correspond to... Figure 1 or Figure 3 The circuit shown;

[0023] Figure 8 This is a schematic diagram of the package of a power device 800 according to an embodiment of this application;

[0024] Figure 9 This is a schematic diagram of the package of a power device 900 according to an embodiment of this application;

[0025] Figure 10 This is a schematic diagram of the package of a power device 1000 according to an embodiment of this application;

[0026] Figure 11 This is a schematic diagram of the package of a power device 1100 according to an embodiment of this application;

[0027] Figure 12 This is a schematic diagram of the package of a power device 1200 according to an embodiment of this application;

[0028] Figure 13 This is a schematic diagram of the package of a power device 1300 according to an embodiment of this application;

[0029] Figure 14 This is a schematic diagram of the package of a power device 1400 according to an embodiment of this application;

[0030] Figure 15 This is a schematic diagram of the package of a power device 1500 according to an embodiment of this application. Detailed Implementation

[0031] The specific embodiments of this utility model will be described in detail below. It should be noted that the embodiments described herein are for illustrative purposes only and are not intended to limit the utility model. In the following description, numerous specific details are set forth in order to provide a thorough understanding of this utility model. However, it will be apparent to those skilled in the art that these specific details are not necessary to implement this utility model. In other instances, well-known circuits, materials, or methods have not been specifically described in order to avoid obscuring the utility model.

[0032] The terms "first," "second," etc., used in the following description are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature specified with "first," "second," etc., may explicitly or implicitly include one or more of that feature. In the description of this application, unless otherwise stated, "multiple" means two or more.

[0033] Furthermore, in this application, directional terms such as "upper" and "lower" may be defined relative to the orientation in which the components are schematically placed in the accompanying drawings. It should be understood that these directional terms can be relative concepts, used for relative description and clarification, and can change accordingly depending on the orientation in which the components are placed in the accompanying drawings.

[0034] In this application, unless otherwise expressly specified and limited, the term "connection" should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral part; it can be a direct connection or an indirect connection through an intermediate medium. Furthermore, the term "coupled" can refer to a method of electrical connection for signal transmission. "Coupled" can be a direct electrical connection or an indirect electrical connection through an intermediate medium.

[0035] To make the application of power devices more flexible, the power device packaging provided in this application embodiment is relatively flexible, which facilitates wiring and layout on the circuit board in actual application.

[0036] This application does not specifically limit the application scenarios of power devices. For example, they can be applied to power systems, such as photovoltaic power generation systems, wind power systems, or energy storage systems. They can also be applied to electric vehicle charging piles, electric vehicle chargers, or motor drives, such as the charging circuit inside a charging pile. A typical charging circuit includes a power converter, which may include DC / DC conversion circuits and AC / DC conversion circuits (rectifier circuits). These conversion circuits generally include power devices. Additionally, they can be applied to power supplies for data centers or artificial intelligence (AI) applications.

[0037] Furthermore, the embodiments of this application do not specifically limit the number of power transistors included in the power device. For example, it may include two power transistors, or it may include more power transistors. The number of power transistors in the power device can be set according to the actual application scenario. For example, the power device may include a power transistor corresponding to a half-bridge circuit, a power transistor corresponding to a full-bridge circuit, or multiple power transistors corresponding to a multi-phase circuit. A half-bridge circuit corresponds to at least two power transistors, and a full-bridge circuit corresponds to at least four power transistors.

[0038] To help those skilled in the art better understand the technical solutions provided in the embodiments of this application, the following description uses a DC / AC converter circuit (rectifier circuit) as an example.

[0039] Figure 1 The internal circuitry of the power device will be illustrated using a DC / AC converter circuit 100 as an example. The DC / AC converter circuit 100 includes three half-bridge circuits, such as... Figure 1 As shown. Switches M1 and M2 are connected in series to form a half-bridge circuit; switches M3 and M4 are connected in series to form a half-bridge circuit; and switches M5 and M6 are connected in series to form a half-bridge circuit. One end of each half-bridge circuit is connected to the first power terminal P, and the other end is connected to the second power terminal N. Switches M1-M6 are packaged together as a single unit, i.e., a power device. It should be understood that each half-bridge circuit may also include two diodes, or may include a combination of a diode and a controllable transistor.

[0040] exist Figure 1 In the circuit, switches M1-M6 include devices such as MOSFETs, IGBTs, and JFETs. Figure 1 In this paper, switches M1-M6 are MOSFETs as an example to illustrate the embodiments of this application.

[0041] Each switch has a first terminal, a second terminal, and a control terminal. The first terminal of switch M1 is coupled to the first power terminal P; the second terminal of switch M1 is coupled to the first terminal of switch M2; and the second terminal of switch M2 is coupled to the second power terminal N. The first terminal of switch M3 is coupled to the first power terminal P; the second terminal of switch M3 is coupled to the first terminal of switch M4; and the second terminal of switch M4 is coupled to the second power terminal N. The first terminal of switch M5 is coupled to the first power terminal P; the second terminal of switch M5 is coupled to the first terminal of switch M6; and the second terminal of switch M6 is coupled to the second power terminal N. The control terminals of switches M1-M6 respectively receive control signals from external circuits or devices. The on / off state of switches M1-M6 depends on the control signals they receive. The connection point of switches M1 and M2 is coupled to the first output terminal 1. The connection point of switches M3 and M4 is coupled to the second output terminal 2. The connection point of switches M5 and M6 is coupled to the third output terminal 3.

[0042] Figure 2 This is a schematic diagram of a power device 200 according to an embodiment of this application. Figure 2 As shown, the power device 200 includes a substrate 202 and a plurality of wafers distributed on the substrate 202. Figure 2 (Not shown in the diagram) Multiple power pins P1-P5 and multiple control pins S1-S16. The substrate 202, the multiple power pins P1-P5, and the multiple control pins S1-S16 are encapsulated in a housing 201. The housing 201 includes common packaging structures such as plastic encapsulation. The multiple power pins P1-P5 are distributed on a first side of the substrate 202, and the multiple signal pins S1-S16 are distributed on a second side of the substrate, with the first and second sides opposite each other.

[0043] Power pins P1-P5 are respectively connected to Figure 1 The DC / AC converter circuit 100 shown has a first power terminal P, a second power terminal N, a first output terminal 1, a second output terminal 2, and a third output terminal 3.

[0044] All or at least some of the signal pins S1-S16 are respectively connected to Figure 1 The control terminals and second terminals of switches M1-M6 in the DC / AC converter circuit 100 shown.

[0045] It should be understood that the number of power pins P1-P5 and signal pins S1-S16 is not fixed. The internal circuitry of different power devices, as well as the circuit layout on the wafer and substrate packaged within different power devices, will affect the number and distribution of power pins P1-P5 and signal pins S1-S16.

[0046] The multiple chips on the substrate 202 correspond to Figure 1 The switches M1-M6 in the DC / AC converter circuit 100 shown.

[0047] Figure 3 This is a schematic diagram of the circuit structure of another DC / AC converter circuit 300. (Compared to...) Figure 1 compared to, Figure 3 Resistors R1 and C1 are connected in series between the first power terminal P and the second power terminal N for filtering and voltage regulation. In addition, the DC / AC converter circuit 300 also includes a thermistor RT. The thermistor RT has a negative temperature coefficient (NTC), and the signal across the thermistor RT characterizes the temperature at the location of the thermistor RT.

[0048] Figure 4 This is a schematic diagram of the internal structure of a power device 400 package according to an embodiment of this application. Figure 4 As shown, the power device 400 includes a substrate 402, multiple chips distributed on the substrate 402, multiple power pins P, N and 1-3, multiple control pins S1-S6, G1-G6, and temperature detection pins T1 and T2. Figure 4 The diagram clearly shows the internal structure of the power device 400, but the outer casing of the power device 400 is not shown in the figure.

[0049] The internal components and connections of the power device 400 correspond to Figure 3 The DC / AC converter circuit 300 is shown. To correspond the pins of the power device 400 with the terminals of the DC / AC converter circuit 300 for understanding the contents of this application, the pin names of the power device 400 are the same as the names of the corresponding terminals of the DC / AC converter circuit 300.

[0050] like Figure 4 As shown, multiple chips of the power device 400 are located on a substrate 402. The substrate 402 is a DBC (Direct Bonding Copper) substrate, including an insulating layer and a copper layer covering the insulating layer. This application does not specifically limit the specific implementation of the substrate; it is only for the convenience of description and to help those skilled in the art understand the implementation scheme. This application uses a DBC substrate as an example for illustration.

[0051] The power device 400 comprises multiple chips including a first power unit A1, a second power unit A2, a third power unit A3, a fourth power unit A4, a fifth power unit A5, and a sixth power unit A6. Figure 4In this embodiment, each power unit includes two power transistors connected in parallel, meaning the control terminals of the two power transistors are connected together, the first terminals are connected together, and the second terminals are also connected together, together forming a power unit with a larger current capability. In other embodiments, depending on the current capability requirements of the application, each power unit may include two or more power transistors connected in parallel or in series, or it may include only one power transistor.

[0052] exist Figure 4 In the embodiment, power units A1-A6 respectively correspond to Figure 3 Switches M1-M6 are included. Each power unit includes a first terminal, a second terminal, and a control terminal. The first terminal of the first power unit A1 is electrically connected to the first power pin P (corresponding to...). Figure 3 The first power unit A1 is shown below. Its second terminal is electrically connected to the first switch pin S1 and the third power pin 1, and its control terminal is electrically connected to the first control pin G1. The second power unit A2 has its first terminal electrically connected to the first switch pin S1 and the third power pin 1, its second terminal electrically connected to the second power pin N and the second switch pin S2, and its control terminal electrically connected to the second control pin G2. The third power unit A3 has its first terminal electrically connected to the first power pin P, its second terminal electrically connected to the third switch pin S3 and the fourth power pin 2, and its control terminal electrically connected to the third control pin G3. The fourth power unit A4 has its first terminal electrically connected to the third switch pin S3 and the fourth power pin 2, its second terminal electrically connected to the second power pin N and the fourth switch pin S4, and its control terminal electrically connected to the fourth control pin G4. The fifth power unit A5 has its first terminal electrically connected to the first power pin P, its second terminal electrically connected to the fifth switch pin S5 and the fifth power pin 3, and its control terminal electrically connected to the fifth control pin G5. The first terminal of the sixth power unit is electrically connected to the fifth switch pin S5 and the fifth power pin 3, the second terminal is electrically connected to the second power pin N and the sixth switch pin S6, and the control terminal is electrically connected to the sixth control pin G6.

[0053] exist Figure 4 In this embodiment, the plurality of wafers also include a capacitor C1 and a resistor R1, respectively corresponding to Figure 3 The circuit contains capacitor C1 and resistor R1. Figure 4 In the circuit, one end of capacitor C1 is connected to the first power pin P via substrate 402, and the other end is connected to one end of resistor R1 via substrate 402. One end of resistor R1 is then connected to the second power pin N via substrate 402. It should be understood that the positions of capacitor C1 and resistor R1 are interchangeable.

[0054] exist Figure 4In this embodiment, the multiple chips also include a thermistor RT. One end of the thermistor RT is connected to a first temperature detection pin T1 via a substrate 402, and the other end is connected to a second temperature detection pin T2 via a substrate 402. An external circuit or system can obtain the internal temperature of the power device 400 by detecting the signals, such as voltages, on the first temperature detection pin T1 and the second temperature detection pin T2.

[0055] exist Figure 4 In this embodiment, all the chips are conductors, and the substrate surface is covered with a copper layer, which is also a conductor. Therefore, the multiple chips, including multiple power transistors, capacitors, resistors, and thermistors, can be directly soldered onto the DBC substrate. To avoid short circuits between chips, insulating tape is required to isolate the chips from each other; therefore, the copper layer on the substrate can be laid out according to the application requirements.

[0056] Power pins P, N, 1, 2, and 3, and signal pins D1, D2, S1-S6, G1-G6, T1, and T2 are all electrically connected to the DBC substrate 402. Figure 4 In this embodiment, the substrate 402 is rectangular, and its four corners are rigidly connected to the adjacent pins for support and stability. A rigid connection means that the metal tabs of the pins are directly soldered to the copper layer of the corresponding location on the substrate. Alternatively, the pins can be connected to the substrate via an additional fixing structure (e.g., an additional metal tab), fixing the substrate and pins in place and preventing movement. Figure 4 Specifically, the metal plates of the first temperature detection pin T1 and the redundant pin D1, and the metal plates of the first power pin P and the fifth power pin 3 are directly soldered to the copper layer of the substrate 402, forming a hard connection structure with the substrate 402. The remaining pins are electrically connected to the copper layer at the corresponding positions on the substrate by wire bonding. It should be understood that the hard connection between the pins and the substrate is not mandatory, and the hard connection between the pins and the substrate is not necessarily at the four corners of the substrate. The position of the hard connection can be set as needed. For example, it can be in the middle of each side of the substrate, or when the substrate is long, the hard connection can be set at the four corners of the substrate and the middle of the long side. Alternatively, if conditions permit, each pin on the side of the substrate can form a hard connection structure with the substrate to achieve a more stable structure.

[0057] exist Figure 4 In this configuration, signal pins D1 and D2 constitute redundant pins, which are electrically connected to the first power pin P via the DBC substrate 402. Depending on the arrangement of the internal wafers and the distribution of external pins in the power device, these redundant pins may appear anywhere on the side of the substrate, or they may not be present at all. Those skilled in the art can electrically connect the redundant pins to a specific potential or leave them floating as needed.

[0058] Power pins P, N, and 1-3 are located on the first side of the DBC substrate 402, while signal pins are located on the second side of the DBC substrate 402. The first and second sides are opposite each other. When the signal pins and power pins are on different sides, a certain distance is maintained between the high-current and / or high-voltage power pins and the low-current and / or low-voltage signal pins, thereby preventing signal interference at the signal pins.

[0059] Figure 5 This is a schematic diagram of a power device 500 according to an embodiment of this application. The devices and connections inside the power device 500 may correspond to... Figure 1 or Figure 3 The circuit shown. (As shown) Figure 5 As shown, power pins P1 and P2 are disposed on the first side of the substrate, power pins P3, P4, and P5 are disposed on the second side of the substrate, signal pins S1-S8 are disposed on the third side of the substrate, and signal pins S9-S16 are disposed on the fourth side of the substrate. The first side, the second side, and the third side are adjacent to each other and opposite to the fourth side. The second side is adjacent to the first side and the fourth side and opposite to the third side.

[0060] Figure 6 This is a schematic diagram of a power device 600 according to an embodiment of this application. The devices and connections inside the power device 600 may correspond to... Figure 1 or Figure 3 The circuit shown. (As shown) Figure 6 As shown, power pins P1-P5 are located on one side of the substrate, and signal pins S1-S16 are located on the other three sides of the substrate.

[0061] Figure 7 This is a schematic diagram of a power device 700 according to an embodiment of this application. The devices and connections inside the power device 700 may correspond to... Figure 1 or Figure 3 The circuit shown. (As shown) Figure 7 As shown, signal pins S1-S16 are located on one side of the substrate, and power pins P1-P5 are located on the other three sides of the substrate.

[0062] Under normal circumstances, the current flowing through the power pin is greater than that through the signal pin. Therefore, the power pin needs to have a greater current-carrying capacity than the signal pin. Consequently, the width of the power pin can be greater than that of the signal pin.

[0063] As can be seen from the illustrations of the embodiments of this application, the width of power pins P1-P5 is greater than the width of signal pins S1-S16.

[0064] Generally, all power pins and all signal pins can have the same width. However, the dimensions of power pins and signal pins can differ. This application does not specifically limit the dimensions of each pin; for example, the dimensions can be selected based on the current carrying capacity of the actual application scenario. Furthermore, the spacing between pins is not specifically limited and can be set according to the specific scenario.

[0065] To enable those skilled in the art to better understand the technical solutions provided in the embodiments of this application, several common forms of device package pins will be described below with reference to the accompanying drawings. The following figures can all be considered as... Figure 2 A sectional view.

[0066] Figure 8 This is a schematic diagram of the package of a power device 800 according to an embodiment of this application. Figure 8 As shown, the power device 800 includes a housing 801, a substrate 802, multiple chips 803, and multiple pins 804. The multiple chips 803 are disposed on the substrate 802 and electrically connected to corresponding pins of the multiple pins 804 via leads or direct connections. The multiple pins 804 are distributed on both sides of the substrate 802 and can be divided into power pins and signal pins. Figure 8 In the middle, the power device 800 is a small outline package (SOJ): the component has leads on both sides, and the leads are bent towards the bottom of the component, that is, J-type leads.

[0067] The substrate 802 includes an insulating layer 802a, a first metal layer 802b, and a second metal layer 802c. The first metal layer 802b and the second metal layer 802c cover the upper and lower surfaces of the insulating layer 802a. The first metal layer 802b is exposed on the first surface 801a of the housing 801, serving as a heat dissipation surface for the power device 800. A chip 803 is placed on the second metal layer 802c for electrical connections between chips 803 and with pins 804. When the power device 800 is placed on a PCB board or other substrate, the pins 804 are inserted into and / or soldered to the PCB board or other substrate. The second surface 801b is close to or even adheres to the PCB board or other substrate. The first metal layer 802b, i.e., the heat dissipation surface, is away from the PCB board or other substrate, and a heat sink may also be provided on it for heat dissipation of the power device 800.

[0068] Figure 9 This is a schematic diagram of the package of a power device 900 according to an embodiment of this application. Figure 9 As shown, the power device 900 includes a housing 901, a substrate 802, a chip 803, and pins 804. Figure 9In an embodiment, the housing 901 includes a first surface 901a and a second surface 901b. A heat dissipation surface 901c is provided on the first surface 901a, which is made of a heat dissipation material and is adhered to the first metal layer 802b of the substrate 802, thereby achieving the effect of heat dissipation. The second surface 901b is an insulating layer.

[0069] Figure 10 It is a schematic diagram of the package of the power device 1000 according to an embodiment of the present application. As Figure 10 shown, the power device 1000 includes a housing 801, a substrate 802, a plurality of wafers 803, and a plurality of pins 1004. Compared with Figure 8 the package of the power device 800 shown, the power device 1000 is a small outline package (SOP, Small outline Package), and the pins 1004 open outward, which is generally called gull-wing pins. The power device 1000 uses the housing 801, and the metal layer 802b of the substrate 802 is used as the heat dissipation surface. It should be understood that the power device 1000 can also use Figure 9 the housing 901 in

[0070] Figure 11 It is a schematic diagram of the package of the power device 1100 according to an embodiment of the present application. As Figure 11 shown, the power device 1100 includes a housing 801, a substrate 802, a wafer 803, and pins 1104. Compared with Figure 8 the package of the power device 800 shown, the power device 1100 is a quad flat package (QFP, Quad Flat Package): there are pins on all four sides of the component, and the pin welding surface is located at the bottom of the power device 1100. The power device 1100 uses the housing 801, and the metal layer 802b of the substrate 802 is used as the heat dissipation surface. It should be understood that the power device 1100 can also use Figure 9 the housing 901 in

[0071] Figure 12 It is a schematic diagram of the package of the power device 1200 according to an embodiment of the present application. As Figure 12 shown, the power device 1200 includes a housing 801, a substrate 802, a plurality of wafers 803, and a plurality of pins 1204. Compared with Figure 8 the package of the power device 800 shown, the power device 1200 is a plastic leadless chip carrier (PLCC, Plastic Leadless ChipCarrier): there are pins on all four sides of the component, and the component pins bend towards the bottom of the component. The power device 1200 uses the housing 801, and the metal layer 802b of the substrate 802 is used as the heat dissipation surface. It should be understood that the power device 1200 can also use Figure 9 The outer casing 901 encapsulates the substrate 802 within the outer casing 901.

[0072] Figure 13 This is a schematic diagram of the package of a power device 1300 according to an embodiment of this application. Figure 13 As shown, the power device 1300 includes a housing 801, a substrate 802, multiple chips 803, and multiple pins 804. (The last sentence appears to be incomplete and possibly refers to a different device.) Figure 8 Compared to the package of power device 800, the pin orientation of power device 1300 is reversed. This results in the heat dissipation surface of power device 1300 being close to the PCB board when placed in an application environment, such as when mounted on a PCB, for heat dissipation. Power device 1300 uses a housing 801, while the metal layer 802b of the substrate 802 serves as the heat dissipation surface. It should be understood that power device 1300 can also use... Figure 9 The outer casing 901 completely encapsulates the substrate 802 within the outer casing 901.

[0073] Figure 14 This is a schematic diagram of the package of a power device 1400 according to an embodiment of this application. Figure 14 As shown, the power device 1400 includes a housing 801, a substrate 802, multiple chips 803, and multiple pins 1004. (The last sentence appears to be incomplete and possibly refers to a different device.) Figure 10 Compared to the package of power device 1000, the pin orientation of power device 1400 is reversed. This results in the heat dissipation surface of power device 1400 being close to the PCB board when placed in an application environment, such as when mounted on a PCB board, for heat dissipation. Power device 1400 uses a housing 801, while the metal layer 802b of the substrate 802 serves as the heat dissipation surface. It should be understood that power device 1400 can also use... Figure 9 The outer casing 901 encapsulates the substrate 802 within the outer casing 901.

[0074] Figure 15 This is a schematic diagram of the package of a power device 1500 according to an embodiment of this application. Figure 15As shown, the power device 1500 includes multiple power pins P1-P4 and multiple signal pins S1-S7. The power pins P1-P4 and signal pins S1-S7 extend from both sides of the substrate, i.e., both sides of the package, and bend perpendicular to the substrate. When the power device 1500 is placed on the PCB board, each pin is inserted into the corresponding hole on the PCB board, and then fixed in place by soldering or other fixing methods. To make the connection between the power device 1500 and the PCB board more stable and prevent shaking, each pin has a certain locking design. As shown in the figure, the portion of power pin P1 perpendicular to the plane of the substrate or package shell is divided into a first part P1-a and a second part P1-b, where the first part P1-a is at the end of the pin and is narrower than the second part P1-b. The other power pins P2-4 are treated similarly. In this way, when the pins are inserted into the holes on the PCB board, they can be locked in the holes, preventing the power device from moving. Similarly, on one side of signal pins S1-S7, both signal pins S1 and S7 at both ends of the device side are designed with locking mechanisms. That is, signal S1 includes a first part S1-a and a second part S1-b. The first part S1-a is located at the end of the pin and is narrower than the second part S1-b. Signal pin S7 is treated in the same way. Figure 15 In this embodiment, not all signal pins are configured with slots. In other embodiments, pin slots can be configured according to the application requirements.

[0075] In one possible implementation, to make the power device's packaging more flexible, the power pins and signal pins can take different pin configurations. That is, at least some of the power pins can have different configurations than at least some of the signal pins. All power pins and all signal pins can have different configurations, some power pins and all signal pins can have the same configuration, or some power pins and some signal pins can have the same configuration but some are different.

[0076] Power devices generate heat during operation, requiring heat dissipation. These devices are typically mounted on heat sinks to dissipate the heat, which is usually cooled by air or water. Heat sinks generally need to be insulated from the internal components of the power device. In practical applications, heat sinks can be attached to the heat-dissipating surface of the power device.

[0077] It should be noted that, regardless of whether the heat dissipation surface provided in the above embodiments is located at the bottom or the top, the heat dissipation surface is insulated from the inside of the package.

[0078] The above surface mount packaging method is relatively simple to implement and easy to process.

[0079] Furthermore, if the power device provided in the above embodiments is large enough, in addition to integrating a temperature sensor, other detection circuits, such as a current detection circuit, can also be integrated to achieve overcurrent protection. For example, a drive circuit can also be integrated internally. This application does not specifically limit the other circuits that can be integrated inside the power device; these can be set according to the overall size of the power device and its internal chips.

[0080] The above-described package can have pins in multiple directions, i.e., at least two directions. The power devices provided in this application can internally package different types and combinations of semiconductor wafers. The internal connection method is not limited; for example, they can be connected in series, in parallel, or as independent units. Furthermore, depending on the chip size, the package can integrate temperature detection or drive circuitry, etc. The pins can be surface-mount, through-hole, or a combination of at least two different pin types. Specifically, the size, number, and attributes of the pins can be configured according to the internal topology and manufacturing process.

[0081] Based on the power device provided in the above embodiments, this application also provides an inverter module. The inverter module may include a power converter, wherein the power converter may include the power device described in the above embodiments.

[0082] It should be understood that in this application, "at least one (item)" means one or more, and "more than" means two or more. "And / or" is used to describe the relationship between related objects, indicating that three relationships can exist. For example, "A and / or B" can represent three cases: only A exists, only B exists, and both A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0083] The above description is merely a preferred embodiment of this application and is not intended to limit the application in any way. Although this application has disclosed preferred embodiments above, it is not intended to limit the application. Any person skilled in the art can make many possible variations and modifications to the technical solutions of this application using the methods and techniques disclosed above, or modify them into equivalent embodiments with equivalent changes, without departing from the scope of the technical solutions of this application. Therefore, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of this application without departing from the content of the technical solutions of this application shall still fall within the protection scope of the technical solutions of this application.

Claims

1. A power device, comprising: substrate; Multiple wafers are placed on the substrate; Multiple power pins are electrically connected to the substrate; as well as Multiple signal pins are electrically connected to the substrate; The plurality of power pins are disposed on a first side of the substrate, and the plurality of signal pins are disposed on a second side of the substrate, with the first side and the second side facing each other.

2. The power device as claimed in claim 1, wherein on the side of the substrate where the power pin is provided, at least one metal piece of the power pin is directly connected to the substrate by soldering.

3. The power device as claimed in claim 1, wherein on the side of the substrate where the signal pins are provided, at least one metal piece of the signal pin is directly connected to the substrate by soldering.

4. The power device as claimed in claim 1, wherein the power pin includes a first power pin and a fifth power pin, and the metal plates of the first power pin and the fifth power pin are directly soldered to the copper layer of the substrate to form a hard connection structure with the substrate.

5. The power device as claimed in claim 1, wherein the signal pin includes a first temperature detection pin and a redundant pin, and the metal plates of the first temperature detection pin and the redundant pin are directly soldered to the copper layer of the substrate, forming a hard connection with the substrate.

6. The power device as claimed in claim 1, wherein, In a direction perpendicular to the substrate, at least one power pin has a first portion and a second portion, wherein the first portion is near the end of the power pin, the second portion is near the substrate, and the width of the first portion is smaller than the width of the second portion.

7. The power device as claimed in claim 1, wherein, In a direction perpendicular to the substrate, at least one signal pin has a first portion and a second portion, wherein the first portion is close to the end of the signal pin, the second portion is close to the substrate, and the width of the first portion is smaller than the width of the second portion.

8. The power device according to any one of claims 1-7, wherein: The plurality of power pins includes a first power pin, a second power pin, a third power pin, a fourth power pin, and a fifth power pin; The plurality of signal pins include a first control pin, a second control pin, a third control pin, a fourth control pin, a fifth control pin, a sixth control pin, a first switch pin, a second switch pin, a third switch pin, a fourth switch pin, a fifth switch pin, and a sixth switch pin; The plurality of wafers include: The first power unit includes a first terminal, a second terminal and a control terminal. The first terminal is electrically connected to a first power pin, the second terminal is electrically connected to a first switch pin and a third power pin, and the control terminal is electrically connected to a first control pin. The second power unit includes a first terminal, a second terminal, and a control terminal. The first terminal is electrically connected to a first switch pin and a third power pin, the second terminal is electrically connected to a second power pin and a second switch pin, and the control terminal is electrically connected to a second control pin. The third power unit includes a first terminal, a second terminal, and a control terminal. The first terminal is electrically connected to a first power pin, the second terminal is electrically connected to a third switch pin and a fourth power pin, and the control terminal is electrically connected to a third control pin. The fourth power unit includes a first terminal, a second terminal, and a control terminal. The first terminal is electrically connected to the third switch pin and the fourth power pin, the second terminal is electrically connected to the second power pin and the fourth switch pin, and the control terminal is electrically connected to the fourth control pin. The fifth power unit includes a first terminal, a second terminal, and a control terminal. The first terminal is electrically connected to a first power pin, the second terminal is electrically connected to a fifth switch pin and a fifth power pin, and the control terminal is electrically connected to a fifth control pin. The sixth power unit includes a first terminal, a second terminal, and a control terminal. The first terminal is electrically connected to the fifth switch pin and the fifth power pin, the second terminal is electrically connected to the second power pin and the sixth switch pin, and the control terminal is electrically connected to the sixth control pin.

9. The power device of claim 8, wherein each of the plurality of first power units to the sixth power unit includes at least one power transistor, and when each power unit includes two or more power transistors, the first ends of the two or more power transistors are connected together to form the first end of the corresponding power unit, the second ends of the two or more power transistors are connected together to form the second end of the corresponding power unit, and the control ends of the two or more power transistors are connected together to form the control end of the corresponding power unit.

10. The power device of claim 8, wherein the plurality of chips further comprises a resistor and a capacitor connected in series between a first power pin and a second power pin.

11. The power device of claim 8, wherein the plurality of signal pins further includes two redundant pins, the two redundant pins being electrically connected to the first power pin via the substrate.

12. The power device of claim 8, wherein The plurality of wafers also include a thermistor; and The plurality of signal pins also include a first temperature detection pin and a second temperature detection pin, which are electrically connected to the two ends of the thermistor, respectively.

13. The power device of claim 12, wherein, The metal tab of the first temperature detection pin is directly connected to the substrate by soldering.

14. The power device of claim 8, further comprising a housing that encapsulates the substrate.

15. The power device of claim 14, wherein the substrate includes an insulating layer, a first metal layer is coated on a first surface of the insulating layer, a second metal layer is coated on a second surface of the insulating layer, the first metal layer is exposed on the housing surface, and the second metal layer is used for electrical connections between a plurality of power pins, a plurality of signal pins, and a plurality of chips.

16. A power device, comprising: substrate; Multiple wafers are placed on the substrate; Multiple power pins are electrically connected to the substrate; as well as Multiple signal pins are electrically connected to the substrate; The plurality of power pins and the plurality of signal pins are disposed on different sides of the substrate.

17. The power device of claim 16, wherein, The plurality of power pins are disposed on the first side of the substrate, and the plurality of signal pins are disposed on the second side of the substrate, with the first side and the second side of the substrate facing each other.

18. The power device of claim 16, wherein, A portion of the plurality of power pins is disposed on a first side of the substrate, another portion of the plurality of power pins is disposed on a second side of the substrate, a portion of the plurality of signal pins is disposed on a third side of the substrate, and another portion of the plurality of signal pins is disposed on a fourth side of the substrate, wherein the first side is opposite to the second side, and the third side is opposite to the fourth side.

19. The power device of claim 16, wherein, A portion of the plurality of power pins is disposed on a first side of the substrate, another portion of the plurality of power pins is disposed on a second side of the substrate, a portion of the plurality of signal pins is disposed on a third side of the substrate, and another portion of the plurality of signal pins is disposed on a fourth side of the substrate, wherein the first side is opposite to the third side, and the second side is opposite to the fourth side.

20. The power device of claim 16, wherein, The plurality of power pins are disposed on the first side of the substrate, and the plurality of signal pins are disposed on the second, third and fourth sides of the substrate.

21. The power device of claim 16, wherein, The plurality of signal pins are disposed on the first side of the substrate, and the plurality of power pins are disposed on the second, third and fourth sides of the substrate.

22. The power device of claim 16, wherein, The four corners of the substrate are hard-connected to at least four of the plurality of power pins and the plurality of signal pins, respectively.

23. The power device of claim 16, wherein, At least one of the plurality of power pins and the plurality of signal pins has a first portion and a second portion in a direction perpendicular to the substrate, wherein the first portion is close to the end of the corresponding pin, the second portion is close to the substrate, and the width of the first portion is smaller than the width of the second portion.

24. The power device according to any one of claims 16-23, further comprising a housing that encapsulates the substrate.

25. The power device of claim 24, wherein the housing includes opposing first and second surfaces, one of the first and second surfaces having a heat dissipation surface and the other surface being an insulating layer surface.

26. The power device of claim 25, wherein the substrate includes an insulating layer, a first metal layer is coated on a first surface of the insulating layer, a second metal layer is coated on a second surface of the insulating layer, the first metal layer is exposed on the surface of the housing and serves as a heat dissipation surface on the second surface of the housing, and the second metal layer is used for electrical connections between a plurality of power pins, a plurality of signal pins, and a plurality of chips.

27. The power device of claim 25, wherein the substrate includes an insulating layer, a first metal layer is coated on a first surface of the insulating layer, a second metal layer is coated on a second surface of the insulating layer, the first metal layer is in contact with a heat dissipation surface on a second surface of the housing, and the second metal layer is used for electrical connections between a plurality of power pins, a plurality of signal pins, and a plurality of chips.

28. The power device of claim 24, wherein the package comprises any of the following forms: Small Outline Package (SOP), J-Lead Small Outline Package (SOJ), Square Flat Package (QFP), Plastic Chip Carrier with Leads (PLCC), and Through-Through Package.

29. The power device of claim 24, wherein: The plurality of power pins includes a first power pin, a second power pin, a third power pin, a fourth power pin, and a fifth power pin; The plurality of signal pins include a first control pin, a second control pin, a third control pin, a fourth control pin, a fifth control pin, a sixth control pin, a first switch pin, a second switch pin, a third switch pin, a fourth switch pin, a fifth switch pin, and a sixth switch pin; The plurality of wafers include: The first power unit includes a first terminal, a second terminal and a control terminal. The first terminal is electrically connected to a first power pin, the second terminal is electrically connected to a first switch pin and a third power pin, and the control terminal is electrically connected to a first control pin. The second power unit includes a first terminal, a second terminal, and a control terminal. The first terminal is electrically connected to a first switch pin and a third power pin, the second terminal is electrically connected to a second power pin and a second switch pin, and the control terminal is electrically connected to a second control pin. The third power unit includes a first terminal, a second terminal, and a control terminal. The first terminal is electrically connected to a first power pin, the second terminal is electrically connected to a third switch pin and a fourth power pin, and the control terminal is electrically connected to a third control pin. The fourth power unit includes a first terminal, a second terminal, and a control terminal. The first terminal is electrically connected to the third switch pin and the fourth power pin, the second terminal is electrically connected to the second power pin and the fourth switch pin, and the control terminal is electrically connected to the fourth control pin. The fifth power unit includes a first terminal, a second terminal, and a control terminal. The first terminal is electrically connected to a first power pin, the second terminal is electrically connected to a fifth switch pin and a fifth power pin, and the control terminal is electrically connected to a fifth control pin. The sixth power unit includes a first terminal, a second terminal, and a control terminal. The first terminal is electrically connected to the fifth switch pin and the fifth power pin, the second terminal is electrically connected to the second power pin and the sixth switch pin, and the control terminal is electrically connected to the sixth control pin.

30. The power device of claim 29, wherein the plurality of chips further comprises a resistor and a capacitor connected in series between a first power pin and a second power pin.

31. The power device of claim 29, wherein... The plurality of wafers also include a thermistor; and The plurality of signal pins include a first temperature detection pin and a second temperature detection pin, which are respectively connected to the two ends of the thermistor.

Images