Detection circuit with wide dynamic range power

Abstract

The utility model discloses a wide dynamic range power detection circuit, which relates to the field of radio communication detection circuits, aims to obtain a wide range and high precision detection circuit, and adopts the technical scheme that the wide dynamic range power detection circuit comprises a coupling circuit, the coupling circuit is connected with a detected signal, the output end of the coupling circuit is connected with an amplifying circuit and then connected with a filter circuit, and the amplifying circuit is connected with the filter circuit. A main path of the coupling circuit is in direct connection with a signal output end; the rear end of the filter circuit is connected with a level detection circuit, the level detection circuit adopts a logarithmic amplification level conversion circuit, the rear end of the level detection circuit is connected with a microprocessor with an ADC (Analog to Digital Converter) port, and the microprocessor is connected with a display screen. After the detected signal is coupled, amplified and filtered, the precision and accuracy of the detected signal can be better ensured, so that the precision meeting the requirement can be obtained while a wide dynamic range is obtained.

Description

Technical Field

[0001] This utility model relates to the field of radio communication detection circuit technology, specifically a wide dynamic range power detection circuit. Background Technology

[0002] Traditional detection circuits each have their own advantages and disadvantages: peak detection is a (fast charge, slow discharge) type, with a very small charging time constant. Even a very narrow pulse can be quickly charged to a stable value. After the intermediate frequency signal disappears, due to the large discharge time constant of the circuit, the output voltage of the detector can remain at the peak value for a long time. Average value detection is characterized by the same charging and discharging time constant of the detector, making it particularly suitable for measuring continuous waves. Logarithmic amplifier detection has good waveform, wide dynamic range, and good temperature stability.

[0003] The accuracy of power detection is determined by the accuracy of the detection circuit. In the existing technology, although the detection using a logarithmic amplifier can achieve a wide dynamic range and high accuracy, the width of its dynamic range is negatively correlated with its accuracy. As the width of the dynamic range increases, its accuracy will decrease. Utility Model Content

[0004] The technical problem to be solved by this invention is to overcome the existing defects and provide a wide dynamic range power detection circuit, which can effectively solve the problems in the background art.

[0005] To achieve the above objectives, this utility model discloses a wide dynamic range power detection circuit. The technical solution includes a coupling circuit connected to the signal being detected. The output of the coupling circuit is connected to an amplifier circuit, which in turn connects to a filter circuit. The main path of the coupling circuit is directly connected to the signal output. A level detection circuit, employing a logarithmic amplification level conversion circuit, is connected to a microprocessor with an ADC port. The microprocessor is connected to a display screen. After coupling, amplification, and filtering, the detected signal's accuracy and precision are better guaranteed, thus achieving both a wide dynamic range and the required accuracy.

[0006] As a preferred embodiment of this utility model, the amplification circuit includes a gain amplifier chip, the input port of which is connected to the coupling circuit, and the output port is connected to the filter circuit through an output line. A coil L5 is also connected to the output line, and the coil L5 is connected to the input voltage after being connected to a filter and voltage regulator capacitor. A capacitor C40 is also connected to the output line.

[0007] As a preferred embodiment of this utility model, the filter circuit includes a filter, the input terminal of the filter is connected to a coil L8, the front end of the coil L8 is connected to a coil L9 via a T-connector, and the end of the coil L9 is grounded; the output terminal of the filter is connected to a coil L7 and a resistor R9, the coil L7 and the resistor R9 are respectively connected to a coil L10 and a resistor R10 via a T-connector, and the rear end of the resistor R9 is connected to a resistor R11 via a T-connector.

[0008] As a preferred embodiment of this utility model, the level detection circuit includes a detector chip, which is a cascaded chip. Its input terminal is connected to the filter circuit, and its output terminal is connected to the ADC port of the microprocessor. The VCC port of the detector chip is connected to the input voltage.

[0009] Compared with the prior art, the beneficial effects of this utility model are: by adopting a logarithmic detection circuit, this utility model can meet the requirements of a wide dynamic range, and after amplifying and filtering the detected signal, it can better ensure the accuracy and precision of the detected signal; by selecting a higher precision processor, the display accuracy can be further improved. Attached Figure Description

[0010] Figure 1 This is a schematic diagram of the structure of this utility model;

[0011] Figure 2 This is a schematic diagram of the coupling circuit of this utility model;

[0012] Figure 3 This is the schematic diagram of the amplifier circuit of this utility model;

[0013] Figure 4 This is a schematic diagram of the filter circuit of this utility model;

[0014] Figure 5 This is a schematic diagram of the level detection circuit of this utility model;

[0015] Figure 6 This is a schematic diagram of the control circuit of this utility model;

[0016] Figure 7 This is a flowchart of the operation process of this utility model.

[0017] In the diagram: 1. Coupler circuit; 2. Amplifier circuit; 3. Filter circuit; 4. Level detection circuit; 5. Microprocessor; 6. Display screen. Detailed Implementation

[0018] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model. Example

[0019] like Figures 1 to 6 As shown, this utility model discloses a wide dynamic range power detection circuit. The technical solution adopted includes a coupling circuit 1, which is as follows: Figure 2 As shown, it includes a BTCD-9-1W coupler U30. Its IN (3#) port is the input terminal of the detected signal after the receiver frequency conversion. Its COUT (1#) port is connected to the signal output terminal after connecting capacitor C202. The 50Ω TERM EXTERNAL (6#) port is connected to ground after connecting resistor R107. The GND (2#) port and its OUT (1#) port are the coupling circuit ports. After connecting capacitor C201, they are connected to amplifier circuit 2.

[0020] like Figure 3 As shown, amplifier circuit 2 includes BR9192 type gain amplifier chip N8. The coupling port of coupling circuit 1 is connected to the RFIN (1#) port of gain amplifier chip N8. Its GND1 (2#) port and GND2 (4#) port are both grounded. The RFOUT (3#) port is connected to capacitor C40 and then connected to filter circuit 3. The RFOUT (3#) port and capacitor C40 are connected to coil L5 through a T-connection. The front end of coil L5 is connected to +5V power supply voltage. The front end of coil L5 is also connected to capacitor C38 through a T-connection and then grounded. Capacitor C38 is connected in parallel with capacitor C37.

[0021] like Figure 4 As shown, the filter circuit 3 includes a 3.2M SAW filter N11. The RFOUT (3#) port of the gain amplifier chip N8 is also connected to the coil L8. The rear end of the coil L8 is connected to the RFIN (B) port of the 3.2M SAW filter N11. The front end of the coil L8 is connected to the coil L9 via a T-connection and then grounded. The GND1 (A), GND2 (C), GND5 (F), and GND4 (D) ports of the 3.2M SAW filter N11 are grounded. The RFOUT (E) port is connected to the coil L7 and the resistor R9 and then connected to the level detection circuit 4. The coil L7 and the resistor R9 are connected to the coil L10 and the resistor R10 via two T-connections and then grounded. The rear end of the resistor R9 is connected to the resistor R11 via a T-connection and then grounded.

[0022] like Figure 5, Figure 6 As shown, the level detection circuit 4 includes a DLA602 detector chip N59. The INP (3#) port of the detector chip N59 is connected to the filter circuit 3, the GND (25#) port is grounded, and the INN (4#) port is connected to capacitor C196 and resistor R54 and then grounded. The EN (5#) port is connected to the +5V input voltage. The VCC1~9 (8~12#, 19#, 20#, 23#, 24#) ports are all connected to the +5V input voltage. In addition, the VCC1~9 (8~12#, 19#, 20#, 23#, 24#) ports are also connected to capacitor C193 or capacitor C194 through T-type connection to achieve the effect of voltage stabilization and filtering. The NC1~5 (1#, 6#, 13#, 17#, 18#) ports and the NC8 (7#) port are directly grounded. The CLPF (14#) port is grounded after being connected to capacitor C195. The LOGOUT (15#) port and the VSET (16#) port are connected and then connected to capacitor C70 before being cascaded to another DLA602 detector chip N18 on the control circuit.

[0023] like Figure 6 As shown, the wiring logic of detector chip N18 differs from that of detector chip N59 in that detector chip N18 does not have a GND port; its INN (4#) port is directly grounded after being connected to capacitor C72. The LOGOUT (15#) and VSET (16#) ports of detector chip N18 are connected and then connected to the PA1 / ADC1 (11#) port of the S32F103CB microprocessor 5. The VBAT (1#) port of microprocessor 5 is connected to a 3.3V power supply voltage. The OSC-IN (5#) port is connected to the 3# port of connector E1. The 3# port of connector E1 is also connected to capacitor C590 and then grounded. The 1# port is connected to capacitor C591 and then grounded. The OSC-OUT (6#) port of detector chip N18 is connected to capacitor C591 and then grounded. The NRST (7#) port is connected to resistor R5 and then connected to a +3.3V input voltage. The V-SSA (8#) port is connected to digital ground. The V-DDA (9#) port is connected to a +3.3V MCU power supply voltage. The VSS-1 (23#) port is grounded. The VDD-1~3 (24#, 36#, 48#) ports are connected to a +3.3V power supply voltage. The PB12~14 (25~27#) ports are connected to the control attenuator. The BOOT0 (44#) port is connected to resistor R3 and then grounded. The VSS-3 (47#) port is grounded.

[0024] The working principle of this utility model is as follows: Figure 7As shown, after the detection device equipped with this utility model is powered on, the receiver frequency-converted signal to be detected enters the coupler U30 to obtain the output signal and the detection signal proportional to the output signal. Its main output line outputs the output signal. The detection signal enters the amplifier circuit 2 through the coupling terminal for signal amplification, and then enters the filter circuit 3 to filter out the out-of-band harmonics and noise output by the amplifier circuit 2, thus improving the quality of the detection signal and providing a platform guarantee for detection accuracy and precision. The detection signal after being processed by the filter circuit 3 enters the level detection circuit 4. Using the logarithmic amplification principle, the level of the detection signal is converted into voltage to obtain the detection signal power. The detection signal power is converted by AD and enters the microprocessor 5. The microprocessor 5 judges whether the signal power is distorted or too small based on conditions. If there is distortion or too small, a fault is reported. If the signal power is normal, the real-time power value is displayed on the display screen 6.

[0025] The circuit connection involved in this utility model is a common method used by those skilled in the art, and technical inspiration can be obtained through a limited number of experiments. It belongs to common knowledge.

[0026] Components not described in detail in this article are existing technologies.

[0027] Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the present invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A wide dynamic range power detection circuit comprising a coupling circuit (1), characterized in that: The coupling circuit (1) is connected to the detected signal, and the coupling circuit output end is connected to the amplification circuit (2), then connected to the filter circuit (3), the coupling circuit (1) main road straight through connection signal output end; The rear end of the filter circuit (3) is connected to the level detection circuit (4), the level detection circuit (4) adopts logarithmic amplification level conversion circuit, the rear end of the level detection circuit (4) is connected to the microprocessor (5) with ADC port, the microprocessor (5) is connected to the display screen (6).

2. The wide dynamic range power detection circuit of claim 1, wherein: The amplification circuit (2) includes a gain amplifier chip, the input port of the gain amplifier chip is connected to the coupling circuit, the output port is connected to the filter circuit (3) through an output line, and a coil L5 is further connected on the output line, the coil L5 is connected to an input voltage after connecting a filter voltage stabilizing capacitor; A capacitor C40 is further connected on the output line.

3. The wide dynamic range power detection circuit of claim 1, wherein: The filter circuit (3) includes a filter, an input end of the filter is connected to a coil L8, a coil L9 is connected to the front end of the coil L8 through a T-shaped wire, and an end of the coil L9 is grounded; The filter output end is connected to a coil L7 and a resistor R9, the coil L7 and the resistor R9 are connected to a coil L10 and a resistor R10 respectively through T-shaped wires, and the rear end of the resistor R9 is connected to a resistor R11 through a T-shaped wire.

4. The wide dynamic range power detection circuit of claim 1, wherein: The level detection circuit (4) includes a detection chip, the detection chip is a cascade chip, an input end of the detection chip is connected to the filter circuit (3), and an output end of the detection chip is connected to the ADC port of the microprocessor (5); The VCC port of the detection chip is connected to an input voltage.

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