Communication control circuit of bus
By introducing a universal input/output interface and a one-way conduction module into I2C bus communication, the limitations of the I2C bus communication protocol are solved, enabling the ability to wake up external devices at speeds higher than 100 Kbit/s, thus expanding the application scenarios of bus communication.
Patent Information
- Application Number
- CN202520554772.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-27
- Publication Date
- 2026-02-06
- Estimated Expiration
- 2035-03-27
AI Technical Summary
Existing I2C bus communication is limited by a fixed communication protocol, which cannot transmit more useful additional information, thus limiting its application scenarios, especially when waking up external devices, it cannot work at a rate higher than 100 Kbit/s.
By setting up a general-purpose input/output interface and a one-way conduction module in the control module, the wake-up communication signal is output through the general-purpose input/output interface, and the working communication signal is output through the data bus. This prevents the working communication signal from being output to the general-purpose input/output interface through the one-way conduction module, thus expanding the application scenarios of bus communication.
Without changing the communication protocol and reference design, the ability to wake up external devices at speeds exceeding 100 Kbit/s was achieved, expanding the application scenarios of bus communication.
Smart Images
Figure CN223884004U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to serial data communication field especially relates to a communication control circuit of bus. BACKGROUND
[0002] Now the master of I2C can only use the specific communication mode to transmit data, that is, the fixed transmission rate (100 Kbit / s or other), the address space is 7 bits, each time 8 bits of data is transmitted, and the fixed action of following I2C protocol, and the communication time window of I2C is fixed, cannot transmit more useful additional information, such as the state of I2C bus information.
[0003] For example, if the chip of chip company MICROCHIP is to be woken up from standby state, according to its design requirement, it needs to keep I2C data line (SDA) low level for at least 60us duration. According to the protocol standard of I2C, using 7 bits of address space, through the transmission of an 8 bits of all zero data to simulate 60us low level duration, then the chip can only work at 100Kbit / s working rate. If it works at other higher rate (such as 400 Kbit / s), because the transmission low level duration is less than 60us, it cannot wake up the chip. SUMMARY
[0004] The utility model embodiment provides a communication control circuit of bus to solve the problem that the application scene of bus communication is few because of the limitation of communication protocol.
[0005] Based on the above purpose, in an embodiment, a communication control circuit of bus is provided, comprising: a control module, the control module is connected with external equipment through the data bus of preset protocol, the control module is provided with general input and output interface, the control module is used to output wake-up communication signal to the external equipment through the general input and output interface, and the control module is also used to output working communication signal to the external equipment through the data bus after the external equipment is woken up.
[0006] In an embodiment, it also includes: one-way conduction module, one end of the one-way conduction module is connected with the general input and output interface, the other end of the one-way conduction module is connected with the data line in the data bus, and the one-way conduction module is used to prevent the working communication signal from being output to the general input and output interface through the one-way conduction module when the control module outputs the working communication signal to the external equipment through the data bus.
[0007] In an embodiment, the one-way conduction module includes: diode, the anode end of the diode is connected with the data line, and the cathode end of the diode is connected with the general input and output interface.
[0008] In an embodiment, the preset protocol is an I2C protocol, the data bus further comprises a clock line, one end of the clock line is connected to the control module, and the other end of the clock line is connected to the external device.
[0009] In an embodiment, the external device is an encryption chip, and the model of the encryption chip is ATECC608A.
[0010] In an embodiment, the unidirectional conduction module further comprises a first resistor, and the first resistor is connected in series with the diode.
[0011] In an embodiment, the unidirectional conduction module further comprises a second resistor, and the second resistor is connected in series with the first resistor.
[0012] In an embodiment, the unidirectional conduction module further comprises a third resistor, and the third resistor is connected in parallel with the first resistor.
[0013] In an embodiment, the output voltage of the general input and output interface is 3.3V or 5V, which meets the electrical performance of the data bus.
[0014] In an embodiment, the voltage resistance value of the diode is 3.3V or 5V, which meets the electrical performance of the data bus.
[0015] The bus communication control circuit described above, by setting a general input and output interface on the control module and outputting a wake-up communication signal to the external device through the general input and output interface, makes the control module not only capable of transmitting a working communication signal through the data bus, but also capable of transmitting a wake-up communication signal through the general input and output interface, without changing the communication protocol and reference design, and through the general input and output interface to transmit the wake-up communication signal, thereby expanding the application scenarios of bus communication. BRIEF DESCRIPTION OF DRAWINGS
[0016] In order to more clearly illustrate the technical scheme of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the description of the embodiments of the present application. Obviously, the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor on the basis of these drawings.
[0017] Figure 1 is a connection schematic diagram of the control module, the general input and output interface and the data bus in an embodiment of the present application;
[0018] Figure 2is a connection schematic view of the control module, the general input and output interface, the data bus and the unidirectional conduction module in an embodiment of the utility model;
[0019] Figure 3 is a schematic view of the diode arranged in the unidirectional conduction module in an embodiment of the utility model;
[0020] Figure 4 is a schematic view of the diode and the first resistance arranged in the unidirectional conduction module in an embodiment of the utility model;
[0021] Figure 5 is a schematic view of the second resistance and the first resistance connected in series in the unidirectional conduction module in an embodiment of the utility model;
[0022] Figure 6 is a schematic view of the third resistance and the first resistance connected in parallel in the unidirectional conduction module in an embodiment of the utility model.
[0023] Reference signs: 1, control module, 101, general input and output interface, 3, data bus, 301, clock line, 302, data line, 5, unidirectional conduction module, 501, diode, 502, first resistance, 503, second resistance, 504, third resistance. DETAILED DESCRIPTION
[0024] The technical solutions in the embodiments of the utility model will be clearly and completely described below with reference to the drawings in the embodiments of the utility model. Obviously, the described embodiments are part of the embodiments of the utility model, rather than all the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by those skilled in the art without creative labor fall within the protection scope of the utility model.
[0025] It should be understood that the utility model can be implemented in different forms, and should not be interpreted as being limited to the embodiments presented here. On the contrary, providing these embodiments will make the disclosure complete and complete, and will fully convey the scope of the utility model to those skilled in the art. In the drawings, the size and relative size of layers and regions may be exaggerated for clarity throughout the same reference signs represent the same elements.
[0026] It will be understood that when an element or layer is referred to as being "on" or "connected to" another element or layer, it can be directly on or connected to the other element or layer or intervening elements or layers can be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element or layer, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present application.
[0027] Spatially relative terms, such as "beneath", "below", "lower", "under", "above", "upper" and the like, can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use and / or
[0028] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the present application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and / or "comprising", when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. As used herein the term "and / or" includes any and all combinations of one or more of the associated listed items.
[0029] For a thorough understanding of the present application, reference is made to the following detailed description taken in conjunction with the accompanying drawings, in which:
[0030] In one embodiment, asFigure 1 As shown, a communication control circuit for a bus is provided, including: a control module 1, which is connected to an external device via a data bus 3 with a preset protocol, the control module 1 being provided with a general-purpose input / output interface 101, the control module 1 being used to output a wake-up communication signal to the external device through the general-purpose input / output interface 101, and the control module 1 being used to output a working communication signal to the external device through the data bus 3 after the external device is woken up.
[0031] Among them, the microcontroller and the MCU (Micro Controller Unit) without running an operating system provide registers when used as control module 1. The user selects a specific configuration according to the preset protocol and changes and uses the current configuration to transmit working communication signals when appropriate.
[0032] When a chip / device running an operating system (such as the real-time operating system Free RTOS, or the advanced operating system Linux) acts as control module 1, it abstracts the data bus and its interfaces into "devices" under its management, transforming data transmission on the data bus into reading or writing data for those devices. For security and management purposes, chips / devices running operating systems are not allowed to dynamically change the configuration of devices such as the data bus interfaces. Changing devices would involve complex management and might even require remaking the system kernel.
[0033] Regardless of whether an operating system is running, the control module 1 can only use specific communication methods to transmit data, namely a fixed transmission rate (100 Kbit / s or others), an address space of 7 bits, and fixed actions following a preset protocol, such as transmitting 8 bits of data each time. The communication time window is also fixed, and sometimes it may fail to wake up external devices.
[0034] General Purpose Input / Output Interface (GPIO) can be programmed to control the level of logic and can be defined as an input or output interface as needed. In this invention, the routing design of GPIO on the PCB circuit board, such as the trace length and width, as well as whether to add more logic gates or devices to the GPIO, are all within the protection scope of this invention.
[0035] External devices receive wake-up or working communication signals from the control module and perform corresponding actions and responses based on the received communication signals. The presence, number, and address of external devices do not affect the design of this utility model and are all within the protection scope of this utility model.
[0036] In the embodiment, the general input and output interface is arranged on the control module, and the wake-up communication signal is output to the external device through the general input and output interface, so that the control module can not only transmit the working communication signal through the data bus, but also transmit the wake-up communication signal through the general input and output interface, and the application scenario of the bus communication is expanded without changing the communication protocol and reference design.
[0037] In an embodiment, as shown in Figure 2 The one-way conduction module 5 is connected to one end of the general input and output interface 101, and connected to the data line 302 in the data bus 3 at the other end. The one-way conduction module 5 is used to prevent the working communication signal from being output to the general input and output interface 101 through the one-way conduction module 5 when the control module 1 outputs the working communication signal to the external device through the data bus 3.
[0038] In an embodiment, as shown in Figure 2 The one-way conduction module 5 is connected to one end of the general input and output interface 101, and connected to the data line 302 at the other end. When the wake-up communication signal is transmitted to the external device, the general input and output interface 101 is first configured as an output mode;
[0039] After the working communication signal of the data bus 3 ends, the data line 302 is set to high level by the control module 1, and at this time the external device enters the sleep state;
[0040] The low level of the general input and output interface 101 is output to pull the data line 302 to low level, and according to the design or need, the duration of the low level output by the general input and output interface 101 is controlled by programming to control the duration of the low level of the data line 302, and the wake-up communication signal is formed. The external device on the data bus 3 listens to the communication wake-up signal of the data line 302 and enters the working state.
[0041] When the external device is woken up, the general input and output interface 101 is configured as an input mode, which does not affect the data line 302, and the data line 302 transmits the working communication signal transmitted by the control module 1, and the external device receives the working communication signal to start normal work.
[0042] In the embodiment, the one-way conduction module is arranged to prevent the working communication signal from being output to the general input and output interface through the one-way conduction module when the control module outputs the working communication signal to the external device through the data bus, and the application scenario of the bus communication is expanded without changing the communication protocol and reference design.
[0043] In an embodiment, as shown in Figure 3As shown, the one-way conducting module 5 includes a diode 501, an anode end of the diode 501 is connected to the data line 302, and a cathode end of the diode 501 is connected to the general input and output interface 101.
[0044] The diode in the one-way conducting module 5 can be a switching diode, a voltage stabilizing diode, a transient suppression diode, or the like.
[0045] In this embodiment, by arranging the diode, when the control module outputs the working communication signal to the external device through the data bus, the working communication signal is prevented from being output to the general input and output interface through the one-way conducting module, and the application scenario of the bus communication is expanded without changing the communication protocol and the reference design.
[0046] In an embodiment, the preset protocol is an I2C protocol, and the data bus further includes a clock line, one end of the clock line is connected to the control module, and the other end of the clock line is connected to the external device.
[0047] The I2C protocol is a two-wire synchronous serial communication protocol widely used in embedded systems, which is originally used for simplifying the communication between internal devices of a television set and has become a standard protocol for low-speed peripheral interconnection, and only includes two signal lines: a data line for transmitting data and supporting bidirectional communication, and a clock line controlled by the control module and used for synchronizing data transmission and maintaining a high level when the bus is idle. The I2C protocol can support a standard mode of 100 Kbit / s and a fast mode of 400 Kbit / s.
[0048] The start signal of the I2C protocol is that the data line jumps from a high level to a low level, and the stop signal is that the data line jumps from a low level to a high level. The I2C protocol reference design uses a 7-bit address space, and each 8 bits are a byte, with high bits in front.
[0049] In this embodiment, the I2C protocol is used as the preset protocol, only two signal lines (the data line and the clock line) are needed, the complexity of hardware connection is reduced, and the application scenario of the I2C bus is expanded.
[0050] In an embodiment, the external device is an encryption chip, and the model of the encryption chip is ATECC608A.
[0051] The external device can be other chips or devices, and this embodiment provides an example, and other chips or devices are also within the protection scope of the utility model.
[0052] The ATECC608A is woken up from the standby state, and according to the design requirements of the chip, the data line needs to be kept at a low level for 60us. If an 8-bit all-zero data is transmitted using the I2C protocol, 7 bits of which are address space, a 60us low level is generated, and then the chip can only work at a standard working rate of 100 Kbit / s. When the chip wants to work at a higher rate (such as a fast working rate of 400 Kbit / s), the low level transmitted using the I2C protocol is less than 60us, and the chip cannot be woken up.
[0053] At this time, the general input and output interface GPIO is used to set the general input and output interface to an output mode, and a 60us low level is set by the control module to change the level of the data line of the data bus, and the level of the data line is also kept at a low level for 60us. The ATECC608A chip listening on the data line receives the 60us low level on the data line, and the ATECC608A is woken up.
[0054] In this embodiment, the level signal output by the general input and output interface changes the level signal on the data line, so that the external device listening on the data line can receive the level signal output by the general input and output interface, and the external device is woken up. Without changing the communication protocol and reference design, the application scenario of bus communication is expanded.
[0055] In an embodiment, as shown in Figure 4 The first resistor 502 is connected in series with the diode 501.
[0056] When the current of the level signal transmitted through the general input and output interface is too large, the current is reduced through the first resistor, and the resistance value of the first resistor is set according to the needs.
[0057] In this embodiment, the first resistor is set to make the current of the signal transmitted to the data line meet the design requirements of the bus, and the reliability of the communication is ensured. Without changing the communication protocol and reference design, the application scenario of bus communication is expanded.
[0058] In an embodiment, as shown in Figure 5 The second resistor 503 is connected in series with the first resistor 502.
[0059] When the first resistor cannot meet the requirement of reducing the current to within the design requirements of the bus, a second resistor can be connected in series with the first resistor, and the resistance value of the second resistor is also set according to the needs.
[0060] In the embodiment, the first resistor and the second resistor are arranged to make the current of the signal transmitted to the data line meet the design requirement of the bus, ensure the reliability of communication, and expand the application scenario of bus communication without changing the communication protocol and reference design.
[0061] In an embodiment, as shown in Figure 6 The unidirectional conduction module 5 further includes a third resistor 504 connected in parallel with the first resistor 501.
[0062] When the first resistor cannot meet the requirement of reducing the current to within the design requirement of the bus, a third resistor can be connected in parallel at the first resistor, and the resistance value of the third resistor is also set as required.
[0063] In the embodiment, the first resistor and the third resistor are arranged to make the current of the signal transmitted to the data line meet the design requirement of the bus, ensure the reliability of communication, and expand the application scenario of bus communication without changing the communication protocol and reference design.
[0064] In an embodiment, the output voltage of the general input and output interface and the voltage resistance value of the diode are both 3.3V or 5V, which meet the electrical performance of the data bus.
[0065] In the embodiment, the output voltage of the general input and output interface and the voltage resistance value of the diode are both 3.3V or 5V, which meet the electrical performance of the I2C bus, avoid misjudgment or transmission failure of the signal, work reliably within the voltage range of the bus, avoid signal interruption caused by voltage mismatch, expand the application scenario of bus communication without changing the communication protocol and reference design.
[0066] The above-described embodiments are only used to illustrate the technical solutions of the present application, rather than limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement to some technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be included in the protection scope of the present application.
Claims
1. A communication control circuit of a bus, characterized by comprising: The application relates to a control module for an external device. The control module is connected with the external device through a data bus of a preset protocol, and is provided with a general input and output interface.
2. The communication control circuit according to claim 1, characterized by The control module is used for outputting a wake-up communication signal to the external device through the general input and output interface. The control module is also used for outputting a working communication signal to the external device through the data bus after the external device is woken up.
3. The communication control circuit according to claim 2, characterized by The application also relates to a one-way conduction module.
4. The communication control circuit according to claim 3, characterized by One end of the one-way conduction module is connected with the general input and output interface, and the other end is connected with a data line in the data bus.
5. The communication control circuit according to claim 1, characterized by The one-way conduction module is used for preventing the working communication signal from being output to the general input and output interface through the one-way conduction module when the control module outputs the working communication signal to the external device through the data bus.
6. The communication control circuit according to claim 4, characterized by The one-way conduction module comprises a diode.
7. The communication control circuit according to claim 6, characterized by One end of the diode is connected with the data line, and the other end is connected with the general input and output interface.
8. The communication control circuit according to claim 6, characterized by The preset protocol is an I2C protocol.
9. The communication control circuit according to claim 7, characterized by The data bus also comprises a clock line.
10. The communication control circuit according to claim 8, characterized by One end of the clock line is connected with the control module, and the other end is connected with the external device. The external device is an encryption chip. The model of the encryption chip is ATECC608A. The one-way conduction module also comprises a first resistor. The first resistor is connected with the diode in series. The one-way conduction module also comprises a second resistor. The second resistor is connected with the first resistor in series. The one-way conduction module also comprises a third resistor. The third resistor is connected with the first resistor in parallel. The output voltage of the general input and output interface is 3.3V or 5V, which meets the electrical performance of the data bus. The voltage resistance value of the diode is 3.3V or 5V, which meets the electrical performance of the data bus.