Signal amplification circuit

Abstract

The utility model belongs to the technical field of signal processing circuits, and particularly discloses a signal amplification circuit which comprises a primary amplification circuit and a secondary amplification circuit, the primary amplification circuit comprises an operational amplifier U1A and an operational amplifier U1B, the in-phase end of the operational amplifier U1A is connected to a signal input end VIN1, and the in-phase end of the operational amplifier U1B is connected to a signal output end VIN2. The output end of the operational amplifier U1A is electrically connected with the first input end of the secondary amplification circuit through a resistor R5, the in-phase end of the operational amplifier U1B is connected with the signal input end VIN2, and the output end of the operational amplifier U1B is electrically connected with the second input end of the secondary amplification circuit through a resistor R6. According to the utility model, the first-stage amplification circuit and the second-stage amplification circuit are designed, two-stage amplification is respectively carried out on two paths of different weak signals, a larger output signal is obtained, and the low-pass filter is designed between the first-stage amplification circuit and the second-stage amplification circuit, so that the environmental noise is inhibited, and the detection precision is improved. And a more stable signal is provided for subsequent circuit processing.

Description

Technical Field

[0001] This utility model relates to the field of signal processing circuit technology, and in particular to a signal amplification circuit. Background Technology

[0002] Small-signal amplifier circuits are widely used in various fields such as industrial control, medical instruments, military equipment, home appliances, and security. However, in certain special scenarios, when processing two signals from the same source that require division or subtraction after two stages of amplification, it is necessary to minimize the impact of environmental noise and power supply fluctuations on signal processing. Utility Model Content

[0003] The purpose of this invention is to solve the technical problems existing in the background art, and to this end, a signal amplification circuit is provided.

[0004] To achieve the above objectives, the technical solution adopted by this utility model is as follows:

[0005] A signal amplification circuit includes a first-stage amplification circuit and a second-stage amplification circuit, wherein the first-stage amplification circuit includes operational amplifier U1A and operational amplifier U1B;

[0006] The non-inverting input of the operational amplifier U1A is connected to the signal input terminal VIN1. A capacitor C1 and a resistor R2 are connected in parallel between the inverting input and the output terminal of the operational amplifier U1A. The inverting input of the operational amplifier U1A is grounded through the resistor R1. The ground terminal of the operational amplifier U1A is grounded. The power supply terminal of the operational amplifier U1A is connected to VCC and grounded after being connected in parallel with capacitors C7 and C8. The output terminal of the operational amplifier U1A is electrically connected to the input terminal of the second-stage amplifier circuit through the resistor R5.

[0007] The non-inverting input of the operational amplifier U1B is connected to the signal input terminal VIN2. A capacitor C2 and a resistor R4 are connected in parallel between the inverting input and the output terminal of the operational amplifier U1B. The inverting input of the operational amplifier U1B is grounded through a resistor R3. The output terminal of the operational amplifier U1B is electrically connected to the input terminal of the second-stage amplifier circuit through a resistor R6.

[0008] The following is a further defined technical solution of this utility model: the non-inverting input of the operational amplifier U1A is grounded through capacitor C5.

[0009] The following is a further defined technical solution of this utility model: the output terminal of the operational amplifier U1A is grounded through resistor R5 and capacitor C3.

[0010] The following is a further defined technical solution of this utility model: the non-inverting input of the operational amplifier U1B is grounded through capacitor C6.

[0011] The following is a further defined technical solution of this utility model: the output terminal of the operational amplifier U1B is grounded through resistor R6 and capacitor C4.

[0012] The following is a further defined technical solution of this utility model: the secondary amplifier circuit includes operational amplifier U2A and operational amplifier U2B;

[0013] The non-inverting input of the operational amplifier U2A is electrically connected to the output of the operational amplifier U1A through resistor R5. A capacitor C9 and a resistor R8 are connected in parallel between the inverting input and the output of the operational amplifier U2A. The inverting input of the operational amplifier U2A is grounded through resistor R7. The grounding terminal of the operational amplifier U2A is grounded. The power supply terminal of the operational amplifier U2A is connected to VCC and grounded after being connected in parallel with capacitors C15 and C16. The output of the operational amplifier U2A is electrically connected to the signal output terminal VOUT1 through resistor R11.

[0014] The non-inverting input of the operational amplifier U2B is electrically connected to the output of the operational amplifier U1B through a resistor R6. A capacitor C10 and a resistor R10 are connected in parallel between the inverting input and the output of the operational amplifier U2B. The inverting input of the operational amplifier U2B is grounded through a resistor R9. The output of the operational amplifier U2B is electrically connected to the signal output terminal VOUT2 through a resistor R12.

[0015] The following is a further defined technical solution of this utility model: the non-inverting input of the operational amplifier U2A is grounded through capacitor C13.

[0016] The following is a further defined technical solution of this utility model: the output terminal of the operational amplifier U2A is grounded through resistor R11 and capacitor C11.

[0017] The following is a further defined technical solution of this utility model: the non-inverting input of the operational amplifier U2B is grounded through capacitor C14.

[0018] The following is a further defined technical solution of this utility model: the output terminal of the operational amplifier U2B is grounded through resistor R12 and capacitor C12.

[0019] Compared with the prior art, the present invention has the following technical effects:

[0020] This invention designs a first-stage amplifier circuit and a second-stage amplifier circuit, which amplify two different weak signals in two stages to obtain a larger output signal. Furthermore, a low-pass filter is designed between the first-stage and second-stage amplifier circuits to suppress environmental noise and provide a more stable signal for subsequent circuit processing.

[0021] The present invention will be further described below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0023] Figure 1 This is a circuit connection diagram of this utility model. Detailed Implementation

[0024] To make the above-mentioned objects, features, and advantages of this utility model more apparent and understandable, the specific embodiments of this utility model will be described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a full understanding of this utility model. However, this utility model can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this utility model. Therefore, this utility model is not limited to the specific embodiments disclosed below.

[0025] like Figure 1 As shown, this embodiment provides a signal amplification circuit, including a first-stage amplification circuit and a second-stage amplification circuit, for amplifying two different signals VIN1 and VIN2. The amplification factor of the first-stage amplification circuit is designed to be 100, and the amplification factor of the second-stage amplification circuit is designed to be 10.

[0026] The first-stage amplifier circuit includes operational amplifiers U1A and U1B. Specifically, the non-inverting input of operational amplifier U1A is connected to the signal input terminal VIN1. A capacitor C1 and a resistor R2 are connected in parallel between the inverting input and the output terminal of operational amplifier U1A. The inverting input of operational amplifier U1A is grounded through resistor R1. The ground terminal of operational amplifier U1A is grounded. The power supply terminal of operational amplifier U1A is connected to VCC and grounded after being connected in parallel with capacitors C7 and C8. The output terminal of operational amplifier U1A is electrically connected to the input terminal of the second-stage amplifier circuit through resistor R5. The non-inverting input of operational amplifier U1A is grounded through capacitor C5. The output terminal of operational amplifier U1A is grounded through resistor R5 and capacitor C3. The non-inverting input of operational amplifier U1B is connected to the signal input terminal VIN2. A capacitor C2 and a resistor R4 are connected in parallel between the inverting input and the output terminal of operational amplifier U1B. The inverting input of operational amplifier U1B is grounded through a resistor R3. The output terminal of operational amplifier U1B is electrically connected to the input terminal of the second stage amplifier circuit through a resistor R6. The non-inverting input of operational amplifier U1B is grounded through a capacitor C6. The output terminal of operational amplifier U1B is grounded through a resistor R6 and a capacitor C4.

[0027] The two-stage amplifier circuit includes operational amplifiers U2A and U2B. Specifically, the non-inverting input of operational amplifier U2A is electrically connected to the output of operational amplifier U1A through resistor R5. A capacitor C9 and a resistor R8 are connected in parallel between the inverting input and the output of operational amplifier U2A. The inverting input of operational amplifier U2A is grounded through resistor R7. The ground terminal of operational amplifier U2A is grounded. The power supply terminal of operational amplifier U2A is connected to VCC and grounded after being connected in parallel with capacitors C15 and C16. The output of operational amplifier U2A is electrically connected to the signal output terminal VOUT1 through resistor R11. The non-inverting input of operational amplifier U2A is grounded through capacitor C13. The output of operational amplifier U2A is grounded through resistor R11 and capacitor C11. The non-inverting input of operational amplifier U2B is electrically connected to the output of operational amplifier U1B through resistor R6. Capacitor C10 and resistor R10 are connected in parallel between the inverting input and the output of operational amplifier U2B. The inverting input of operational amplifier U2B is grounded through resistor R9. The output of operational amplifier U2B is electrically connected to the signal output terminal VOUT2 through resistor R12. The non-inverting input of operational amplifier U2B is grounded through capacitor C14. The output of operational amplifier U2B is grounded through resistor R12 and capacitor C12.

[0028] It should be noted that the operational amplifiers U1A, U1B, U2A, and U2B mentioned above are standard rail-to-rail operational amplifiers, model: MCP6V27-E / SN. The parameters of the low-pass filters between the first and second stage amplifier circuits (either composed of R5, C3, and C13, or R6, C4, and C14) can be set according to actual conditions. Capacitors C1, C2, C3, C4, C5, C6, C7, C8, C9, C10, C11, C12, C13, C14, C15, and C16 are all set to 100nF-0603-16V. Resistors R1, R3, R7, R9, R11, and R12 are set to 1kΩ-0603-0.1%; resistors R2 and R4 are set to 51kΩ-0603-0.1%; and resistors R5, R6, R8, and R10 are set to 10kΩ-0603-0.1%.

[0029] The above description is merely a preferred embodiment of this utility model and is not intended to limit the utility model in any way. Any person skilled in the art can make many possible variations and modifications to the technical solution of this utility model using the disclosed methods and techniques, or modify it into equivalent embodiments with equivalent changes, without departing from the scope of the technical solution of this utility model. Therefore, all equivalent changes made based on the shape, structure, and principle of this utility model without departing from its technical solution should be covered within the protection scope of this utility model.

Claims

1. A signal amplification circuit, characterized in that, It includes a first-stage amplifier circuit and a second-stage amplifier circuit, wherein the first-stage amplifier circuit includes operational amplifier U1A and operational amplifier U1B; The non-inverting input of the operational amplifier U1A is connected to the signal input terminal VIN1. A capacitor C1 and a resistor R2 are connected in parallel between the inverting input and the output terminal of the operational amplifier U1A. The inverting input of the operational amplifier U1A is grounded through the resistor R1. The ground terminal of the operational amplifier U1A is grounded. The power supply terminal of the operational amplifier U1A is connected to VCC and grounded after being connected in parallel with capacitors C7 and C8. The output terminal of the operational amplifier U1A is electrically connected to the input terminal of the second-stage amplifier circuit through the resistor R5. The non-inverting input of the operational amplifier U1B is connected to the signal input terminal VIN2. A capacitor C2 and a resistor R4 are connected in parallel between the inverting input and the output terminal of the operational amplifier U1B. The inverting input of the operational amplifier U1B is grounded through a resistor R3. The output terminal of the operational amplifier U1B is electrically connected to the input terminal of the second-stage amplifier circuit through a resistor R6.

2. The signal amplification circuit as described in claim 1, characterized in that, The non-inverting input of the operational amplifier U1A is grounded through capacitor C5.

3. The signal amplification circuit as described in claim 1, characterized in that, The output terminal of the operational amplifier U1A is grounded through resistor R5 and capacitor C3.

4. The signal amplification circuit as described in claim 1, characterized in that, The non-inverting input of the operational amplifier U1B is grounded through capacitor C6.

5. The signal amplification circuit as described in claim 1, characterized in that, The output terminal of the operational amplifier U1B is grounded through resistor R6 and capacitor C4.

6. The signal amplification circuit as described in claim 1, characterized in that, The secondary amplifier circuit includes operational amplifier U2A and operational amplifier U2B; The non-inverting input of the operational amplifier U2A is electrically connected to the output of the operational amplifier U1A through resistor R5. A capacitor C9 and a resistor R8 are connected in parallel between the inverting input and the output of the operational amplifier U2A. The inverting input of the operational amplifier U2A is grounded through resistor R7. The grounding terminal of the operational amplifier U2A is grounded. The power supply terminal of the operational amplifier U2A is connected to VCC and grounded after being connected in parallel with capacitors C15 and C16. The output of the operational amplifier U2A is electrically connected to the signal output terminal VOUT1 through resistor R11. The non-inverting input of the operational amplifier U2B is electrically connected to the output of the operational amplifier U1B through a resistor R6. A capacitor C10 and a resistor R10 are connected in parallel between the inverting input and the output of the operational amplifier U2B. The inverting input of the operational amplifier U2B is grounded through a resistor R9. The output of the operational amplifier U2B is electrically connected to the signal output terminal VOUT2 through a resistor R12.

7. The signal amplification circuit as described in claim 6, characterized in that, The non-inverting input of the operational amplifier U2A is grounded through capacitor C13.

8. The signal amplification circuit as described in claim 6, characterized in that, The output terminal of the operational amplifier U2A is grounded through resistor R11 and capacitor C11.

9. A signal amplification circuit as described in claim 6, characterized in that, The non-inverting input of the operational amplifier U2B is grounded through capacitor C14.

10. A signal amplification circuit as described in claim 6, characterized in that, The output terminal of the operational amplifier U2B is grounded through resistor R12 and capacitor C12.

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