Electronic equipment

Abstract

The utility model discloses an electronic device which comprises at least two cores, a common module and a switch module. The at least two cores comprise a first core and a second core, wherein the first communication ends of the at least two cores are connected with the first communication end of the common module through the switch module; the switch module is configured to control a first communication end of the common module to establish a first connection with a first communication end of the first core, the first core communicates with the common module through the first connection, and the first core is any one of the at least two cores; the second core is configured to control the common module to be powered on. Therefore, the communication between the at least two cores and the common module is controlled through the switch module, and the common module is controlled to be powered on through the second core, so that the hardware cost of the electronic equipment can be reduced on the basis of ensuring the communication performance.

Description

TECHNICAL FIELD

[0001] The utility model relates to electronic product field especially electronic equipment. BACKGROUND

[0002] With the rapid development of computer technology, the processing performance requirement of electronic equipment is higher and higher. At present, electronic equipment adopts double core to process two or more threads to improve the processing performance of electronic equipment. For example, the electronic equipment can be wearable equipment, and the double core usually needs to be connected with peripheral equipment (such as sensors for acquiring external data) to acquire external data and process, to meet the needs of users. However, the communication and power supply of the wearable equipment with double core to peripheral equipment are not comprehensive enough in the related art, which increases the cost of the equipment. SUMMARY

[0003] The utility model provides a kind of electronic equipment, at least two cores are controlled with the communication of common module by switch module, and the power-on of common module is controlled by second core, on the basis of guaranteeing communication performance, it can reduce the hardware cost of electronic equipment.

[0004] The technical scheme of the utility model is realized as follows:

[0005] Firstly, the utility model embodiment provides a kind of electronic equipment, and the electronic equipment includes at least two cores, common module and switch module;At least two cores include first core and second core, wherein:

[0006] The first communication end of at least two cores is connected with the first communication end of common module by switch module;

[0007] Switch module is configured to control the first communication end of common module and the first communication end of first core to establish first connection, and first core is communicated with common module by first connection, and first core is any core in at least two cores;

[0008] Second core is configured to control the power-on of common module.

[0009] The utility model embodiment provides a kind of electronic equipment, and the first communication end of at least two cores is connected with the first communication end of common module by switch module, and switch module can control the first communication end of common module and the first communication end of first core to establish first connection, when first core is communicated with common module by first connection;Second core is configured to control the power-on of common module. In this way, at least two cores and the communication of common module (for example, peripheral equipment) are controlled by switch module, and the power-on of common module is controlled by second core, on the basis of guaranteeing communication performance, the hardware cost of power supply control connection on the core except second core of common module is saved, so as to reduce the hardware cost of electronic equipment.

[0010] It should be understood that the above general description and the following detailed description are exemplary and explanatory only and are not restrictive of the technical solutions of the present application. BRIEF DESCRIPTION OF DRAWINGS

[0011] Figure 1 A schematic structural diagram of an electronic device provided by an embodiment of the present application Figure 1 ;

[0012] Figure 2 A schematic structural diagram of an electronic device provided by an embodiment of the present application Figure 2 ;

[0013] Figure 3 A schematic structural diagram of an electronic device provided by an embodiment of the present application Figure 3 ;

[0014] Figure 4 A schematic structural diagram of an electronic device provided by an embodiment of the present application Figure 4 ;

[0015] Figure 5 A schematic structural diagram of an electronic device provided by an embodiment of the present application Figure 5 ;

[0016] Figure 6 A schematic structural diagram of an electronic device provided by an embodiment of the present application Figure 6 ;

[0017] Figure 7 A schematic structural diagram of an electronic device provided by an embodiment of the present application Figure 7 . DETAILED DESCRIPTION

[0018] In order to be able to understand the characteristics and technical contents of the embodiments of the present application more thoroughly, the implementation of the embodiments of the present application will be described in detail below with reference to the drawings, which are only used for reference and are not intended to limit the embodiments of the present application.

[0019] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present application belongs. The terms used herein are only for the purpose of describing the embodiments of the present application and are not intended to limit the present application.

[0020] In the following description, "some embodiments" are described, which describe a subset of all possible embodiments, but it can be understood that "some embodiments" can be the same subset or different subsets of all possible embodiments, and can be combined with each other without conflict.

[0021] It should also be noted that the terms "first, second, third" used in the embodiments of this utility model are only used to distinguish similar objects and do not represent a specific order of objects. It is understood that "first, second, third" can be interchanged in a specific order or sequence where permitted, so that the embodiments of this utility model described herein can be implemented in an order other than that illustrated or described herein.

[0022] Furthermore, the reference to "embodiment" herein means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of the present invention. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0023] The following is a description of the relevant technologies of this utility model.

[0024] With the rapid development of computer technology, the demands on the processing performance of electronic devices are increasing. Currently, electronic devices use dual cores to process two or more threads to improve their processing performance. For example, electronic devices can be wearable devices.

[0025] Wearable devices, also known as computers worn on the body, are intelligent devices worn or carried on the body. They have functions such as computing, storage, and communication, and can connect to the Internet and communicate with other devices. Wearable devices typically use two cores sharing a set of peripherals. Peripherals refer to the input and output devices and external storage devices in a computer system. They play a role in transmitting, forwarding, and storing data and information. External data or instructions are received through peripherals (such as sensors, wireless headphones, etc.), and the processed data or results are transmitted back to the peripherals or other devices to meet the user's needs.

[0026] However, in related technologies, the communication and power supply of peripherals for dual-core wearable devices are not fully considered, which increases the cost of the devices.

[0027] Based on this, this utility model embodiment provides an electronic device in which the first communication terminals of at least two cores are connected to the first communication terminal of a shared module via a switch module. The switch module can control the first communication terminal of the shared module to establish a first connection with the first communication terminal of the first core. At this time, the first core communicates with the shared module through the first connection. The second core is configured to control the power-on of the shared module. In this way, by controlling the communication between at least two cores and the shared module (e.g., a peripheral device) through the switch module and controlling the power-on of the shared module through the second core, the hardware cost of connecting the power supply control of the shared module to cores other than the second core is saved while ensuring communication performance, thereby reducing the hardware cost of the electronic device.

[0028] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments.

[0029] In one embodiment of this utility model, Figure 1 A schematic diagram of the composition structure of an electronic device provided in this embodiment of the present invention. Figure 1 .like Figure 1 As shown, the electronic device 10 includes at least two cores 101, a switching module 102, and a shared module 103; the at least two cores include a first core and a second core, wherein:

[0030] At least two cores 101 have their first communication terminals connected to the first communication terminal of the shared module 103 via a switch module 102.

[0031] The switch module 102 is configured to control the first communication terminal of the shared module 103 to establish a first connection with the first communication terminal of the first core. The first core communicates with the shared module 103 through the first connection. The first core is any one of at least two cores 101.

[0032] The second core is configured to control the power-on of the shared module 103.

[0033] In the embodiments of this utility model, such as Figure 1 As shown, at least two cores 101 include core 1, core 2, ..., core N; where N is a positive integer greater than or equal to 2, and the specific value of N is determined based on the actual situation and is not specifically limited. It should be noted that the first core can be any of these N cores, and the second core can be... Figure 2 The core N shown here is for example only. The specific determination of the second core can be determined according to the actual situation.

[0034] It should be noted that the first core is the core that needs to establish a first connection with the shared module; the second core can be called the power supply core, which provides power to the shared module 103 so that the first core can communicate with the shared module 103 through the first connection. Specifically, the shared module 103 is an input device. Input devices require power to drive their input functions. If the input device does not have a power supply, it will not work properly and will not be able to communicate with the first core. Therefore, using the second core to control the power supply of the shared module 103 can maintain normal communication between the first core and the shared module 103, ensuring smooth data transmission and processing. Here, the first core and the second core can be the same core, or they can be different cores, depending on the actual situation.

[0035] In this embodiment of the invention, the electronic device can be such as a mobile phone, tablet computer, laptop computer, handheld computer, personal digital assistant (PDA), wearable device, etc., and is not specifically limited here. Furthermore, the shared module is a collective term for input devices, output devices, and external storage in a computer system. It is used to acquire external data or instructions and transmit the external data to the core. After receiving the external data or instructions, the core transmits the processed data or results back to the shared module or other devices to meet the user's needs.

[0036] In some embodiments, the electronic device is a wearable device, which may be a smartwatch, smart bracelet, smart headphones, etc., without specific limitations.

[0037] In this embodiment of the invention, the shared module can be referred to as a peripheral device, which includes sensors, displays, audio devices, positioning devices, etc. It should be noted that some peripheral devices (such as heart rate sensors, displays, etc.) can be integrated into the wearable device, working closely with the core of the wearable device to realize its functions; or some peripheral devices (such as Bluetooth headsets, external sensors, etc.) can also wirelessly connect with the wearable device to achieve data sharing and interaction, thereby realizing the functions of the wearable device. It should be noted that at least two cores of the wearable device share these peripheral devices to realize the functions of the wearable device.

[0038] In this embodiment of the utility model, the switch module 103 can be an integrated circuit, or the switch module can be a switch transistor, which can control the first communication terminal of the shared module to establish a first connection with the first communication terminal of the first core. No specific limitation is made here.

[0039] In some embodiments, at least two cores may be independently packaged chips; in other embodiments, at least two cores may be different cores packaged in the same chip, and there is no limitation on this.

[0040] In this embodiment of the invention, at least two cores can be central processing units (CPUs), which are the core components of electronic devices, responsible for executing instructions in the program, processing data, and controlling the operation of the electronic devices.

[0041] In one specific implementation, the second core can run continuously; in another, the second core can run or hibernate, for example, it can hibernate when there is no business to execute, meaning it can hibernate or wake up as needed. Additionally, the first core can also hibernate or wake up as needed. In other words, the second core is in a constantly running state, while at least two other cores are in an occasional running state. Therefore, using the power supply of the peripheral connected to the second core to control the power-on or power-off of the shared module can reduce data interaction.

[0042] In some embodiments, the second core is a low-power core.

[0043] In this embodiment of the invention, the power consumption of the first core is greater than that of the second core; therefore, the first core is a high-power core compared to the second core. When performing the same task, the low-power core consumes less power than the high-power core. Thus, using the low-power core to control the power-on or power-off of the shared module saves power, enabling the electronic device to complete more tasks or provide longer usage time, thereby improving the user experience.

[0044] In some embodiments, the electronic device may include a power supply (or battery) for a peripheral device, and the power supply control terminal (or directly the control terminal) of the second core is connected to the power supply circuit between the power supply and the power supply control terminal of the shared module; the second core is configured to control the power-on or power-off of the shared module based on the power supply.

[0045] In this embodiment of the invention, the power supply control terminal of the second core can be directly connected to the power supply. The second core sends a power supply signal or a power-off signal to the power supply, so that the power supply powers on or off the shared module. Alternatively, the power supply control terminal of the second core can be connected to the module in the power supply circuit that controls the power supply circuit to be turned on or off. The second core sends a power supply signal or a power-off signal to the module to turn on or off the power supply circuit, so that the power supply powers on or off the shared module. No specific limitation is made in this regard.

[0046] It should be noted that the power supply and power-off signals sent by the second core can be represented by voltage levels. For example, a power supply signal can be high and a power-off signal can be low; or a power supply signal can be low and a power-off signal can be high. Here, a high level can be 1 volt (V) and a low level can be 0V, or a high level can be 5V and a low level can be 2V. The values ​​of the high and low levels can be determined according to the actual situation and are not specifically limited.

[0047] It should also be noted that the electronic device also includes a voltage conversion module, such as a DC-DC converter; wherein the voltage conversion module is connected between the power supply and the common module and is configured to convert the voltage output by the power supply into the voltage required by the common module in order to supply power to the common module.

[0048] In this embodiment of the invention, the electronic device may include a task scheduling module. The task scheduling module is configured to determine, based on the functions and data processing requirements of the shared module and the processing capabilities of at least two cores, that a first core should communicate with the shared module, so that the first core receives data sent by the shared module and executes corresponding processing tasks. Alternatively, the task scheduling module is configured to determine, based on the communication protocols supported by at least two cores, that the first core should establish a first connection with the shared module for communication; or, the task scheduling module is configured to evaluate the current resource usage of each core, including utilization rate and energy consumption, and select a core with relatively idle resources to ensure that the data processing of the shared module is not limited by resources.

[0049] For example, if the shared module is a heart rate sensor that only requires simple data processing, then a low-power core can be selected; if the shared module is a complex motion tracker that needs to process a large amount of data, then a high-performance core can be selected.

[0050] In other words, when determining which of the at least two cores will establish the first connection with the shared module, it is necessary to consider any one of the following factors: the function of each core, resource assessment, communication protocol, power consumption and energy efficiency, and actual application scenario. Alternatively, multiple factors may be considered. Through reasonable selection and configuration, efficient operation of electronic devices and optimization of user experience can be achieved.

[0051] It should also be noted that the first core can trigger its own connection with the shared module. For example, the heart rate sensor in the shared module of the wearable device collects the user's heart rate data and sends it to the first core. After evaluating the data, if the first core detects an abnormal heart rate, it proactively establishes a first connection with the display in the shared module and displays a warning message. Simultaneously, the first core can also transmit the data to the cloud for further analysis; this is not specifically limited.

[0052] In some embodiments, the first core is configured to send a switching signal to the switching module 102 when it is determined that it is communicating with the shared module 103; the switching module is further configured to control the first communication terminal of the shared module to establish a first connection with the first communication terminal of the first core based on the switching signal.

[0053] In this embodiment of the utility model, the switching signal is used to instruct the switching module to conduct the communication loop between the first communication terminal of the first core and the first communication terminal of the shared module, so as to establish a first connection between the first core and the shared module. After the first connection is established, the first core can communicate with the shared module through the first connection.

[0054] In this embodiment of the present invention, if the first core has already established a first connection with the shared module before sending the first core switching signal to the switch module 102, then the first core may not send a switching signal to the switch module; or, the first core may also send the first core switching signal to the switch module to further determine whether the first core has established a first connection with the shared module, thereby avoiding errors during data transmission and improving the accuracy of data transmission.

[0055] It should be noted that the first core sends a switching signal to the switching module. If the switching module is connected to other cores besides the first core, the switching module can establish a first connection between the first core and the shared module through the switching signal of the first core, so that the first core and the shared module can communicate through the first connection, which improves the accuracy of data transmission.

[0056] In some embodiments, the first core is further configured to, upon determining that it is communicating with a shared module, stop its current data processing task, receive first data sent by the shared module through a first connection, and perform processing tasks on the first data.

[0057] In this embodiment of the invention, when the first core determines that it needs to communicate with the shared module, it stops its current data processing task, receives the first data sent by the shared module through the first connection, and executes the processing task of the first data. That is, when the first core determines that it needs to communicate with the shared module, it pauses its currently executing low-priority or secondary tasks (such as non-urgent data processing tasks) to free up necessary resources to support the communication task and execute the processing task of the first data with the shared module. This allows the device to respond quickly to communication needs, and by pausing its current data processing task to receive and process new tasks, the device can avoid interference and conflicts between tasks.

[0058] In some embodiments, the first core is further configured to execute the current data processing task of the first core after determining that the processing task of the first data has been completed.

[0059] In this embodiment of the invention, after the first data processing task is completed, the first core continues to execute the stopped data processing task. In this way, by prioritizing the processing of communication tasks and continuing to execute the previously suspended data processing tasks, the device can provide users with a better user experience without seriously affecting the overall function of the device.

[0060] In some embodiments, when the first communication terminal of other cores besides the second core and the first communication terminal of the shared module disconnect the first connection, the first communication terminal of the second core and the second communication terminal of the shared module establish a first connection.

[0061] In this embodiment of the invention, after the first connection between the second core and the shared module is broken, a first connection can be established between the second core and the shared module. That is, the first communication terminal corresponding to the second core and the shared module can be in a constantly connected state.

[0062] In some embodiments, after the first communication terminal of the first core and the first communication terminal of the shared module are disconnected from the first connection, the switching module disconnects the first connection between the first communication terminals of at least two cores and the first communication terminal of the shared module until the first core needs to establish a first connection with the shared module.

[0063] In other words, when the shared module needs to communicate with the first core, the switching module controls the first communication terminal of the shared module to establish a first connection with the first communication terminal of the first core. When the shared module does not need to communicate with the first core, the switching module controls the first communication terminal of the shared module to disconnect from the first core. Thus, by establishing a first connection when the first core needs to interact with the shared module and disconnecting the first connection when the first core does not need to interact with the shared module, the power consumption of the electronic device can be reduced.

[0064] This utility model provides an electronic device that controls the communication between at least two cores and a shared module (e.g., a peripheral device) through a switching module, and controls the power-on of the shared module through a second core. While ensuring communication performance, it saves the hardware cost of connecting the power supply control of the shared module to a core other than the second core, thereby reducing the hardware cost of the electronic device.

[0065] In this embodiment of the utility model, Figure 2 A schematic diagram of the composition structure of an electronic device provided in this embodiment of the present invention. Figure 2 ,like Figure 2As shown, at least two cores 101 include core 1, core 2, switch module 102, and shared module 103; wherein:

[0066] The first communication terminals of core 1 and core 2 are connected to the first communication terminal of shared module 103 through switch module 102;

[0067] The switch module 101 is configured to control the first communication terminal of the shared module 103 to establish a first connection with the first communication terminal of the first core, wherein the first core is either core 1 or core 2.

[0068] Core 2 is configured to power on the shared module 103, enabling the shared module 103 to communicate with the first core through a first connection.

[0069] In the embodiments of this utility model, such as Figure 2 As shown, the second core can be core 2, which is configured to control the power-on of the shared module. Figure 2 As an example only, when there are multiple cores, the second core is determined to be one of the multiple cores based on the actual situation, without making any specific restrictions.

[0070] It should be noted that, in this utility model and the following embodiments, based on Figure 2 The illustrated embodiments will be used for explanation.

[0071] In some embodiments, when the first core and the second core are the same core among at least two cores; after the first core sends a switching signal to the switch module 102, the first core is also configured to control the shared module 103 to power on; the first core is also configured to control the shared module 103 to power off when it is determined that the communication connection with the shared module 103 has been disconnected.

[0072] In this embodiment of the utility model, when the first core and the second core are the same core among at least two cores, such as Figure 3 As shown, when both the first core and the second core are core 2, after core 2 sends a switching signal to the switching module, the switching module 102 controls core 2 and the shared module 103 to establish a first connection based on the switching signal. Then, core 2 controls the shared module to power on, so that core 2 can communicate with the shared module 103 through the first connection. When core 2 determines that it will disconnect from the shared module, core 2 controls the shared module to power off.

[0073] In this embodiment of the utility model, after the first core and the shared module 103 establish a communication connection, the shared module 103 needs to be powered on to ensure smooth data transmission and processing; when the first core does not need to communicate, the power supply to the shared module is stopped, which can reduce energy consumption.

[0074] In some embodiments, when the first core and the second core are different cores among at least two cores; after the first core sends a switching signal to the switching module 103, the first core is also configured to perform inter-core communication with the second core and send a power-on signal to the second core, and the second core is also configured to control the shared module 103 to power on based on the power-on signal; or, the first core is also configured to perform inter-core communication with the second core and send a power-off signal to the second core when it is determined that the communication connection with the shared module 103 is disconnected, and the second core is also configured to control the shared module 103 to power off based on the power-off signal.

[0075] In this embodiment of the utility model, when the first core and the second core are different cores among at least two cores, such as Figure 4 As shown, when the first core is core 1 and the second core is core 2, when core 1 needs to communicate with the shared module, core 1 sends a switching signal to the switching module 102. The switching module 102 controls core 1 and the shared module 103 to establish a first connection based on the switching signal. Since core 2 controls the power-on or power-off of the shared module 103, core 1 also needs to communicate with core 2. Core 1 sends a power-on signal to core 2 through core communication, so that core 2 controls the shared module 103 to power on based on the power-on signal, thus core 1 can communicate with the shared module 103 through the first connection. Similarly, when core 1 determines that the communication connection with the shared module 103 is broken, core 1 sends a power-off signal to core 2 through core communication, so that core 2 controls the shared module 103 to power off based on the power-off signal.

[0076] It should be noted that if the second core malfunctions, there is no question of whether or not the shared module 103 is used. When the first core (which is a different core from the second core) needs to use the shared module, powering on or off the shared module requires confirmation through inter-core communication. When there is a problem with inter-core communication, it can be understood as a power-off failure, which can improve the perception of power-off failure of peripherals.

[0077] In some embodiments, when the first core and the second core are at least two different cores...

[0078] The first communication terminal of the first core is connected to the first terminal of the switch module, and the common terminal of the switch module is connected to the first communication terminal of the shared module; when the first terminal of the switch module and the common terminal are connected, the first core and the shared module establish a first connection.

[0079] The first communication terminal of the second core is connected to the second terminal of the switch module, and the common terminal of the switch module is also connected to the first communication terminal of the shared module; when the second terminal and the common terminal of the switch module are connected, the second core establishes a first connection with the shared module.

[0080] In this embodiment of the utility model, when the first core and the second core are different cores among at least two cores, such as Figure 4 As shown, when the first core is core 1 and the second core is core 2, if the first core needs to communicate with the shared module, the first end of the switch module and the common end can be connected to establish a first connection between the first core and the shared module; if the second core needs to communicate with the shared module, the second end of the switch module can be connected to establish a first connection between the second core and the shared module, thus enabling the interaction between the shared module and the core.

[0081] It should be noted that the common terminal of the switch module is connected to the first communication terminal of the shared module. The switch module may also include a first terminal, a second terminal, ..., an Mth terminal. In other words, the specific value of M is related to the number of cores contained in at least two cores, and there is no specific limitation on this.

[0082] In some embodiments, such as Figure 5 As shown, the electronic device also includes an inter-core communication module 104, wherein: the inter-core communication module 104 connects the third communication terminal of the first core and the third communication terminal of the second core, and the inter-core communication module 104 is configured to establish a communication connection between the first core and the second core.

[0083] In this embodiment of the invention, the inter-core communication module 104 is an internal module of the electronic device used to realize communication between multiple cores. It is responsible for transmitting data, instructions, and synchronization signals between the cores to ensure that the device can operate efficiently and stably. Specifically, the inter-core communication module 104 can be implemented by hardware circuits, such as bus controllers, cache coherency controllers, interrupt controllers, etc. These hardware circuits can ensure high speed, low latency, and reliability of inter-core communication. In addition, the inter-core communication module 104 can also determine which of at least two cores establishes a first connection with the shared module. For example, the inter-core communication module 104 determines which core establishes a first connection with the shared module for communication based on the communication protocols supported by each core.

[0084] In another embodiment of the present invention, in the electronic device, at least two cores further include a second communication terminal, and the shared module further includes at least one second communication terminal;

[0085] At least two core second communication terminals establish a second connection with at least one second communication terminal of the shared module; the first core is also configured to receive a first message notification sent by the shared module through the second connection; the first core is also configured to determine to communicate with the shared module based on the first message notification.

[0086] In this embodiment of the invention, the first communication terminal can be understood as a data transmission pin, used to send or receive data between the first core and the shared module. Correspondingly, the first connection can also be understood as a data transmission connection. The second communication terminal can be understood as a message notification pin, used to send or receive notification messages. Correspondingly, the second connection can also be understood as a message notification connection. Here, the second communication terminal can be called an interrupt pin. The interrupt pin of the shared module is used to send an interrupt request signal (i.e., message notification) to the core. When the shared module needs the core's attention or processing, it sends an electrical signal to the core through the interrupt pin. This signal can be level-triggered or edge-triggered. The interrupt pin of the core is used to receive interrupt request signals from the shared module or other interrupt sources. Upon receiving an interrupt request, the core will pause the currently executing data processing task and jump to the corresponding interrupt service routine for processing, that is, receive the first data sent by the shared module and execute the processing task of the first data.

[0087] In some embodiments, Figure 5 A schematic diagram of the composition structure of an electronic device provided in this embodiment of the present invention. Figure 6 .like Figure 6 As shown, at least two cores also include a second communication terminal, and the shared module also includes a second communication terminal; wherein:

[0088] At least two cores' second communication terminals establish a second connection with a second communication terminal of the shared module; the first core is also configured to receive a first message notification sent by the shared module through the second connection; the first core is also configured to determine whether to communicate with the shared module based on the first message notification.

[0089] In this embodiment of the present invention, when the second communication terminals of at least two cores are connected to a second communication terminal of a shared module, if the shared module sends a first message notification through the second connection, at least two cores can receive the first message notification, and at least two cores can determine through inter-core communication that the first core communicates with the shared module; or, the first message notification carries a core identifier that establishes a communication connection with the first core, and when the first core receives the first message notification, the first core establishes a communication connection with the shared module based on the first message notification.

[0090] In this embodiment of the utility model, when the first core and the second core are the same core among at least two cores, if the first core determines to establish a communication connection with the shared module according to the received first message notification, it sends a switching signal of the first core to the switch signal so that the first core establishes a first connection with the shared module to communicate, and controls the shared module to power on so that the first core and the shared module can communicate through the first connection; and when the first core determines to disconnect the communication connection with the shared module, it controls the shared module to power off.

[0091] In this embodiment of the invention, when the first core and the second core are different cores among at least two cores, if the first core determines, based on the received first message notification, to establish a communication connection with the shared module, it sends a switching signal to the switch signal to enable the first core to establish a first connection with the shared module for communication; and it also performs inter-core communication with the second core, sending a power-on signal to the second core so that the second core controls the shared module to power on in response to the power-on signal. When the first core determines to disconnect from the shared module, it sends a power-off signal to the second core through inter-core communication, so that the second core controls the shared module to power off in response to the power-off signal.

[0092] It should be noted that when the first core determines to communicate with the shared module based on the first message notification, the first core is also configured to stop the current data processing task of the first core, receive the first data sent by the shared module, and execute the processing task of the first data; and after the first core determines that the task of the first data has been completed, it executes the data processing task that the first core has paused.

[0093] In some embodiments, Figure 7 A schematic diagram of the composition structure of an electronic device provided in this embodiment of the present invention. Figure 7 .like Figure 3 As shown, at least two cores 101 include core 1 and core 2, and at least two cores also include a second communication terminal, and the shared module 103 also includes two second communication terminals; wherein:

[0094] The second communication terminals of core 1 and core 2 respectively establish a second connection with the two second communication terminals of the shared module 103; the first core is also configured to receive a first message notification sent by the shared module 103 through the corresponding second connection of the first core; the first core is also configured to determine to communicate with the shared module 103 based on the first message notification.

[0095] In this embodiment of the invention, the number of second communication terminals of the shared module 103 can be the same as the number of cores included in at least two cores. Each second communication terminal of the shared module is connected to the second communication terminal of one core. Thus, if the shared module needs to establish a communication connection with the first core, it sends a first message notification to the first core through the second communication terminal corresponding to the first core. Based on the first message notification, the first core determines to communicate with the shared module. At this time, the first core sends a switching signal to the switching module to establish a first connection between the first core and the shared module for communication.

[0096] Here, when the first core and the second core are the same core among at least two cores, the second core directly controls the power-on or power-off of the shared module; when the first core and the second core are different cores among at least two cores, the first core sends a power-on signal or a power-off signal to the second core through inter-core communication, so that the second core controls the power-on or power-off of the shared module in response to the power-on signal or the power-off signal. Here, the steps are the same as in the previous embodiments, and will not be elaborated further.

[0097] In some embodiments, at least two cores include a second communication terminal, and a shared module includes a second communication terminal. The second communication terminals of the at least two cores are connected to the second communication terminal of the shared module through a switch module. The switch module controls the second communication terminal of the shared module to establish a second connection with the second communication terminal of the first core. The first core is also configured to receive a first message notification sent by the shared module through the second connection. The first core is also configured to determine whether to communicate with the shared module based on the first notification message.

[0098] In this embodiment of the invention, at least two core first communication terminals and second communication terminals can be connected to a switch module and controlled by the switch module. That is, the first connection and the second connection are established simultaneously by the switch module. For example, when the switch module controls the first core to establish a first connection with the shared module, the second connection between the first core and the shared module is also established at the same time, which can reduce the complexity of software control.

[0099] It should be noted that if the core currently establishing a communication connection with the shared module is the same core that needs to establish a communication connection with the shared module, then that core communicates with the shared module by receiving the first message notification sent by the shared module. If the core currently establishing a communication connection with the shared module is not the same core that needs to establish a communication connection with the shared module, that is, if the first message notification sent by the shared module indicates that the required core is another core besides the core currently establishing a communication connection with the shared module, then that core can communicate with other cores and send the first message notification to other cores through inter-core communication, so that other cores can interact with the shared module.

[0100] In another possible implementation, such as Figure 3 As shown, at least two cores include a third core, the third core includes a second communication terminal, and the shared module 103 also includes a second communication terminal; wherein:

[0101] The third core establishes a second connection with the second communication terminal of the shared module 103; the third core is also configured to receive a first message notification sent by the shared module 103 through the second connection; the third core is also configured to determine, based on the first notification message, that the first core and the shared module are communicating.

[0102] In this embodiment of the invention, the third core can be the second core, or it can be any core other than the second core. Alternatively, the third core can be the first core that establishes a communication connection with the shared module, or it can be a first core that does not establish a communication connection with the shared module; there is no specific limitation, and it is determined according to the actual situation. ​ This is just one example; the third core could also be core 1 or core 2, depending on the specific circumstances. It's important to note that the third core is the one among at least two cores that frequently receives message notifications; that is, the frequency with which the third core receives message notifications from the shared module is higher than that of any other core among the at least two cores. This way, directly connecting the second communication terminal of the third core to the second communication terminal of the shared module reduces data interaction and also reduces the need for connections between the second communication terminals of other cores and the communication terminals of the shared module, thus lowering the hardware cost of the electronic device. It should be noted that the first message notification sent by the shared module can carry a core identifier that establishes a communication connection with the first core. For example, the core identifier could be the communication protocol corresponding to the first core. The third core determines whether it is the same core as the first core among at least two cores based on the first message, and then establishes a communication connection between the first core and the shared module. Alternatively, the third core can determine whether it is the same core as the first core among at least two cores based on its own resources, for example, if the third core is currently idle, it can be the same core as the first core among at least two cores.

[0103] In one specific embodiment, the third core is further configured to determine, based on the first message notification, that it communicates with the shared module; or, the third core is further configured to, when it determines, based on the first message notification that the first core communicates with the shared module, perform inter-core communication with the first core and send the first message notification to the first core, and the first core is further configured to determine, based on the first message notification, that it communicates with the shared module.

[0104] In this embodiment of the utility model, the third core determines that it is the same core as the first core among at least two cores based on the first message notification, and the third core communicates with the shared module based on the first message notification; the third core determines that it is a different core from the first core among at least two cores based on the first message notification, and the third core is also configured to perform inter-core communication with the first core and send the first message notification to the first core, so that the first core determines to communicate with the shared module based on the first message notification.

[0105] In this embodiment of the invention, when the third core determines, based on a first message notification, that it is the same core as the first core among at least two cores, it sends a switching signal for the first core to the switching module, thereby establishing a first connection between the third core and the shared module. When the third core determines, based on the first message notification, that it is a different core from the first core among at least two cores, the third core sends a first notification message to the first core via core communication. After receiving the first notification message, the first core sends a switching signal for the first core to the switching module, thereby establishing a first connection between the first core and the shared module.

[0106] In this embodiment of the utility model, after the first core and the shared module establish a first connection, it is further determined whether the first core and the second core are the same core among at least two cores. Then, the second core controls the shared module to power on or off. Referring to the foregoing embodiment, this will not be elaborated further.

[0107] In another embodiment of this utility model, an electronic device based on the foregoing embodiments, ​ A schematic diagram of the composition structure of an electronic device provided in this embodiment of the present invention. ​ .like ​ As shown, the electronic device includes core 1, core 2, switch module 102, peripheral 701, and inter-core communication module 104. ​ As shown, in this embodiment of the utility model, the power control pin of the peripheral device is mounted on a core (i.e., core 2), while the communication control pins (i.e., the first communication terminal) of the peripheral device 701, core 1 and core 2 are mounted on a hardware switch.

[0108] In this embodiment of the invention, peripheral 701 is a shared module as described in the above embodiments. Furthermore, the electronic device 10 is a wearable device; wearable devices using dual cores share a single set of peripherals, and either core in the dual-core configuration can fully utilize all the functions of peripheral 701.

[0109] In one possible implementation, when the core 2, which is powered on, needs to use the peripheral 701, the specific process is as follows: (1) Core 2 sends a switching signal to the switching module, so that Core 2 connects to the peripheral 701; (2) Core 2 controls the peripheral 701 to power on; (3) Core 2 communicates with the peripheral; (4) Core 2 controls the peripheral 701 to power off; (5) Core 2 sends a switching signal to the switching module, so that the peripheral connects to Core 1. In this way, the communication between Core 2 and the peripheral 701 is completed.

[0110] In this embodiment of the utility model, after the core 2 controls the peripheral device to power down, it may not send the core 1 switching signal to the switch signal. When the core 1 uses the peripheral device, the core 1 sends the core 1 switching signal so that the core 1 establishes a connection with the peripheral device 701.

[0111] In another possible implementation, when the non-powered core (i.e., core 1) needs to use the peripheral, the specific process is as follows: (1) Core 1 sends a switching signal to the switching module, so that core 1 connects to peripheral 701; (2) Core 1 sends a power-on signal to core 2 through inter-core communication, so that core 2 controls peripheral 701 to power on; (3) Core 1 communicates with the peripheral; (4) Core 1 sends a power-off signal to core 2 through inter-core communication, so that core 2 controls peripheral 701 to power off; (5) Core 1 sends a switching signal to the switching module, so that the peripheral connects to core 2. In this way, the communication between core 1 and peripheral 701 is completed.

[0112] In this embodiment of the utility model, core 2 can be understood as a power supply core. When core 1 needs to communicate with peripheral 701, core 1 and core 2 conduct inter-core communication, so that core 2 controls peripheral 701 to power on or off.

[0113] In some embodiments, the data transmission pins (i.e., the first communication terminal) and interrupt pins (i.e., the second communication terminal) of the core and peripherals may not be distinguished, and they may all be connected through a switch module. In some embodiments, the data transmission pins and interrupt pins of the core and peripherals are distinguished, the data transmission pins of the core and peripherals are connected through a switch module, and the interrupt pins of the core and peripherals are directly connected.

[0114] In this embodiment of the invention, the data transmission pin and the interrupt pin are distinguished and connected in different ways. For the interrupt pin, a more complex control method is required, which makes the software control more complicated.

[0115] This utility model provides an electronic device, specifically a dual-system peripheral power supply and communication solution. By attaching the peripheral's power control pin to one core and the peripheral's communication control to a switch module connecting two cores, the communication pin is controlled by the switch, preserving communication performance. Simultaneously, the peripheral's power control is entirely controlled by one core, saving the hardware cost of connecting another core. Furthermore, in this utility model embodiment, if the core with the peripheral's power supply malfunctions, that core will not be affected by whether or not it is using the peripheral. When the other core needs to use the peripheral, powering on or off the peripheral requires inter-core communication confirmation. If inter-core communication fails, it can be interpreted as a power-off failure, improving the software's awareness of peripheral power-off failures.

[0116] It should be noted that, in this utility model, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, product, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, product, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, product, or apparatus that includes that element.

[0117] In the several embodiments provided by this utility model, it should be understood that the disclosed systems, devices, and methods can be implemented in other ways. The device embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods, such as: multiple units or components can be combined, or integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the various components shown or discussed can be through some interfaces, and the indirect coupling or communication connection between devices or units can be electrical, mechanical, or other forms.

[0118] The units described above as separate components may or may not be physically separate; the components shown as units may or may not be physical units; they may be located in one place or distributed across multiple network units; some or all of the units may be selected to achieve the purpose of this embodiment according to actual needs. Furthermore, in the various embodiments of this utility model, all functional units may be integrated into one processing unit, or each unit may be a separate unit, or two or more units may be integrated into one unit; the integrated unit may be implemented in hardware or in a combination of hardware and software functional units.

[0119] The above are merely preferred embodiments of the present utility model and are not intended to limit the scope of protection of the present utility model. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present utility model should be included within the scope of protection of the present utility model.

Claims

1. An electronic device, comprising: The electronic device comprises at least two cores, a common module and a switch module; the at least two cores comprise a first core and a second core, wherein: The first communication end of the at least two cores is connected with the first communication end of the common module through the switch module; The switch module is configured to control the first communication end of the common module to establish a first connection with the first communication end of the first core, and the first core communicates with the common module through the first connection, and the first core is any core in the at least two cores; The second core is configured to control the common module to be powered on.

2. The electronic device of claim 1, wherein, The first core is configured to send a switching signal of the first core to the switch module in a case where it is determined to communicate with the common module; and the switch module is further configured to control the first communication end of the common module to establish a first connection with the first communication end of the first core based on the switching signal.

3. The electronic device of claim 2, wherein, When the first core and the second core are the same core in the at least two cores, after the first core sends the switching signal to the switch module, the first core is further configured to control the common module to be powered on. The first core is further configured to control the common module to be powered off in a case where it is determined that the communication connection with the common module is disconnected.

4. The electronic device of claim 2, wherein, When the first core and the second core are different cores in the at least two cores, after the first core sends the switching signal to the switch module, the first core is further configured to perform inter-core communication with the second core, and send a power-on signal to the second core; and the second core is further configured to control the common module to be powered on based on the power-on signal. The first core is further configured to perform inter-core communication with the second core, and send a power-off signal to the second core in a case where it is determined that the communication connection with the common module is disconnected; and the second core is further configured to control the common module to be powered off based on the power-off signal.

5. The electronic device of claim 1, wherein, When the first core and the second core are different cores in the at least two cores, The first communication end of the first core is connected with the first end of the switch module, and the common end of the switch module is connected with the first communication end of the common module; when the first end and the common end of the switch module are in communication, the first core establishes a first connection with the common module; The first communication end of the second core is connected with the second end of the switch module, and the common end of the switch module is further connected with the first communication end of the common module; when the second end and the common end of the switch module are in communication, the second core establishes a first connection with the common module.

6. The electronic device of claim 1, wherein The first core is further configured to stop a current data processing task of the first core in a case where it is determined to communicate with the common module, receive first data sent by the common module through the first connection, and perform a processing task of the first data.

7. The electronic device of claim 1, wherein, The at least two cores further comprise a second communication end, and the common module further comprises at least one second communication end. The second communication end of the at least two cores establishes a second connection with at least one second communication end of the common module; The first core is further configured to receive a first message notification sent by the common module through the second connection; The first core is further configured to determine communication with the common module based on the first message notification.

8. The electronic device of any of claims 1-7, wherein, The second core is a low-power core.

9. The electronic device of any of claims 1-7, wherein, The electronic device further comprises an inter-core communication module, wherein: The inter-core communication module connects a third communication end of the first core and a third communication end of the second core, and the inter-core communication module is configured to establish a communication connection between the first core and the second core.

10. The electronic device of any of claims 1-7, wherein, When the first communication end of the core other than the second core and the first communication end of the common module are disconnected from the first connection, the first communication end of the second core and the second communication end of the common module establish the first connection.

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