Mini-LED chip, display device and lighting device

Abstract

The utility model provides a Mini-LED chip, a display device and a lighting device, and relates to the technical field of semiconductors. The position of the groove is changed from one side of one long side to one side of one short side in the prior art, based on the adjustment of the position of the groove on a layout, a multi-quantum well layer with a symmetric structure based on a symmetric axis can be formed when the epitaxial structure is processed, the symmetric axis is a midpoint connecting line of the two short sides, and the thickness of the multi-quantum well layer is smaller than that of the groove. The Mini-LED chip is provided with a symmetric axis, so that the light-emitting area of the Mini-LED chip is of a symmetric structure based on the symmetric axis, it is guaranteed that after the Mini-LED chip is fixed to the blue film, the symmetric light-emitting area can be made to have the same adhesive degree with the colloid of the blue film on the two sides of the symmetric axis, and the problems that after the front face of the Mini-LED chip faces downwards and is subjected to external force, the adhesive force is not enough for supporting, and the chip inclines, falls and the like are solved, and the service life of the Mini-LED chip is prolonged. And after delivery to the client, the die bonding efficiency of the client is improved.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and more particularly to a Mini-LED chip, a display device, and a lighting device. Background Technology

[0002] Mini-LED (Mini-Light Emitting Diode) chips have a rectangular design with electrodes on the same side. They require slots to bring out the P-electrode and to create current spread based on the P-electrode. For example... Figure 1 As shown, Figure 1 This is a schematic diagram of the layout of a Mini-LED chip in the prior art. Currently, the P electrode 11 and P electrode finger 12 are located on one side of one of the long sides of the rectangular Mini-LED chip, and the length extension direction of the P electrode finger 12 is approximately parallel to the long side. The N electrode 13 and N electrode finger 14 are located on one side of the other long side of the rectangular Mini-LED chip, and the length extension direction of the N electrode finger 14 is approximately parallel to the long side. Since the P electrode 11 and P electrode finger 12 are grooved to form a groove 15, the height of the plane where the P electrode 11 and P electrode finger 12 are located is lower than the height of the plane where the N electrode 13 and N electrode finger 14 are located. That is, there is a height difference (or step difference) between the two long sides of the rectangular Mini-LED chip. When the line connecting the midpoints of the two short sides of the rectangular Mini-LED chip is taken as the axis of symmetry M, the light-emitting area K1 of the current Mini-LED chip is an asymmetric structure, that is, the multi-quantum well layer is an asymmetric structure based on the axis of symmetry M.

[0003] Mini-LED chips are typically shipped with the front side (the surface where the electrodes are located) facing the blue film, and the back side (the sapphire substrate) facing the release film. The effective bonding area between the Mini-LED chip and the blue film is the area where the light-emitting region K1 is located. Figure 1 As shown, the degree of adhesion between the asymmetric light-emitting area K1 and the colloidal material of the blue film on both sides of the axis of symmetry M will be significantly different. Due to the larger range of force on the long side, when the Mini-LED chip is subjected to external force with its face down, the adhesive force on the long side where the P electrode 11 is located is insufficient to support it, resulting in problems such as chip tilting and crystal flipping. This will affect the customer's die bonding efficiency when shipped to the customer. Utility Model Content

[0004] In view of the above problems, this application provides a Mini-LED chip, a display device, and a lighting device to solve problems such as chip tilting and die flipping in Mini-LED chips, thereby improving the die bonding efficiency for customers. The specific solution is as follows:

[0005] The first aspect of this application provides a Mini-LED chip, wherein the Mini-LED chip is a rectangular Mini-LED chip, the Mini-LED chip includes two short sides disposed opposite each other, and the Mini-LED chip includes:

[0006] Target substrate;

[0007] An epitaxial structure located on one side of the target substrate, the epitaxial structure comprising a P-type semiconductor layer, a multiple quantum well layer and an N-type semiconductor layer sequentially stacked in a first direction; the first direction is perpendicular to the plane of the target substrate and extends from the target substrate to the epitaxial structure;

[0008] The epitaxial structure on one of the short sides of the Mini-LED chip has a groove that exposes a portion of the surface of the P-type semiconductor layer.

[0009] The P electrode is located within the groove and connected to the P-type semiconductor layer; the N electrode is located on one side of the other short side of the Mini-LED chip and connected to the N-type semiconductor layer.

[0010] The multi-quantum well layer is a symmetrical structure based on a symmetry axis, which is the line connecting the midpoints of the two short sides.

[0011] Preferably, in the above-mentioned Mini-LED chip, the Mini-LED chip further includes:

[0012] An N-electrode finger connected to the N-electrode; the N-electrode is symmetrical about the axis of symmetry, and / or the N-electrode finger is symmetrical about the axis of symmetry.

[0013] Preferably, in the above-mentioned Mini-LED chip, the Mini-LED chip further includes:

[0014] A P-electrode finger located within the groove and connected to the P-electrode; the P-electrode is symmetrical about the axis of symmetry, and / or the P-electrode finger is symmetrical about the axis of symmetry.

[0015] Preferably, in the above-mentioned Mini-LED chip, the Mini-LED chip further includes a P-type window layer located between the P-type semiconductor layer and the target substrate.

[0016] Preferably, in the above-mentioned Mini-LED chip, the doping concentration range of the P-type window layer is 1E18cm⁻¹. -3 -2E18cm -3 .

[0017] Preferably, in the above-mentioned Mini-LED chip, the Mini-LED chip further includes:

[0018] A bonding layer located between the P-type window layer and the target substrate.

[0019] Preferably, in the above-mentioned Mini-LED chip, the Mini-LED chip further includes:

[0020] A protective layer and a DBR layer cover the epitaxial structure; the protective layer and the DBR layer expose a portion of the surface of the P electrode and a portion of the surface of the N electrode.

[0021] A second aspect of this application provides a method for fabricating a Mini-LED chip. The fabricated Mini-LED chip is a rectangular Mini-LED chip, comprising two oppositely disposed short sides. The method for fabricating the Mini-LED chip includes:

[0022] Provide a temporary substrate and a target substrate;

[0023] An epitaxial structure is formed on the temporary substrate, the epitaxial structure comprising an N-type semiconductor layer, a multiple quantum well layer and a P-type semiconductor layer stacked sequentially.

[0024] The target substrate is bonded to the epitaxial structure, and the temporary substrate is removed; the epitaxial structure located on the target substrate includes a P-type semiconductor layer, a multiple quantum well layer, and an N-type semiconductor layer sequentially stacked in a first direction; the first direction is perpendicular to the plane where the target substrate is located and points from the target substrate to the epitaxial structure;

[0025] A groove is formed by slotting the epitaxial structure located on one of the short sides, and the groove exposes a portion of the surface of the P-type semiconductor layer;

[0026] A P electrode and an N electrode are formed; the P electrode is located in the groove and connected to the P-type semiconductor layer, and the N electrode is located on the epitaxial structure on one side of the other short side and connected to the N-type semiconductor layer; wherein, the multi-quantum well layer is a symmetrical structure based on a symmetry axis, which is the line connecting the midpoints of the two short sides.

[0027] A third aspect of this application provides a display device, the display device comprising any of the Mini-LED chips described above.

[0028] A fourth aspect of this application provides a lighting device, the lighting device comprising any of the Mini-LED chips described above.

[0029] By employing the above technical solution, this application provides a Mini-LED chip, a display device, and a lighting device. A groove is formed in the region containing the P electrode on one side of one of the short sides of a rectangular Mini-LED chip. The P electrode is located within the groove, and the N electrode is located on the epitaxial structure on the other short side. That is, the position of the groove is changed from being located on one side of one long side in the prior art to being located on one side of one short side. Based on the adjustment of the groove's position on the layout, a multi-quantum well layer with a symmetrical structure based on a symmetry axis can be formed during the processing of the epitaxial structure. The symmetry axis is the line connecting the midpoints of the two short sides, so that the light-emitting area of ​​the Mini-LED chip has a symmetrical structure based on this symmetry axis. This ensures that after the Mini-LED chip is fixed on the blue film, the symmetrical light-emitting area on both sides of the symmetry axis has the same degree of adhesive adhesion to the blue film. This solves the problem of insufficient adhesive force to support the Mini-LED chip when it is facing downwards, leading to chip tilting and flipping, thus improving the die bonding efficiency for customers after delivery. Attached Figure Description

[0030] The above and other features, advantages, and aspects of the embodiments of this disclosure will become more apparent from the accompanying drawings and the following detailed description. Throughout the drawings, the same or similar reference numerals denote the same or similar elements. It should be understood that the drawings are schematic, and the originals and elements are not necessarily drawn to scale.

[0031] Figure 1 This is a schematic diagram of the layout of a Mini-LED chip in the prior art;

[0032] Figure 2 A schematic diagram of the layout of a Mini-LED chip provided for an embodiment of this utility model;

[0033] Figure 3 A method for providing an embodiment of this utility model along Figure 2 A schematic diagram of the cross-section along the AA' direction;

[0034] Figure 4 A schematic diagram of another Mini-LED chip provided for an embodiment of this utility model;

[0035] Figure 5 A schematic diagram of the layout of another Mini-LED chip provided for an embodiment of this utility model;

[0036] Figure 6 A schematic diagram of the layout of another Mini-LED chip provided for an embodiment of this utility model;

[0037] Figure 7 A schematic diagram of the layout of another Mini-LED chip provided for an embodiment of this utility model;

[0038] Figure 8 A schematic diagram of the layout of another Mini-LED chip provided for an embodiment of this utility model;

[0039] Figure 9 A schematic diagram of the layout of another Mini-LED chip provided for an embodiment of this utility model;

[0040] Figure 10 A schematic diagram of the layout of another Mini-LED chip provided for an embodiment of this utility model;

[0041] Figure 11 Another approach provided for embodiments of this utility model Figure 2 A schematic diagram of the cross-section along the AA' direction;

[0042] Figure 12 Another method provided for embodiments of this utility model Figure 2 A schematic diagram of the cross-section along the AA' direction;

[0043] Figure 13 This is a schematic flowchart illustrating a method for fabricating a Mini-LED chip according to an embodiment of the present invention. Detailed Implementation

[0044] The embodiments of this application are described below with reference to the accompanying drawings. The terminology used in the implementation section of this application is only for explaining specific embodiments and is not intended to limit the application. Those skilled in the art will recognize that, with technological advancements and the emergence of new scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.

[0045] To make the above-mentioned objectives, features and advantages of this utility model more apparent and understandable, the utility model will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0046] It should be noted that the directional terms appearing in this utility model are based on the relative positional relationships shown in the accompanying drawings and should not be taken as absolute limitations on this application.

[0047] refer to Figure 2 , Figure 2 This is a schematic diagram of a Mini-LED chip provided in an embodiment of the present invention, with reference to... Figure 3 , Figure 3 A method for providing an embodiment of this utility model along Figure 2A cross-sectional schematic diagram along the AA' direction. The Mini-LED chip provided in this embodiment of the present invention is a rectangular Mini-LED chip, which includes two oppositely arranged short sides. The Mini-LED chip provided in this embodiment of the present invention includes: a target substrate 16.

[0048] An epitaxial structure located on one side of the target substrate 16 includes a P-type semiconductor layer 17, a multiple quantum well layer 18, and an N-type semiconductor layer 19 sequentially stacked in a first direction X; the first direction X is perpendicular to the plane where the target substrate 16 is located and points from the target substrate 16 to the epitaxial structure.

[0049] The epitaxial structure on one of the short sides of the Mini-LED chip has a groove 15 that exposes a portion of the surface of the P-type semiconductor layer 17.

[0050] The P electrode 11 is located within the groove 15 and connected to the P-type semiconductor layer 17; the N electrode 13 is located on the other short side of the Mini-LED chip and connected to the N-type semiconductor layer 19.

[0051] The multi-quantum well layer 18 is a symmetrical structure based on the symmetry axis M, which is the line connecting the midpoints of the two short sides.

[0052] Specifically, in this embodiment of the invention, the target substrate 16 includes, but is not limited to, a sapphire substrate. The example only uses a sapphire substrate as the target substrate 16. The N-type semiconductor layer 19 is an N-type doped semiconductor layer, and the P-type semiconductor layer 17 is a P-type doped semiconductor layer. For example, the N-type semiconductor layer 19 can be an N-type doped GaN layer, and the P-type semiconductor layer 17 can be a P-type doped GaN layer. It should be noted that this embodiment of the invention only uses a GaN layer as an example of a semiconductor layer; obviously, the semiconductor layer can also be a semiconductor layer made of other semiconductor materials.

[0053] The core structure of a Mini-LED chip is a PN junction. When a forward bias is applied to the PN junction, electrons flow from the N-type region to the P-type region, and holes flow from the P-type region to the N-type region. These charge carriers recombine near the PN junction, releasing energy and generating photons to emit light. The multiple quantum well layer 18 is a key structure in the Micro-LED chip, its function being to improve the recombination efficiency of charge carriers and the luminous efficiency. The multiple quantum well layer 18 consists of alternating quantum wells (QWs) and quantum barriers (QBs). Typically, the band gap of the quantum wells is smaller than that of the quantum barriers. This confines electrons and holes within the quantum wells under the influence of an external electric field, thereby increasing the recombination probability of electrons and holes and thus improving the luminous efficiency.

[0054] The Mini-LED chip provided in this embodiment of the present invention has a groove 15 formed in the region where the P electrode 11 is located on one side of one of the short sides of a rectangular Mini-LED chip. The P electrode 11 is located within the groove 15, and the N electrode 13 is located on the epitaxial structure on the other short side. Combined with... Figure 1 and Figure 2 As shown, the position of the groove 15 is changed from being located on one side of one of the long sides in the prior art to being located on one side of one of the short sides. Based on the adjustment of the position of the groove 15 on the layout, a multi-quantum well layer 18 based on the symmetry axis M can be formed when processing the epitaxial structure. This ensures that the light-emitting area K1 of the Mini-LED chip is based on the symmetry axis M, so that after the Mini-LED chip is fixed on the blue film, the symmetrical light-emitting area K1 can have the same degree of adhesive adhesion to the blue film on both sides of the symmetry axis M. This solves the problem that the adhesive force is insufficient to support the Mini-LED chip when it is facing down and subjected to external force, resulting in chip tilting and flipping. This improves the die bonding efficiency for customers after delivery.

[0055] Furthermore, based on the technical solution of this application, the position of the groove 15 is changed from being located on one side of one of the long sides in the prior art to being located on one side of one of the short sides. The area of ​​the etched multi-quantum well layer 18 will be reduced, thereby achieving the purpose of increasing the area of ​​the light-emitting region and increasing the brightness.

[0056] Optionally, the groove 15 can also be designed as a symmetrical structure based on the axis of symmetry M, thereby improving the symmetry of the Mini-LED chip based on the axis of symmetry M and reducing the probability of the Mini-LED chip tilting or flipping when subjected to external force with its face facing down.

[0057] In an optional embodiment of this utility model, reference is made to Figure 4 , Figure 4 A schematic diagram of another Mini-LED chip provided in an embodiment of this utility model, with reference to... Figure 5 , Figure 5 A schematic diagram of the layout of another Mini-LED chip provided in this embodiment of the present invention, with reference to... Figure 6 , Figure 6 A schematic diagram of the layout of another Mini-LED chip provided in this embodiment of the present invention, with reference to... Figure 7 , Figure 7 A schematic diagram of the layout of another Mini-LED chip provided in this embodiment of the present invention, with reference to... Figure 8 , Figure 8 A schematic diagram of the layout of another Mini-LED chip provided in this embodiment of the present invention. The Mini-LED chip provided in this embodiment of the present invention further includes:

[0058] N-electrode finger 14 connected to the N-electrode 13; the N-electrode 13 is a symmetrical structure based on the axis of symmetry M, and / or the N-electrode finger 14 is a symmetrical structure based on the axis of symmetry M.

[0059] Specifically, in this embodiment of the invention, the Mini-LED chip does not have a P-electrode finger 12, but only an N-electrode finger 14 connected to the N-electrode 13. The N-electrode 13 is symmetrical about the axis of symmetry M, and / or the N-electrode finger 14 is symmetrical about the axis of symmetry M, thereby further improving the symmetry of the Mini-LED chip based on the axis of symmetry M and reducing the probability of the Mini-LED chip tilting or flipping when subjected to external force with its face down. In this embodiment of the invention, the N-electrode finger 14 can improve the current spread capability at the N-electrode 13, thereby improving the light-emitting performance of the Mini-LED chip.

[0060] It should be noted that the shape of the N-electrode finger 14 can also be other symmetrical shapes based on the axis of symmetry M. In this embodiment of the invention, only one is used. Figures 4-8 The following diagram will be used as an example for illustration.

[0061] In an optional embodiment of this utility model, reference is made to Figure 9 , Figure 9 A schematic diagram of the layout of another Mini-LED chip provided in this embodiment of the present invention, with reference to... Figure 10 , Figure 10 A schematic diagram of the layout of another Mini-LED chip provided in this embodiment of the present invention. The Mini-LED chip provided in this embodiment of the present invention further includes:

[0062] A P-electrode finger 12 located within the groove 15 and connected to the P-electrode 11; the P-electrode 11 is a symmetrical structure based on the axis of symmetry M, and / or the P-electrode finger 12 is a symmetrical structure based on the axis of symmetry M.

[0063] Specifically, in this embodiment of the invention, the Mini-LED chip is simultaneously provided with a P-electrode finger 12 connected to the P-electrode 11 and an N-electrode finger 14 connected to the N-electrode 13. The N-electrode 13 is symmetrical about the axis of symmetry M, and / or the N-electrode finger 14 is symmetrical about the axis of symmetry M; the P-electrode 11 is symmetrical about the axis of symmetry M, and / or the P-electrode finger 12 is symmetrical about the axis of symmetry M. This further improves the symmetry of the Mini-LED chip based on the axis of symmetry M, reducing the probability of the Mini-LED chip tilting or flipping when subjected to external force with its face down. In this embodiment of the invention, the N-electrode finger 14 improves the current spreading capability at the N-electrode 13, and the P-electrode finger 12 improves the current spreading capability at the P-electrode 11, thereby maximizing the luminous performance of the Mini-LED chip.

[0064] In an optional embodiment of this utility model, reference is made to Figure 11 , Figure 11 Another approach provided for embodiments of this utility model Figure 2 A cross-sectional schematic diagram along the AA' direction. The Mini-LED chip provided in this embodiment of the invention also includes:

[0065] A P-type window layer 20 is located between the P-type semiconductor layer 17 and the target substrate 16.

[0066] Specifically, in this embodiment of the invention, the P-type window layer 20 includes, but is not limited to, a P-type GaP window layer. To ensure good current spread on the P-side, the doping concentration range of the P-type window layer 20 is set to 1E18cm⁻¹. -3 -2E18cm -3 This improves the luminous performance of Mini-LED chips.

[0067] It should be noted that, Figure 11 As shown, when the Mini-LED chip includes a P-type window layer 20, the groove 15 exposes a portion of the surface of the P-type window layer 20, and the P electrode 11 contacts the exposed P-type window layer 20.

[0068] In an optional embodiment of this utility model, such as Figure 11 As shown, the Mini-LED chip provided in this embodiment of the present invention further includes:

[0069] The bonding layer 21 is located between the P-type window layer 20 and the target substrate 16.

[0070] Specifically, in this embodiment of the invention, the bonding layer 21 includes, but is not limited to, an oxide bonding layer. For example, the bonding layer 21 can be a SiO2 bonding layer. It should be noted that the contact surface between the bonding layer 21 and the P-type window layer 20 is a roughened surface to improve the adhesion between the bonding layer 21 and the P-type window layer 20, thereby improving the structural stability of the Mini-LED chip.

[0071] For example, during the fabrication of Mini-LED chips, the surface of the epitaxial structure is cleaned with acetone, isopropanol, deionized water, etc., and the surface of the P-type GaP window layer is roughened with Gap roughening solution, so that when the SiO2 bonding layer is deposited later, the SiO2 bonding layer and the P-type GaP window layer will have better adhesion.

[0072] In an optional embodiment of this utility model, reference is made to Figure 12 , Figure 12 Another method provided for embodiments of this utility model Figure 2 A cross-sectional schematic diagram along the AA' direction. The Mini-LED chip provided in this embodiment of the invention also includes:

[0073] The protective layer 22 and the DBR layer 23 cover the epitaxial structure; the protective layer 22 and the DBR layer 23 expose a portion of the surface of the P electrode 11 and a portion of the surface of the N electrode 13.

[0074] Specifically, in this embodiment of the invention, the protective layer 22, also referred to in the field as the PV layer, provides passivation protection for the epitaxial structure. The protective layer 22 includes, but is not limited to, a multilayer stacked structure of Al2O3 / SiO2. Furthermore, the inclusion of the DBR (Distributed Bragg Reflector) layer 23 allows light to exit from one side of the sapphire substrate as much as possible, thereby improving the luminous performance of the Mini-LED chip.

[0075] Based on the above embodiments of this utility model, another embodiment of this utility model also provides a method for fabricating a Mini-LED chip. The fabricated Mini-LED chip is a rectangular Mini-LED chip, and the Mini-LED chip includes two short sides arranged opposite each other. (Refer to...) Figure 13 , Figure 13 This is a schematic flowchart illustrating a method for fabricating a Mini-LED chip according to an embodiment of the present invention. The method for fabricating a Mini-LED chip according to an embodiment of the present invention includes:

[0076] S101: Provides a temporary substrate and a target substrate 16.

[0077] S102: An epitaxial structure is formed on the temporary substrate, the epitaxial structure comprising an N-type semiconductor layer 19, a multiple quantum well layer 18 and a P-type semiconductor layer 17 stacked sequentially.

[0078] S103: Bond the target substrate 16 to the epitaxial structure and remove the temporary substrate; the epitaxial structure located on the target substrate 16 includes a P-type semiconductor layer 17, a multiple quantum well layer 18 and an N-type semiconductor layer 19 sequentially stacked in a first direction X; the first direction X is perpendicular to the plane where the target substrate 16 is located and points from the target substrate 16 to the epitaxial structure.

[0079] S104: Groove 15 is formed by slotting the epitaxial structure located on one of the short sides, and the groove 15 exposes a portion of the surface of the P-type semiconductor layer 17.

[0080] S105: Form a P electrode 11 and an N electrode 13; the P electrode 11 is located in the groove 15 and connected to the P-type semiconductor layer 17, and the N electrode 13 is located on the epitaxial structure on the other short side and connected to the N-type semiconductor layer 19; wherein, the multi-quantum well layer 18 is a symmetrical structure based on the symmetry axis M, and the symmetry axis M is the line connecting the midpoints of the two short sides.

[0081] The Mini-LED chip prepared in this embodiment of the invention has a groove 15 formed in the region where the P electrode 11 is located on one side of one of the short sides of the rectangular Mini-LED chip. The P electrode 11 is located in the groove 15, and the N electrode 13 is located on the epitaxial structure on the other short side. That is, the position of the groove 15 is changed from being located on one side of one of the long sides in the prior art to being located on one side of one of the short sides. Based on the adjustment of the position of the groove 15 on the layout, a multi-quantum well layer 18 based on the symmetry axis M can be formed when processing the epitaxial structure, so that the light-emitting area K1 of the Mini-LED chip is based on the symmetry axis M. This ensures that after the Mini-LED chip is fixed on the blue film, the symmetrical light-emitting area K1 can be positioned on both sides of the symmetry axis M with the same degree of adhesive adhesion to the blue film. This solves the problem that the adhesive force is insufficient to support the Mini-LED chip when it is subjected to external force with its face down, resulting in chip tilting and flipping. This improves the die bonding efficiency for customers after delivery.

[0082] Based on the above embodiments of this utility model, another embodiment of this utility model also provides a display device, which includes the Mini-LED chip described in any of the above embodiments. This display device includes, but is not limited to, display devices such as liquid crystal displays.

[0083] Based on the above embodiments of this utility model, another embodiment of this utility model also provides a lighting device, which includes the Mini-LED chip described in any of the above embodiments. This lighting device includes, but is not limited to, lighting fixtures and other lighting equipment.

[0084] The present invention provides a detailed description of a Mini-LED chip, display device, and lighting device. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

[0085] It should be noted that each embodiment in this specification focuses on the differences from other embodiments, and the same or similar parts between the embodiments can be referred to each other.

[0086] It should also be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that elements inherent to a process, method, article, or apparatus that comprises a list of elements, or elements inherent to such processes, methods, articles, or apparatus, are also included. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0087] The above description of the disclosed embodiments enables those skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A Mini-LED chip, characterized in that, The Mini-LED chip is a rectangular Mini-LED chip, the Mini-LED chip includes two opposite short sides, the Mini-LED chip includes: A target substrate; An epitaxial structure located on one side of the target substrate, the epitaxial structure includes a P-type semiconductor layer, a multi-quantum well layer, and an N-type semiconductor layer which are sequentially stacked in a first direction; the first direction is perpendicular to the plane where the target substrate is located, and is directed from the target substrate to the epitaxial structure; The epitaxial structure on one side of one of the short sides of the Mini-LED chip has a groove, and the groove exposes part of the surface of the P-type semiconductor layer; A P electrode located in the groove and connected to the P-type semiconductor layer; an N electrode located on one side of the other short side of the Mini-LED chip and connected to the N-type semiconductor layer; Wherein, the multi-quantum well layer is a symmetric structure based on a symmetry axis, and the symmetry axis is the midpoint line of the two short sides.

2. The Mini-LED chip of claim 1, wherein, The Mini-LED chip further includes: An N electrode finger connected to the N electrode; the N electrode is a symmetric structure based on the symmetry axis, and / or the N electrode finger is a symmetric structure based on the symmetry axis.

3. The Mini-LED chip of claim 2, wherein, The Mini-LED chip further includes: A P electrode finger located in the groove and connected to the P electrode; the P electrode is a symmetric structure based on the symmetry axis, and / or the P electrode finger is a symmetric structure based on the symmetry axis.

4. The Mini-LED chip of claim 1, wherein, The Mini-LED chip further includes: A P-type window layer located between the P-type semiconductor layer and the target substrate.

5. The Mini-LED chip of claim 4, wherein, The P-type window layer has a doping concentration ranging from 1E18 cm -3 -2E18 cm -3 .

6. The Mini-LED chip of claim 4, wherein, The Mini-LED chip further includes: A bonding layer located between the P-type window layer and the target substrate.

7. The Mini-LED chip of any one of claims 1-6, wherein, The Mini-LED chip further includes: A protective layer and a DBR layer covering the epitaxial structure; the protective layer and the DBR layer expose part of the surface of the P electrode and part of the surface of the N electrode.

8. A display device, characterized by comprising: The display device includes the Mini-LED chip of any one of claims 1-7.

9. An illumination device, characterized by The lighting device includes the Mini-LED chip of any one of claims 1-7.

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