Pulse signal generation module for antenna subarray debugging table
By designing a pulse signal generation module for an antenna subarray test bench that includes a mode selection switch, a period setting switch, and a pulse interface, the problem of not being able to independently set multiple signals in the prior art has been solved, and flexible control and debugging of multiple pulse signals has been achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- JIANGSU SHENJIAN ELECTROMECHANICAL TECH CO LTD
- Filing Date
- 2025-03-14
- Publication Date
- 2026-04-10
AI Technical Summary
The pulse signal generation module in the existing antenna subarray test bench cannot be individually configured when multiple signal outputs are available, thus failing to meet the independent control requirements of multiple modes.
A pulse signal generation module for an antenna subarray debugging console was designed, which includes a mode selection switch, a period setting switch, a pulse width setting switch, and a pulse interface. It generates multiple pulse signals through an FPGA module and achieves independent control of the pulse signals through multiple DIP switches and rotary switches.
It enables independent setting and control of multiple pulse signals, and allows flexible adjustment of pulse width, period and delay in different modes to meet the debugging needs of multiple modes.
Smart Images

Figure CN224109555U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model belongs to the technical field of pulse modulation, especially relates to a pulse signal generation module for antenna subarray debugging platform. BACKGROUND
[0002] Pulse width modulation technology is a kind of digital control technology by adjusting pulse width to simulate continuous signal, and pulse signal is needed in antenna subarray debugging platform, the pulse signal generation module in the existing antenna subarray debugging platform can only work in single mode, and if multiple signal outputs are involved, each signal cannot be set individually. SUMMARY
[0003] Therefore, the utility model provides a pulse signal generation module for antenna subarray debugging platform, can realize the mode, pulse width, period and delay of setting TTL single-ended pulse signal, thereby solve the technical problem mentioned in background art.
[0004] The technical scheme of the utility model is as follows: a pulse signal generation module for antenna subarray debugging platform, comprising: panel, pulse signal generation unit, mode selection switch, period setting switch, first mode pulse width setting switch, second mode delay setting switch, second mode pulse width setting switch, pulse selection switch and multiple pulse interfaces;
[0005] The mode selection switch, period setting switch, first mode pulse width setting switch, second mode delay setting switch, second mode pulse width setting switch, pulse selection switch and multiple pulse interfaces are all arranged on the panel;
[0006] The mode selection switch, period setting switch, first mode pulse width setting switch, second mode delay setting switch, second mode pulse width setting switch, pulse selection switch, multiple pulse interfaces are all connected with the pulse signal generation unit.
[0007] Further, the mode selection switch includes knob switch.
[0008] Further, the period setting switch includes two groups of dial switches.
[0009] Further, the first mode pulse width setting switch includes two groups of dial switches.
[0010] Further, the second mode delay setting switch includes three groups of dial switches.
[0011] Further, the second mode pulse width setting switch includes four groups of dial switches.
[0012] Further, the pulse interface includes pulse input terminal and pulse output terminal, and the number of pulse interfaces is four groups.
[0013] Further, the pulse selection switch comprises a four-gear rotary switch.
[0014] Further, the pulse input terminal and the pulse output terminal are both BNC sockets.
[0015] Further, the pulse signal generating unit comprises an FPGA module with a model of XC3S1500-4FG320I.
[0016] The utility model discloses a beneficial effect: the utility model discloses can select in the first mode and second mode through mode selection switch, wherein, the first mode can realize the mutual independence of multichannel single-ended signal, can independently set pulse width and period, and the second mode can realize the period same of multichannel single-ended signal, and the relative delay setting (relative delay relation takes 1st road as benchmark) of pulse width.
[0017] The utility model discloses can set up respectively the pulse width, period, delay etc. of each road pulse signal in each mode through first mode pulse width setting switch, second mode delay setting switch, second mode pulse width setting switch, pulse selection switch. BRIEF DESCRIPTION OF DRAWINGS
[0018] Figure 1 It is the principle diagram of the utility model.
[0019] Figure 2 It is the structure schematic diagram of the utility model. DETAILED DESCRIPTION
[0020] In order to make the person skilled in the art better understand the utility model scheme, below will combine the drawings in the utility model embodiment, and the technical scheme in the utility model embodiment is clearly and completely described, and the described embodiment is only a part of the embodiment of the utility model, not all the embodiment. Based on the embodiment in the utility model, all other embodiments obtained by the person skilled in the art without making creative labor should belong to the scope of the utility model protection.
[0021] In the technical scheme of the utility model, Figure 1 And Figure 2 It is the schematic diagram provided according to the specific structure of the utility model antenna subarray debugging platform pulse signal generating module, as Figure 1 And Figure 2 As shown in the utility model, the utility model comprises:
[0022] Panel, pulse signal generating unit 1, mode selection switch 2, period setting switch 4, first mode pulse width setting switch 5, second mode delay setting switch 7, second mode pulse width setting switch 6, pulse selection switch and multiple pulse interfaces;
[0023] The mode selection switch 2, the period setting switch 4, the first mode pulse width setting switch 5, the second mode delay setting switch 7, the second mode pulse width setting switch 6, the pulse selection switch and the plurality of pulse interfaces are arranged on a panel.
[0024] The mode selection switch 2, the period setting switch 4, the first mode pulse width setting switch 5, the second mode delay setting switch 7, the second mode pulse width setting switch 6, the pulse selection switch and the plurality of pulse interfaces are connected with the pulse signal generation unit 1.
[0025] The mode selection switch 2 is used for selection between a first mode and a second mode, the first mode can realize independent of each other of a plurality of single-ended signals, and the pulse width and the period can be independently set, and the second mode can realize the same period of a plurality of single-ended signals, and the pulse width and the relative delay setting (the relative delay relationship takes the first path as a reference).
[0026] The pulse selection switch is used for selection of a plurality of pulse signals.
[0027] The period setting switch 4 is used for setting the period of the pulse signal, in the first mode, different pulse signals are selected through the pulse selection switch, and the period is set through the period setting switch 4 respectively, and in the second mode, the period of the pulse signal needs to be set only once.
[0028] The first mode pulse width setting switch 5 is used for setting the pulse width of the pulse signal in the first mode, different pulse signals are selected through the pulse selection switch, and then the pulse width is set for each signal.
[0029] The second mode pulse width setting switch 6 is used for setting the pulse width of the pulse signal in the second mode, different pulse signals are selected through the pulse selection switch, and then the pulse width is set for each signal.
[0030] The second mode delay setting switch 7 is used for setting the delay between the pulse signals in the second mode,
[0031] The pulse interface is used for input and output of the pulse signal, and the pulse signal generation unit 1 is used for modulation of the pulse signal, and the specific modulation data is the setting data of the above-mentioned switches.
[0032] In an embodiment of the utility model, mode selection switch 2 includes button switch.
[0033] In an embodiment of the utility model, period setting switch 4 includes two groups of dial switch.
[0034] In an embodiment of the utility model, first mode pulse width setting switch 5 includes two groups of dial switch.
[0035] In one embodiment of the utility model, the second mode delay setting switch 7 includes three groups of dial switch.
[0036] In one embodiment of the utility model, the second mode pulse width setting switch 6 includes four groups of dial switch.
[0037] In one embodiment of the utility model, the pulse interface includes pulse input terminal 9 and pulse output terminal 8, and the number of pulse interface is four groups.
[0038] In one embodiment of the utility model, the pulse selection switch includes four-stop rotary switch.
[0039] In one embodiment of the utility model, pulse input terminal 9 and pulse output terminal 8 are all BNC socket.
[0040] In one embodiment of the utility model, the pulse signal generating unit 1 includes FPGA module, and the model number is XC3S1500-4FG320I. The module can generate 4-way pulse TTL signal, and its functions include: pulse period generating function, pulse width modulation function, pulse delay modulation function.
[0041] The specific operation process of the utility model is as follows: external pulse signal is input to pulse signal generating unit 1 through BNC interface, and mode selection switch 2 switches the working mode; pulse selection switch selects single-end signal.
[0042] In mode 1, the TTL single-end output period adopts two groups of dial switch, and in mode 1, the TTL single-end output pulse width adopts two groups of dial switch. In mode 2, the TTL single-end output period is same with the dial switch of mode 1, and in mode 2, the TTL single-end output pulse width adopts four groups of dial switch, and in mode 2, the pulse signal delay adopts three groups of dial switch.
[0043] The utility model technology can realize the control of single-end pulse signal mode, pulse width, period and delay on a panel, and output ideal pulse signal.
[0044] Finally, it should be explained that the above specific embodiments are only used to explain the technical scheme of the utility model and not to limit, although the utility model is explained in detail with reference to examples, those skilled in the art should understand that the technical scheme of the utility model can be modified or equivalent replaced without departing from the spirit and scope of the technical scheme of the utility model, and it should be covered in the claim range of the utility model.
Claims
1. A pulse signal generating module for an antenna subarray debugging station, characterized in that, include: Panel, pulse signal generation unit, mode selection switch, period setting switch, first mode pulse width setting switch, second mode delay setting switch, second mode pulse width setting switch, pulse selection switch and multiple pulse interfaces; The mode selection switch, period setting switch, first mode pulse width setting switch, second mode delay setting switch, second mode pulse width setting switch, pulse selection switch, and multiple pulse interfaces are all located on the panel; The mode selection switch, period setting switch, first mode pulse width setting switch, second mode delay setting switch, second mode pulse width setting switch, pulse selection switch, and multiple pulse interfaces are all connected to the pulse signal generation unit.
2. The pulse signal generating module for the antenna subarray debugging station as described in claim 1, characterized in that, The mode selection switch includes a toggle switch.
3. The pulse signal generation module for the antenna subarray debugging station as described in claim 1, characterized in that, The period setting switch includes two sets of DIP switches.
4. The pulse signal generation module for the antenna subarray debugging station as described in claim 1, characterized in that, The first mode pulse width setting switch includes two sets of DIP switches.
5. The pulse signal generation module for the antenna subarray debugging station as described in claim 1, characterized in that, The second mode delay setting switch includes three sets of DIP switches.
6. The pulse signal generation module for the antenna subarray debugging station as described in claim 1, characterized in that, The second mode pulse width setting switch includes four sets of DIP switches.
7. The pulse signal generating module for the antenna subarray debugging station as described in claim 1, characterized in that, The pulse interface includes a pulse input terminal and a pulse output terminal, and there are four sets of pulse interfaces.
8. The pulse signal generating module for the antenna subarray debugging station as described in claim 7, characterized in that, The pulse selection switch includes a four-position rotary switch.
9. The pulse signal generating module for the antenna subarray debugging station as described in claim 7, characterized in that, Both the pulse input terminal and the pulse output terminal are BNC sockets.
10. The pulse signal generating module for the antenna subarray debugging station as described in claim 1, characterized in that, The pulse signal generation unit includes an FPGA module, model XC3S1500-4FG320I.