Intelligent substation control system

Abstract

The utility model discloses an intelligent transformer station control system, which relates to the technical field of transformer station intelligent control, adopts an advanced automatic control system, can monitor the state of a power grid, the operation condition of equipment and the like in real time, can perform intelligent regulation and control and optimized operation as required, and improves the stability and reliability of the power grid. Remote monitoring and management are carried out through the Internet, real-time monitoring and remote operation of the transformer substation are achieved, field inspection by personnel is not needed, and the operation efficiency and the response speed of the transformer substation are improved; useful information is extracted through analysis and processing of big data, intelligent optimization and regulation are performed on the system, such as equipment fault prediction and intelligent maintenance, the fault rate of a transformer substation can be reduced, and the equipment utilization rate can be improved; through an integrated fault intelligent diagnosis system, the operation state of equipment is monitored in real time, fault causes are identified through data analysis and a model, fault early warning and rapid positioning are provided, so that repair measures can be taken in time, and the power failure time and the maintenance cost are reduced.

Description

Technical Field

[0001] This utility model relates to the field of intelligent control technology for substations, and in particular to an intelligent substation control system. Background Technology

[0002] A substation is a location in a power system that transforms voltage and current, receives electrical energy, and distributes it. Substations within power plants are step-up substations, whose function is to step up the voltage of the electrical energy generated by generators before feeding it into the high-voltage power grid.

[0003] As a crucial component of modern power system development, the design and implementation of intelligent substation automation systems have become a focal point for the power industry. With continuous technological advancements, intelligent substations have demonstrated significant advantages in automation level, reliability, and safety.

[0004] Most existing substation control systems are relatively simple and lack a management system specifically designed for substations. This lack of an efficient and targeted management system often leads to uncontrollable factors within substations, causing significant losses and posing safety hazards to substation staff.

[0005] Therefore, it is necessary to invent an intelligent substation control system. Utility Model Content

[0006] The purpose of this invention is to address the shortcomings and deficiencies of existing technologies by providing an intelligent substation control system. By integrating advanced information and communication technologies, it enables real-time monitoring and remote control of the power grid status, significantly improving operational efficiency.

[0007] To achieve the above objectives, this utility model provides the following technical solution:

[0008] A smart substation control system includes a data acquisition module for collecting various data from the substation, a data preprocessing module, and a control module. The data acquisition module is connected to the control module through the data preprocessing module.

[0009] The data acquisition module includes a voltage detection module, a current detection module, a fault current acquisition module, and a location module; the data preprocessing module includes a multiplexer, a signal conditioning module, a filtering and gating module, and an analog-to-digital conversion module.

[0010] The control module includes a microcontroller module, an RF switch circuit, a wireless RF chip, a data storage module, a clock module, a crystal oscillator module, an alarm module, a human-machine interaction module, a display module, an interface module, and a power supply module.

[0011] The voltage detection module, current detection module, fault current acquisition module, and positioning module are connected to the microcontroller module in sequence via a multiplexer, signal conditioning module, filtering and gating module, and analog-to-digital conversion module. The microcontroller module is connected to the wireless radio frequency chip via a radio frequency switch circuit. The data storage module, clock module, crystal oscillator module, alarm module, human-machine interaction module, display module, interface module, and power supply module are connected to the microcontroller module.

[0012] As a further preferred embodiment of the intelligent substation control system of this utility model, the signal preprocessing module includes an amplifier circuit and a dual operational amplifier bandpass filter. The amplifier circuit consists of an OPA277 operational amplifier and resistors and capacitors, and the dual operational bandpass filter consists of two OPA277 operational amplifiers.

[0013] As a further preferred embodiment of the intelligent substation control system of this utility model, the radio frequency switching circuit includes a radio frequency (RF) terminal, a first NMOS transistor Q1, a second NMOS transistor Q2, a third NMOS transistor Q3, a fourth NMOS transistor Q4, a fifth NMOS transistor Q5, a sixth NMOS transistor Q6, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, a fifth diode D5, a sixth diode D6, a radio frequency (ANT) terminal, a voltage (VCTRL) terminal, and a voltage (VCTRI) terminal. The RF terminal is connected to one end of the fifth resistor R5, one end of the seventh resistor R7, the drain of the third NMOS transistor Q3, and the drain of the fourth NMOS transistor Q4. The other end of the fifth resistor R5 is connected to the drain of the third NMOS transistor Q3. The source, drain of the second NMOS transistor Q2, and one end of the third resistor R3 are connected to the source of the first NMOS transistor Q1, the drain of the first NMOS transistor Q2, and one end of the first resistor R1. The other end of the first resistor R1 is connected to the source of the first NMOS transistor Q1 and grounded. The base of the first NMOS transistor Q1 is connected to the anode of the first diode. The cathode of the first diode is connected to the gate of the first NMOS transistor Q1 and one end of the second resistor R2. The other end of the second resistor R2 is connected to one end of the fourth resistor R4 and the voltage VCTRI terminal. One end of the sixth resistor R6 is connected to the gate of the second NMOS transistor Q2 and the cathode of the second diode D2. The anode of the second diode D2 is connected to the base of the second NMOS transistor Q2. The other end of the sixth resistor R4 is connected to the gate of the third NMOS transistor Q3 and the cathode of the third diode D3. The anode of the third diode D3 is connected to the base of the third NMOS transistor Q3.The gate of the fourth NMOS transistor Q4 is connected to the cathode of the fourth diode D4 and one end of the eighth resistor R8. The other end of the seventh resistor R7 is connected to the source of the fourth NMOS transistor Q4, the drain of the fifth NMOS transistor Q5, and one end of the ninth resistor R9. The gate of the fifth NMOS transistor Q5 is connected to one end of the tenth resistor R10 and the cathode of the fifth diode D5. The anode of the fifth diode D5 is connected to the base of the fifth diode D5. The source of the fifth NMOS transistor Q5 is connected to the other end of the ninth resistor R9, one end of the eleventh resistor R11, and the drain of the sixth NMOS transistor Q6. The gate of the sixth NMOS transistor Q6 is connected to one end of the twelfth resistor R12 and the cathode of the sixth diode D6. The anode of the sixth diode D6 is connected to the base of the sixth diode D6. The other end of the twelfth resistor R12 is connected to the other end of the eighth resistor R8. The other end of the tenth resistor R10 is connected to the voltage VCTRL terminal. The source of the sixth NMOS transistor Q6 is connected to the other end of the eleventh resistor R11 and the RF ANT terminal.

[0014] As a further preferred embodiment of the intelligent substation control system of this utility model, the analog-to-digital conversion module adopts an analog-to-digital converter of model AD7794.

[0015] As a further preferred embodiment of the intelligent substation control system of this utility model, the crystal oscillator module includes a control chip 7N10.000MBP, a capacitor C45, resistors R22, R23, and R24, a capacitor C69, and a voltage VCC terminal. The 8-pin interface of the control chip 7N10.000MBP is connected to one end of the resistor R22. The other end of the resistor R22 is connected to one end of the capacitor C45, the 9-pin interface of the control chip 7N10.000MBP, one end of the resistor R23, and the voltage VCC terminal. The other end of the capacitor C45 is grounded. The other end of the resistor R23 is connected to one end of the resistor R24, and the other end of the resistor R24 ​​is grounded. The 10-pin interface of the control chip 7N10.000MBP is connected to one end of the capacitor C69, and the other end of the capacitor C69 is grounded.

[0016] As a further preferred embodiment of the intelligent substation control system of this utility model, the clock module includes a clock chip DS3231, a capacitor C4, resistors R25, R26, R27, and R28. The VCC terminal is connected to one end of resistor R25 and one end of resistor R26, respectively. The other end of resistor R25 is connected to the SDA terminal of the clock chip DS3231, and the other end of resistor R26 is connected to the SCL terminal of the clock chip DS3231. The VDD terminal is connected to one end of resistor R27, one end of resistor R28, one end of capacitor C4, and port 2 of the clock chip DS3231, respectively. The other end of resistor R27 is connected to port 1 of the clock chip DS3231, and the other end of resistor R28 is connected to port 3 of the clock chip DS3231. The other end of capacitor C4 is grounded.

[0017] Compared with the prior art, the present invention, by adopting the above technical solution, has the following technical effects:

[0018] 1. This utility model discloses an intelligent substation control system, comprising a data acquisition module for collecting various data from the substation, a data preprocessing module, and a control module; the data acquisition module includes a voltage detection module, a current detection module, a fault current acquisition module, and a positioning module; the data preprocessing module includes a multiplexer, a signal conditioning module, a filtering and gating module, and an analog-to-digital converter module; the control module includes a microcontroller module, a radio frequency switch circuit, a wireless radio frequency chip, a data storage module, a clock module, a crystal oscillator module, an alarm module, a human-machine interaction module, a display module, an interface module, and a power supply module; by integrating advanced information and communication technologies, it realizes real-time monitoring and remote control of the power grid status, significantly improving operating efficiency;

[0019] 2. This utility model adopts an advanced automated control system, which can monitor the power grid status and equipment operation in real time, and can intelligently regulate and optimize operation as needed to improve the stability and reliability of the power grid;

[0020] 2. This utility model enables remote monitoring and management via the Internet, achieving real-time monitoring and remote operation of substations without the need for on-site inspections, thus improving substation operating efficiency and response speed.

[0021] 3. This utility model extracts useful information through the analysis and processing of big data, and performs intelligent optimization and control of the system, such as predicting equipment failures and intelligent maintenance, which can reduce the failure rate of substations and improve equipment utilization.

[0022] 4. This utility model uses an integrated intelligent fault diagnosis system to monitor the equipment's operating status in real time, and identifies the causes of faults through data analysis and models, providing fault warnings and rapid location so that timely repair measures can be taken to reduce power outage time and maintenance costs.

[0023] 5. This utility model enables intelligent management and optimized scheduling of energy flow in the power grid, dynamically adjusts the power supply mode and capacity according to demand, improves power supply quality and efficiency, and maximizes the utilization of energy resources. Attached Figure Description

[0024] The accompanying drawings, which are provided to further illustrate the present invention and form part of this application, do not constitute an undue limitation of the present invention. In the drawings:

[0025] Figure 1 This is a schematic diagram of the overall structure of an intelligent substation control system according to the present invention.

[0026] Figure 2 This is a schematic diagram of a module of an intelligent substation control system according to the present invention.

[0027] Figure 3 This is the circuit diagram of the radio frequency switch circuit of this utility model;

[0028] Figure 4 This is the circuit diagram of the crystal oscillator module of this utility model;

[0029] Figure 5 This is the circuit diagram of the clock module of this utility model. Detailed Implementation

[0030] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments. The illustrative embodiments and descriptions are only used to explain the present invention and are not intended to limit the present invention.

[0031] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present utility model, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of the present utility model without creative effort are within the scope of protection of the present utility model.

[0032] A smart substation control system, such as Figure 1 As shown, the system includes a data acquisition module for collecting various data in the substation, as well as a data preprocessing module and a control module. The data acquisition module is connected to the control module through the data preprocessing module.

[0033] like Figure 2 As shown, the data acquisition module includes a voltage detection module, a current detection module, a fault current acquisition module, and a location module; the data preprocessing module includes a multiplexer, a signal conditioning module, a filtering and gating module, and an analog-to-digital converter.

[0034] The control module includes a microcontroller module, an RF switch circuit, a wireless RF chip, a data storage module, a clock module, a crystal oscillator module, an alarm module, a human-machine interaction module, a display module, an interface module, and a power supply module.

[0035] The voltage detection module, current detection module, fault current acquisition module, and positioning module are connected to the microcontroller module in sequence via a multiplexer, signal conditioning module, filtering and gating module, and analog-to-digital conversion module. The microcontroller module is connected to the wireless radio frequency chip via a radio frequency switch circuit. The data storage module, clock module, crystal oscillator module, alarm module, human-machine interaction module, display module, interface module, and power supply module are connected to the microcontroller module.

[0036] The signal preprocessing module includes an amplifier circuit and a dual op-amp bandpass filter. The amplifier circuit consists of an OPA277 operational amplifier and resistors and capacitors, and the dual op-amp bandpass filter consists of two OPA277 operational amplifiers.

[0037] like Figure 3As shown, the radio frequency (RF) switch circuit includes an RF terminal, a first NMOS transistor Q1, a second NMOS transistor Q2, a third NMOS transistor Q3, a fourth NMOS transistor Q4, a fifth NMOS transistor Q5, and a sixth NMOS transistor Q6; a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, and a twelfth resistor R12; a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, a fifth diode D5, and a sixth diode D6; an RF ANT terminal; a voltage VCTRL terminal; and a voltage VCTRI terminal. The RF terminal is connected to one end of the fifth resistor R5, one end of the seventh resistor R7, the drain of the third NMOS transistor Q3, and the drain of the fourth NMOS transistor Q4. The other end of the fifth resistor R5 is connected to the source of the third NMOS transistor Q3 and the second NMOS transistor Q4. The drain of Q2 and one end of the third resistor R3 are connected. The other end of the third resistor R3 is connected to the source of the second NMOS transistor Q2, the drain of the first NMOS transistor Q1, and one end of the first resistor R1. The other end of the first resistor R1 is connected to the source of the first NMOS transistor Q1 and grounded. The base of the first NMOS transistor Q1 is connected to the anode of the first diode. The cathode of the first diode is connected to the gate of the first NMOS transistor Q1 and one end of the second resistor R2. The other end of the second resistor R2 is connected to one end of the fourth resistor R4 and the voltage VCTRI terminal. One end of the sixth resistor R6 is connected to the gate of the second NMOS transistor Q2 and the cathode of the second diode D2. The anode of the second diode D2 is connected to the base of the second NMOS transistor Q2. The other end of the sixth resistor R4 is connected to the gate of the third NMOS transistor Q3 and the cathode of the third diode D3. The anode of the third diode D3 is connected to the base of the third NMOS transistor Q3.The gate of the fourth NMOS transistor Q4 is connected to the cathode of the fourth diode D4 and one end of the eighth resistor R8. The other end of the seventh resistor R7 is connected to the source of the fourth NMOS transistor Q4, the drain of the fifth NMOS transistor Q5, and one end of the ninth resistor R9. The gate of the fifth NMOS transistor Q5 is connected to one end of the tenth resistor R10 and the cathode of the fifth diode D5. The anode of the fifth diode D5 is connected to the base of the fifth diode D5. The source of the fifth NMOS transistor Q5 is connected to the other end of the ninth resistor R9, one end of the eleventh resistor R11, and the drain of the sixth NMOS transistor Q6. The gate of the sixth NMOS transistor Q6 is connected to one end of the twelfth resistor R12 and the cathode of the sixth diode D6. The anode of the sixth diode D6 is connected to the base of the sixth diode D6. The other end of the twelfth resistor R12 is connected to the other end of the eighth resistor R8. The other end of the tenth resistor R10 is connected to the voltage VCTRL terminal. The source of the sixth NMOS transistor Q6 is connected to the other end of the eleventh resistor R11 and the RF ANT terminal.

[0038] This utility model of RF switch circuit can better meet the needs of large voltage swing operation while ensuring insertion loss and isolation. It improves the traditional stacking technology, reduces uneven voltage distribution, significantly improves the branch voltage handling capability, and improves the branch voltage tolerance, thus better serving antenna tuning and ensuring normal operation even under antenna mismatch conditions. The RF switch section adopts a series-parallel structure, and the control signals of the two branches are complementary. When the series branch is on, it is equivalent to a small resistance, and when the parallel branch is off, it is equivalent to a capacitor and a resistor in parallel.

[0039] The analog-to-digital converter module uses an AD7794 model analog-to-digital converter.

[0040] like Figure 4 As shown, the crystal oscillator module includes a control chip 7N10.000MBP, a capacitor C45, resistors R22, R23, and R24, a capacitor C69, and a voltage VCC terminal. The 8-pin connector of the control chip 7N10.000MBP is connected to one end of resistor R22. The other end of resistor R22 is connected to one end of capacitor C45, the 9-pin connector of the control chip 7N10.000MBP, one end of resistor R23, and the voltage VCC terminal. The other end of capacitor C45 is grounded. The other end of resistor R23 is connected to one end of resistor R24, and the other end of resistor R24 ​​is grounded. The 10-pin connector of the control chip 7N10.000MBP is connected to one end of capacitor C69, and the other end of capacitor C69 is grounded.

[0041] like Figure 5As shown, the clock module includes a clock chip DS3231, a capacitor C4, resistors R25, R26, R27, and R28. The VCC terminal is connected to one end of resistor R25 and one end of resistor R26. The other end of resistor R25 is connected to the SDA terminal of the clock chip DS3231, and the other end of resistor R26 is connected to the SCL terminal of the clock chip DS3231. The VDD terminal is connected to one end of resistor R27, one end of resistor R28, one end of capacitor C4, and port 2 of the clock chip DS3231. The other end of resistor R27 is connected to port 1 of the clock chip DS3231, and the other end of resistor R28 is connected to port 3 of the clock chip DS3231. The other end of capacitor C4 is grounded.

[0042] This utility model's clock module is designed and implemented using the low-cost, high-precision real-time clock chip DS3231. The DS3231's register addresses are 00h to 12h. It obtains clock and Hitachi information by reading appropriate register bytes and obtains clock and calendar information by writing appropriate register bytes. It also sets or initializes clock and calendar data by writing appropriate register bytes.

[0043] It will be understood by those skilled in the art that, unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. It should also be understood that terms such as those defined in general dictionaries should be understood to have the same meaning as in the context of the prior art, and should not be interpreted in an idealized or overly formal sense unless defined as herein.

[0044] The above embodiments are merely illustrative of the technical concept of this utility model and should not be construed as limiting the scope of protection of this utility model. Any modifications made to the technical solution based on the technical concept proposed in this utility model shall fall within the scope of protection of this utility model. The implementation methods of this utility model have been described in detail above, but this utility model is not limited to the above-described implementation methods. Within the scope of knowledge possessed by those skilled in the art, various changes can be made without departing from the spirit of this utility model.

Claims

1. An intelligent substation control system, characterized by: It includes a data acquisition module for collecting various data in the substation, as well as a data preprocessing module and a control module. The data acquisition module is connected to the control module through the data preprocessing module. The data acquisition module includes a voltage detection module, a current detection module, a fault current acquisition module, and a location module; the data preprocessing module includes a multiplexer, a signal conditioning module, a filtering and gating module, and an analog-to-digital conversion module. The control module includes a microcontroller module, an RF switch circuit, a wireless RF chip, a data storage module, a clock module, a crystal oscillator module, an alarm module, a human-machine interaction module, a display module, an interface module, and a power supply module. The voltage detection module, current detection module, fault current acquisition module, and positioning module are connected to the microcontroller module in sequence via a multiplexer, signal conditioning module, filtering and gating module, and analog-to-digital conversion module. The microcontroller module is connected to the wireless radio frequency chip via a radio frequency switch circuit. The data storage module, clock module, crystal oscillator module, alarm module, human-machine interaction module, display module, interface module, and power supply module are connected to the microcontroller module.

2. The intelligent substation control system of claim 1, wherein: The signal conditioning module includes an amplifier circuit and a dual op-amp bandpass filter. The amplifier circuit consists of an OPA277 operational amplifier and resistors and capacitors, and the dual op-amp bandpass filter consists of two OPA277 operational amplifiers.

3. The intelligent substation control system of claim 1, wherein: The radio frequency (RF) switch circuit includes an RF terminal, a first NMOS transistor Q1, a second NMOS transistor Q2, a third NMOS transistor Q3, a fourth NMOS transistor Q4, a fifth NMOS transistor Q5, a sixth NMOS transistor Q6, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, a fifth diode D5, a sixth diode D6, an RF ANT terminal, and a voltage V. CTRL Terminal and voltage V CTRI The RF terminals are connected to one end of the fifth resistor R5, one end of the seventh resistor R7, the drain of the third NMOS transistor Q3, and the drain of the fourth NMOS transistor Q4. The other end of the fifth resistor R5 is connected to the source of the third NMOS transistor Q3, the drain of the second NMOS transistor Q2, and one end of the third resistor R3. The other end of the third resistor R3 is connected to the source of the second NMOS transistor Q2, the drain of the first NMOS transistor Q1, and one end of the first resistor R1. The other end of the first resistor R1 is connected to the source of the first NMOS transistor Q1 and grounded. The base of the first NMOS transistor Q1 is connected to the anode of the first diode. The cathode of the first diode is connected to the gate of the first NMOS transistor Q1 and one end of the second resistor R2. The other end of the second resistor R2 is connected to one end of the fourth resistor R4 and the voltage V. CTRI One end of the sixth resistor R6 and the other end of the fourth resistor R4 are connected to the gate of the second NMOS transistor Q2 and the cathode of the second diode D2, respectively. The anode of the second diode D2 is connected to the base of the second NMOS transistor Q2. The other end of the sixth resistor R4 is connected to the gate of the third NMOS transistor Q3 and the cathode of the third diode D3, respectively. The anode of the third diode D3 is connected to the base of the third NMOS transistor Q3. The gate of the fourth NMOS transistor Q4 is connected to the cathode of the fourth diode D4. One end of the eighth resistor R8 and the other end of the seventh resistor R7 are connected to the source of the fourth NMOS transistor Q4, the drain of the fifth NMOS transistor Q5, and the... One end of resistor R9 is connected to the gate of the fifth NMOS transistor Q5, which is connected to one end of the tenth resistor R10 and the cathode of the fifth diode D5. The anode of the fifth diode D5 is connected to its base. The source of the fifth NMOS transistor Q5 is connected to the other end of resistor R9, one end of resistor R11, and the drain of the sixth NMOS transistor Q6. The gate of the sixth NMOS transistor Q6 is connected to one end of resistor R12 and the cathode of the sixth diode D6. The anode of the sixth diode D6 is connected to its base. The other end of resistor R12 is connected to the other end of resistor R8. The other end of resistor R10 is connected to voltage V. CTRL The source of the sixth NMOS transistor Q6 is connected to the other end of the eleventh resistor R11 and the RF ANT terminal, respectively.

4. The intelligent substation control system of claim 1, wherein: The analog-to-digital converter module uses an AD7794 model analog-to-digital converter.

5. The intelligent substation control system of claim 1, wherein: The crystal oscillator module includes a control chip 7N10.000MBP, a capacitor C45, resistors R22, R23, and R24, a capacitor C69, and a voltage VCC terminal. The 8-pin connector of the control chip 7N10.000MBP is connected to one end of resistor R22. The other end of resistor R22 is connected to one end of capacitor C45, the 9-pin connector of the control chip 7N10.000MBP, one end of resistor R23, and the voltage VCC terminal. The other end of capacitor C45 is grounded. The other end of resistor R23 is connected to one end of resistor R24, and the other end of resistor R24 ​​is grounded. The 10-pin connector of the control chip 7N10.000MBP is connected to one end of capacitor C69, and the other end of capacitor C69 is grounded.

6. The intelligent substation control system of claim 1, wherein: The clock module includes a clock chip DS3231, a capacitor C4, resistors R25, R26, R27, and R28. The VCC terminal is connected to one end of resistor R25 and one end of resistor R26. The other end of resistor R25 is connected to the SDA terminal of the clock chip DS3231. The other end of resistor R26 is connected to the SCL terminal of the clock chip DS3231. The VDD terminal is connected to one end of resistor R27, one end of resistor R28, one end of capacitor C4, and port 2 of the clock chip DS3231. The other end of resistor R27 is connected to port 1 of the clock chip DS3231. The other end of resistor R28 is connected to port 3 of the clock chip DS3231. The other end of capacitor C4 is grounded.

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