VGA testing device with EDID
By integrating an EDID module and a USB power supply module into the VGA testing device, the problem of not being able to emit EDID signals in the prior art is solved, and complete testing of the device under test is realized.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- EVOC SMART IOT TECH CO LTD
- Filing Date
- 2025-03-26
- Publication Date
- 2026-04-28
AI Technical Summary
The existing VGA testing equipment does not integrate an EDID chip, so it cannot send an EDID signal to the device under test, which makes it impossible to complete the test normally.
The VGA test device integrates an EDID module and a USB power supply module. When the EDID module detects an RGB load, it sends a data display channel signal and responds. The device under test outputs three primary color signals, horizontal sync signals, and vertical sync signals. The USB power supply module supplies power to the EDID module, and the VGA test module performs signal detection.
It enables normal testing of devices that require the reception of an EDID signal to function properly, ensuring the integrity of the testing process.
Smart Images
Figure CN224176642U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of testing device technology, specifically to a VGA testing device with EDID. Background Technology
[0002] A VGA test device is a tool specifically designed to detect and test the signal quality of a VGA interface. VGA stands for Video Graphics Array, a standard analog video display interface widely used in computers, monitors, projectors, and other devices. Despite the increasing popularity of digital interfaces such as HDMI (High Definition Multimedia Interface) and DVI (Digital Visual Interface), VGA remains widely used in certain fields due to its lower cost and broad compatibility. A VGA test device can detect the normality of the RGB (red, green, blue) primary color signals, the horizontal sync (Hsync) and vertical sync (Vsync) signals in the VGA interface, as well as the clock signal (VGA_DDCCLK) and data signal (VGA_DDCDATA) of the DDC signal (Digital Display Channel).
[0003] However, existing VGA test setups, when connected to a DUT (Device Under Test), output RGB, Hsync, and Vsync signals by detecting the load on the RGB pins of the VGA interface. Some DUTs, after detecting the load on the RGB pins, further detect the device's EDID (Extended Display Identification Data) information in real-time via DDC signals before outputting signals. If EDID information is not received, the RGB, Hsync, and Vsync signals cease outputting. Therefore, if the VGA test setup does not have an integrated EDID chip and cannot emit EDID signals, the test of the device under test cannot be completed correctly. 。 Utility Model Content
[0004] This invention provides a VGA testing device with EDID, which aims to solve the problem that existing VGA testing devices do not have an integrated EDID chip, making it impossible to send an EDID signal to the device under test and thus unable to complete the testing of the device under test normally.
[0005] In a first aspect, this utility model proposes a VGA testing device with EDID, comprising: a VGA testing module, an EDID module, and a USB power supply module. The EDID module is connected to the VGA testing module, and the USB power supply module is connected to the EDID module. The EDID module is further configured to connect to a device under test that emits a data display channel signal at a preset time interval when an RGB load is detected. The EDID module is configured to emit a response signal when the data display channel signal is detected, causing the device under test to output a three-primary-color signal, a horizontal sync signal, and a vertical sync signal, and to send the three-primary-color signal, the horizontal sync signal, and the vertical sync signal to the VGA testing module. The USB power supply module is configured to supply power to the EDID module. The VGA testing module is configured to detect the three-primary-color signal, the horizontal sync signal, and the vertical sync signal output by the device under test and obtain the detection result.
[0006] Furthermore, the VGA test module includes a VGA connector, an RGB load unit, a horizontal sync signal load unit, and a vertical sync signal load unit, all of which are connected to the VGA connector.
[0007] Further, the RGB load unit includes a first resistor, a second resistor, a third resistor, a first pin, a second pin, and a third pin; the first end of the first resistor is connected to the first pin of the VGA connector, and the second end of the first resistor is grounded; the first pin of the first pin is connected to the first pin of the VGA connector, and the second and third pins of the first pin are both grounded; the first end of the second resistor is connected to the second pin of the VGA connector, and the second end of the second resistor is grounded; the first pin of the second pin is connected to the second pin of the VGA connector. The second and third pins of the second connector are both grounded; the first end of the third resistor is connected to the third pin of the VGA connector, and the second end of the third resistor is grounded; the first pin of the third connector is connected to the third pin of the VGA connector, and the second and third pins of the third connector are both grounded; the first pin of the VGA connector is used to receive the red signal in the three primary color signals, the second pin of the VGA connector is used to receive the green signal in the three primary color signals, and the third pin of the VGA connector is used to receive the blue signal in the three primary color signals.
[0008] Furthermore, the horizontal synchronization signal load unit includes a fourth resistor and a fourth pin; the first end of the fourth resistor is connected to pin 13 of the VGA connector, and the second end of the fourth resistor is grounded; the first pin of the fourth pin is connected to pin 13 of the VGA connector, and the second and third pins of the fourth pin are both grounded; pin 13 of the VGA connector is used to receive the horizontal synchronization signal.
[0009] Furthermore, the field synchronization signal load unit includes a fifth resistor and a fifth pin; the first end of the fifth resistor is connected to pin 14 of the VGA connector, and the second end of the fifth resistor is grounded; the first pin of the fifth pin is connected to pin 14 of the VGA connector, and the second and third pins of the fifth pin are both grounded; pin 14 of the VGA connector is used to receive the field synchronization signal.
[0010] Furthermore, the housing of the VGA connector is grounded via a ferrite bead.
[0011] Furthermore, any one or any combination of the first pin of the first connector, the first pin of the second connector, and the first pin of the third connector are also connected to the probe of the oscilloscope.
[0012] Furthermore, the EDID module includes an EDID chip, a first test pin, and a second test pin; the SDA pin of the EDID chip is connected to the data signal pin in the VGA test module, and the SCL pin of the EDID chip is connected to the clock signal pin in the VGA test module; the first pin of the first test pin is connected to the SDA pin of the EDID chip, and the second pin of the first test pin is grounded; the first pin of the second test pin is connected to the SCL pin of the EDID chip, and the second pin of the second test pin is grounded.
[0013] Furthermore, the first test pin and / or the second test pin are also connected to the oscilloscope probe.
[0014] Furthermore, the USB power supply module is a USB connector.
[0015] Compared with existing technologies, this utility model provides a VGA testing device for EDID, including a VGA testing module, an EDID module, and a USB power supply module. The EDID module is connected to the VGA testing module, and the USB power supply module is connected to the EDID module. The EDID module is used to send a response signal when it detects that the connected device under test (DUT) is detecting a data display channel signal with RGB load and emitted at a preset time interval, so that the DUT outputs the three primary color signals, horizontal sync signal, and vertical sync signal. The USB power supply module is used to supply power to the EDID module. The VGA testing module is used to detect the three primary color signals, horizontal sync signal, and vertical sync signal output by the DUT and obtain the detection results. By integrating the EDID module into the VGA testing device, this utility model extends the display identification signal through data display channel signal detection, enabling normal testing of DUTs that require the reception of an EDID signal for normal testing. Attached Figure Description
[0016] To more clearly illustrate the technical solutions of the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0017] Figure 1 A schematic block diagram illustrating the application scenario of the VGA testing device with EDID provided by this utility model;
[0018] Figure 2 This is a schematic diagram of the circuit structure of the VGA test module in the VGA test device with EDID provided by this utility model.
[0019] Figure 3 This is a schematic diagram of the circuit structure of the EDID module in the VGA testing device with EDID provided by this utility model. Detailed Implementation
[0020] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of the present utility model.
[0021] The directional terms used in this invention, such as "up," "down," "front," "back," "left," "right," "inner," "outer," and "side," are merely for reference to the accompanying drawings. Therefore, the directional terms used are for explanation and understanding of this invention, and not for limiting it. Furthermore, in the accompanying drawings, structures that are similar or identical are indicated by the same reference numerals.
[0022] It should be understood that, when used in this specification and the appended claims, the terms "comprising" and "including" indicate the presence of the described features, integrals, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or collections thereof.
[0023] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the scope of the invention. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.
[0024] It should also be further understood that the term "and / or" as used in this specification and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.
[0025] Please see Figure 1 This is a schematic block diagram illustrating an application scenario of the VGA testing device with EDID provided by this utility model. Figure 1 As shown in the figure, the VGA testing device 10 with EDID provided in this embodiment of the present invention includes a VGA testing module 11, an EDID module 12, and a USB power supply module 13. The EDID module 12 is connected to the VGA testing module 11, and the USB power supply module 13 is connected to the EDID module 12. The EDID module 12 is also used to connect to the device under test 20, which emits a data display channel signal at a preset time interval when a load is detected in the RGB display channel signal. The EDID module 12 is used to emit a corresponding response signal when the data display channel signal is detected, so that the device under test outputs a three-primary-color signal, a horizontal sync signal, and a vertical sync signal, and to send the three-primary-color signal, the horizontal sync signal, and the vertical sync signal to the VGA testing module 11. The USB power supply module 13 is used to supply power to the EDID module. The VGA testing module 11 is used to detect the three-primary-color signal, the horizontal sync signal, and the vertical sync signal output by the device under test and obtain the detection result.
[0026] In this embodiment, when the VGA testing device 10 with EDID provided by this utility model needs to test the device under test 20, the EDID module 12 in the VGA testing device 10 must first be connected to the device under test 20. Of course, the VGA testing module 11 also needs to be connected to the device under test 20. After the above hardware connection is completed, the specific testing process is as follows:
[0027] 1) The device under test 20 detects whether there is a load on the RGB of the VGA test module 11. If there is a load, it sends a data display channel signal (i.e., DDC signal).
[0028] 2) When the device under test 20 detects that there is a load on RGB, it will continuously emit DDC signals at certain time intervals.
[0029] 3) After receiving the DDC signal, the EDID module 12 responds by sending a response signal back to the device under test 20.
[0030] 4) After receiving the returned response signal, the device under test 20 outputs the three primary color signals, the horizontal synchronization signal and the vertical synchronization signal.
[0031] Through the above process, normal testing of the device under test (DUT) that requires the receipt of an EDID signal can be achieved. The testing of the DUT will not be hindered by the VGA test device's inability to emit an EDID signal. It is important to note that DDC signal transmission is bidirectional, while the three primary color signals, horizontal sync signal, and vertical sync signal are unidirectional. For example, the DDC signal is transmitted bidirectionally between the VGA test device with EDID and the DUT, while the three primary color signals, horizontal sync signal, and vertical sync signal can only be transmitted from the DUT to the VGA test device with EDID.
[0032] In one embodiment, such as Figure 1 and Figure 2 As shown, the VGA test module 11 includes a VGA connector VGA1, an RGB load unit 111, a horizontal sync signal load unit 112, and a vertical sync signal load unit 113. The RGB load unit 111, the horizontal sync signal load unit 112, and the vertical sync signal load unit 113 are all connected to the VGA connector VGA1.
[0033] In this embodiment, when the VGA test module 11 is specifically configured to include a VGA connector VGA1, an RGB load unit 111, a horizontal sync signal load unit 112, and a vertical sync signal load unit 113, the RGB load unit 111, the horizontal sync signal load unit 112, and the vertical sync signal load unit 113 can respectively serve as the detection objects for the device under test 20 to detect whether there is a load on the RGB signal when it is connected to the device under test 20.
[0034] In one embodiment, such as Figure 1 and Figure 2 As shown, the RGB load unit 111 includes a first resistor R1, a second resistor R2, a third resistor R3, a first pin J1, a second pin J2, and a third pin J3; the first end of the first resistor R1 is connected to the first pin of the VGA connector VGA1, and the second end of the first resistor R1 is grounded; the first pin of the first pin J1 is connected to the first pin of the VGA connector VGA1, and the second and third pins of the first pin J1 are both grounded; the first end of the second resistor R2 is connected to the second pin of the VGA connector VGA1, and the second end of the second resistor R2 is grounded; the first pin of the second pin J2 is connected to the VGA connector VGA1. Pin 2 of connector VGA1 is connected, and pins 2 and 3 of the second connector J2 are both grounded; the first end of the third resistor is connected to pin 3 of the VGA connector, and the second end of the third resistor is grounded; pin 1 of the third connector is connected to pin 3 of the VGA connector, and pins 2 and 3 of the third connector are both grounded; pin 1 of VGA connector VGA1 is used to receive the red signal from the three primary color signals, pin 2 of VGA connector VGA1 is used to receive the green signal from the three primary color signals, and pin 3 of VGA connector VGA1 is used to receive the blue signal from the three primary color signals.
[0035] In this embodiment, the VGA connector VGA1, as a connector, connects to the VGA interface of the device under test 20. The first pin J1, the second pin J2, and the third pin J3 are all test pins and can be PH1X3 type test pins. The first pin J1, the second pin J2, and the third pin J3 are all connected to an oscilloscope via test probes. Pins 1, 2, and 3 of the VGA connector VGA1 are the VGA RGB signals, each connected to a 75Ω resistor to ground (corresponding to the first resistor R1, the second resistor R2, and the third resistor R3), i.e., the RGB load. The device under test 20 determines the presence of a load by detecting current changes caused by the load resistors on these three pins. A three-pin connector, namely the first pin J1, the second pin J2, and the third pin J3, is connected between the RGB signal and ground. Each of these three pins has one pin connected to the signal and two pins connected to ground. The first pin J1, the second pin J2, and the third pin J3 are all convenient probe pins for connecting to an oscilloscope.
[0036] In one embodiment, such as Figure 1 and Figure 2 As shown, the horizontal synchronization signal load unit 112 includes a fourth resistor R4 and a fourth pin J4; the first end of the fourth resistor is connected to pin 13 of the VGA connector, and the second end of the fourth resistor is grounded; the first pin of the fourth pin is connected to pin 13 of the VGA connector, and the second and third pins of the fourth pin are both grounded; pin 13 of the VGA connector VGA1 is used to receive the horizontal synchronization signal.
[0037] The field synchronization signal load unit 113 includes a fifth resistor R5 and a fifth pin J5; the first end of the fifth resistor is connected to pin 14 of the VGA connector, and the second end of the fifth resistor is grounded; the first pin of the fifth pin is connected to pin 14 of the VGA connector, and the second and third pins of the fifth pin are both grounded; pin 14 of the VGA connector VGA1 is used to receive the field synchronization signal.
[0038] The housing of the VGA connector VGA1 is also grounded via a ferrite bead FB1.
[0039] In this embodiment, pins 13 and 14 of the VGA connector VGA1 are the VGA Hsync and Vsync signals, respectively, each connected to a 2.2KΩ resistor to ground (i.e., the fourth resistor R4 and the fifth resistor R5). A two-pin connector (i.e., the fourth pin J4 and the fifth pin J5, both of which use PH1X2 test pins) is connected between the Hsync signal, the Vsync signal, and ground. Each pin of the fourth pin J4 and the fifth pin J5 has one pin connected to the signal and one pin connected to ground. Pins 12 and 15 of the VGA connector VGA1 are the VGA DDC data signal (VGA_DDCDATA) and the clock signal (VGA_DDCCLK). Pins 5, 6, 7, 8, and 10 of the VGA connector VGA1 are grounded, and pins 16 and 17 are connected to the chassis ground, specifically the chassis ground of the VGA connector VGA1 connected to ground through a 60Ω ferrite bead. The RGB load unit using the above circuit structure facilitates load monitoring of the device under test.
[0040] In one embodiment, such as Figure 1 and Figure 2 As shown, any one or any combination of the first pin of the first pin J1, the first pin of the second pin J1, and the first pin of the third pin are also connected to the probe of the oscilloscope.
[0041] In this embodiment, since the EDID signal is detected by DDC signal to ensure normal testing, in specific implementation, any one or more combinations of the first pin of the first connector J1, the first pin of the second connector J1, and the first pin of the third connector can also be connected to the oscilloscope probe, so that the signal can be displayed by the oscilloscope. Specifically, when the VGA test device with EDID is connected to the device under test, the probe can be an active single-ended probe. The signal pin of the probe is plugged into any one or more of the first pin of the first connector J1, the first pin of the second connector J1, and the first pin of the third connector. The ground pin of the probe is plugged into the ground pin of the VGA test device with EDID. The other end of the probe is connected to the oscilloscope to realize signal testing.
[0042] In one embodiment, such as Figures 1-3As shown, the EDID module 12 includes an EDID chip U1, a first test pin J6, and a second test pin J7. The SDA pin of the EDID chip U1 is connected to the data signal pin in the VGA test module 11, and the SCL pin of the EDID chip U1 is connected to the clock signal pin in the VGA test module 11. The first pin of the first test pin J6 is connected to the SDA pin of the EDID chip U1, and the second pin of the first test pin J6 is grounded. The first pin of the second test pin J7 is connected to the SCL pin of the EDID chip U1, and the second pin of the second test pin J7 is grounded.
[0043] The first test pin J6 and / or the second test pin J7 are also connected to the oscilloscope probe.
[0044] In this embodiment, the EDID module 12 is actually integrated into the VGA test device 10 with EDID. The clock signal (VGA_DDCCLK) and data signal (VGA_DDCDATA) of the DDC are respectively connected to the clock signal (VGA_DDCCLK) and data signal (VGA_DDCDATA) of the DDC of the RGB load unit 111, the horizontal sync signal load unit 112, and the vertical sync signal load unit 113. Both the first test pin J6 and the second test pin J7 can use PH1X2 type test pins, and one pin of each of the two pins is connected to the signal and the other to ground, and then connected to an oscilloscope through a probe. The EDID chip U1 is an 8-pin chip, such as... Figure 3 As shown, pin 1 is grounded, pins 4 and 5 are the clock signal (VGA_DDCCLK) and data signal (VGA_DDCDATA) of DDC, pin 7 is the power supply pin for EDID and requires a 5V power supply, and pin 8 is the HPD pin and is pulled up to VCC5 through a 10K resistor. Specifically, when the VGA test device with EDID is connected to the device under test, the probe can be an active single-ended probe. The probe's signal pin is plugged into any one or more of the first test pin J6 and / or the second test pin J7, the probe's ground pin is plugged into the ground pin of the VGA test device with EDID, and the other end of the probe is connected to an oscilloscope to perform signal testing.
[0045] In one embodiment, such as Figures 1-3 As shown, the USB power supply module 113 is a USB connector.
[0046] In this embodiment, when the USB power supply module 113 is a USB connector, it is connected to the USB power supply module 113 via a USB data cable with male USB connectors at both ends. One end of the USB data cable is connected to the USB power supply module 113, and the other end of the USB data cable is connected to the USB connector of the device under test 20. At this time, the device under test 20 can provide power to the USB power supply module 113.
[0047] The USB power supply module 113 is also integrated into the VGA test device 10 with EDID, providing 5V power to the EDID module 12. A USB 2.0 connector (i.e., the USB power supply module 113) is connected to the PCB board of the VGA test device 10 with EDID. This connector is a female connector. Pins 1 and 6 of the connector are power supply pins and are connected to VCC5. The VCC5 of the power supply module (such as the device under test) is connected to the VCC5 of the EDID module 12, thus providing 5V power to the EDID chip U1 in the EDID module 12. Pins 2, 3, 6, and 7 of the connector are USB 2.0 data pins, used only for power supply and can be left floating. Pins 4, 8, 9, 10, 11, and 12 of the connector are connected to ground.
[0048] This invention provides a VGA testing device with EDID, including a VGA testing module, an EDID module, and a USB power supply module. The EDID module is connected to the VGA testing module, and the USB power supply module is also connected to the EDID module. The EDID module is used to send a response signal when it detects that the connected device under test (DUT) is transmitting a data display channel signal with RGB load at preset time intervals, causing the DUT to output the three primary color signals, horizontal sync signal, and vertical sync signal. The VGA testing module is used to detect the three primary color signals, horizontal sync signal, and vertical sync signal output by the DUT and obtain the detection result. By integrating the EDID module into the VGA testing device, this invention extends the display identification signal through data display channel signal detection, enabling normal testing of DUTs that require the reception of an EDID signal for normal testing.
[0049] The above description is merely a specific embodiment of this utility model, but the protection scope of this utility model is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this utility model, and these modifications or substitutions should all be covered within the protection scope of this utility model. Therefore, the protection scope of this utility model should be determined by the scope of the claims.
Claims
1. A VGA testing device with EDID, characterized in that, include: The system comprises a VGA test module, an EDID module, and a USB power supply module. The EDID module is connected to the VGA test module, and the USB power supply module is also connected to the EDID module. The EDID module is further configured to connect to the device under test (DUT) that emits a data display channel signal at preset time intervals when an RGB load is detected. When the data display channel signal is detected, the EDID module emits a corresponding response signal to cause the DUT to output three primary color signals, a horizontal sync signal, and a vertical sync signal, and sends these signals to the VGA test module. The USB power supply module powers the EDID module. The VGA test module detects the three primary color signals, the horizontal sync signal, and the vertical sync signal output by the DUT and obtains the detection results.
2. The VGA testing device with EDID according to claim 1, characterized in that, The VGA test module includes a VGA connector, an RGB load unit, a horizontal sync signal load unit, and a vertical sync signal load unit. The RGB load unit, the horizontal sync signal load unit, and the vertical sync signal load unit are all connected to the VGA connector.
3. The VGA testing device with EDID according to claim 2, characterized in that, The RGB load unit includes a first resistor, a second resistor, a third resistor, a first pin, a second pin, and a third pin; the first end of the first resistor is connected to the first pin of the VGA connector, and the second end of the first resistor is grounded; the first pin of the first pin is connected to the first pin of the VGA connector, and the second and third pins of the first pin are both grounded; the first end of the second resistor is connected to the second pin of the VGA connector, and the second end of the second resistor is grounded; the first pin of the second pin is connected to the second pin of the VGA connector, and the third pin... The second and third pins of the two-pin connector are both grounded; the first end of the third resistor is connected to the third pin of the VGA connector, and the second end of the third resistor is grounded; the first pin of the third connector is connected to the third pin of the VGA connector, and the second and third pins of the third connector are both grounded; the first pin of the VGA connector is used to receive the red signal in the three primary color signals, the second pin of the VGA connector is used to receive the green signal in the three primary color signals, and the third pin of the VGA connector is used to receive the blue signal in the three primary color signals.
4. The VGA testing device with EDID according to claim 3, characterized in that, The horizontal synchronization signal load unit includes a fourth resistor and a fourth pin; the first end of the fourth resistor is connected to pin 13 of the VGA connector, and the second end of the fourth resistor is grounded; the first pin of the fourth pin is connected to pin 13 of the VGA connector, and the second and third pins of the fourth pin are both grounded; pin 13 of the VGA connector is used to receive the horizontal synchronization signal.
5. The VGA testing device with EDID according to claim 4, characterized in that, The field synchronization signal load unit includes a fifth resistor and a fifth pin; the first end of the fifth resistor is connected to pin 14 of the VGA connector, and the second end of the fifth resistor is grounded; the first pin of the fifth pin is connected to pin 14 of the VGA connector, and the second and third pins of the fifth pin are both grounded; pin 14 of the VGA connector is used to receive the field synchronization signal.
6. The VGA testing device with EDID according to claim 5, characterized in that, The housing of the VGA connector is also grounded via a ferrite bead.
7. The VGA testing device with EDID according to claim 5, characterized in that, Any one or any combination of the first pin of the first connector, the first pin of the second connector, and the first pin of the third connector are also connected to the probe of the oscilloscope.
8. The VGA testing device with EDID according to claim 1, characterized in that, The EDID module includes an EDID chip, a first test pin, and a second test pin. The SDA pin of the EDID chip is connected to the data signal pin in the VGA test module, and the SCL pin of the EDID chip is connected to the clock signal pin in the VGA test module. The first pin of the first test pin is connected to the SDA pin of the EDID chip, and the second pin of the first test pin is grounded. The first pin of the second test pin is connected to the SCL pin of the EDID chip, and the second pin of the second test pin is grounded.
9. The VGA testing device with EDID according to claim 8, characterized in that, The first test pin and / or the second test pin are also connected to the oscilloscope probe.
10. The VGA testing apparatus with EDID according to any one of claims 1-9, characterized in that, The USB power supply module is a USB connector.