Power switch packaging structure and power circuit

Abstract

The utility model provides a power switch packaging structure and a power circuit, and relates to the technical field of semiconductor packaging. According to the invention, at least part of the bonding line segments of the plurality of source electrode bonding lines are arranged and distributed around the grid electrode lead, so that the mutual inductance mode between the grid electrode and the source electrode of the power switch can be improved, the influence of common source electrode parasitic inductance is reduced, and the Kelvin source electrode packaging related functions are realized. Compared with a Kelvin source electrode packaging structure, the packaging structure provided by the utility model can set all the source electrode bonding wires to be electrically connected with the same source electrode common packaging electrode, so that the number of the packaging electrodes is reduced, the packaging structure is simplified, and the space occupied by the packaging structure is reduced.

Description

Technical Field

[0001] This utility model relates to the field of semiconductor packaging technology, and more specifically, to a power switch packaging structure and a power circuit. Background Technology

[0002] Power semiconductor devices serve various functions, including power conversion, power amplification, power switching, circuit protection, and rectification, and are widely used in almost all electronics manufacturing industries. With rapid socio-economic development and continuous technological advancements, the packaging of power semiconductor devices is constantly being improved in pursuit of higher energy efficiency. However, current power semiconductor device packaging structures are relatively complex, with a large number of electrodes, resulting in significant space requirements. Utility Model Content

[0003] In view of this, the present invention provides a power switch packaging structure and power circuit, which sets all source bonding wires to be electrically connected to the same source common package electrode, thereby reducing the number of package electrodes, simplifying the packaging structure, and reducing the space occupied by the packaging structure.

[0004] To achieve the above objectives, the technical solution provided by this utility model is as follows:

[0005] A power switch package structure, the power switch package structure comprising:

[0006] A power switch, the power switch including a source and a gate;

[0007] A gate-packaged electrode, wherein the gate is connected to the gate-packaged electrode via a gate lead;

[0008] A source common package electrode is connected to the source electrode via multiple source bonding lines, wherein at least a portion of the bonding line segments of the multiple source bonding lines are distributed around the gate lead.

[0009] Optionally, the source electrode is disposed around the gate electrode;

[0010] The connection ends of the source bonding wire and the source are distributed around the connection ends of the gate lead and the gate.

[0011] Optionally, the source electrode is an integral ring electrode;

[0012] Alternatively, the source may include a plurality of electrode blocks disposed along a direction surrounding the gate and isolated from each other, and any one of the electrode blocks may be electrically connected to at least one source bonding line.

[0013] Optionally, the source common package electrode includes a hollow area;

[0014] The gate encapsulation electrode is disposed in the hollow area.

[0015] Based on the same inventive concept, this utility model also provides a power circuit, the power circuit including at least one power switch package structure, the power switch package structure including:

[0016] A power switch, the power switch including a source and a gate;

[0017] A gate-packaged electrode, wherein the gate is connected to the gate-packaged electrode via a gate lead;

[0018] A source common package electrode is connected to the source electrode via multiple source bonding lines, wherein at least a portion of the bonding line segments of the multiple source bonding lines are distributed around the gate lead.

[0019] Optionally, the power circuit includes a bridge inverter;

[0020] The bridge inverter includes at least one phase arm, and any one phase arm includes multiple power switch package structures, all of which include at least one upper arm power switch package structure and at least one lower arm power switch package structure.

[0021] Optionally, the drain of the power switch in all the upper bridge arm power switch package structures is electrically connected to the common drain package electrode of the upper bridge arm, the gate package electrode of all the upper bridge arm power switch package structures is shared as the common gate package electrode of the upper bridge arm, and the source package electrode of all the upper bridge arm power switch package structures is shared as the common source package electrode of the upper bridge arm.

[0022] The drain of the power switch in all the lower bridge arm power switch package structures is electrically connected to the common drain package electrode of the lower bridge arm. The gate package electrodes of all the lower bridge arm power switch package structures are shared as the common gate package electrode of the lower bridge arm. The source package electrodes of all the lower bridge arm power switch package structures are shared as the common source package electrode of the lower bridge arm. The source package electrode of the upper bridge arm and the drain package electrode of the lower bridge arm are shared as the common source-drain package electrode.

[0023] Optionally, the upper bridge arm drain common package electrode and the source drain common package electrode are disposed opposite to each other in a first direction. The source drain common package electrode includes a first electrode portion and a second electrode portion disposed along the first direction, and the first electrode portion and the second electrode portion are connected by a connection portion between them.

[0024] The upper bridge arm drain common package electrode includes at least one switch cutout area, and at least one power switch of the upper bridge arm power switch package structure is disposed in the switch cutout area.

[0025] The first electrode portion is located near the drain common package electrode of the upper bridge arm, and the first electrode portion includes a first hollow area, wherein the gate common package electrode of the upper bridge arm is located in the first hollow area.

[0026] The lower bridge arm source common package electrode is located between the first electrode portion and the second electrode portion, the lower bridge arm source common package electrode includes a second hollow area, and the lower bridge arm gate common package electrode is located in the second hollow area.

[0027] Optionally, in any of the power switch package structures described, the source is arranged around the gate;

[0028] The connection ends of the source bonding wire and the source are distributed around the connection ends of the gate lead and the gate.

[0029] Optionally, the source electrode is an integral ring electrode;

[0030] Alternatively, the source may include a plurality of electrode blocks disposed along a direction surrounding the gate and isolated from each other, and any one of the electrode blocks may be electrically connected to at least one source bonding line.

[0031] Compared with the prior art, the technical solution provided by this utility model has at least the following advantages:

[0032] This utility model provides a power switch packaging structure and a power circuit. The power switch packaging structure includes: a power switch, the power switch including a source and a gate; a gate package electrode, the gate and the gate package electrode being connected through a gate lead; and a source common package electrode, the source common package electrode being connected to the source through multiple source bonding lines, wherein at least a portion of the bonding line segments of the multiple source bonding lines are distributed around the gate lead.

[0033] As described above, the technical solution provided by this utility model improves the mutual inductance between the gate and source of the power switch by distributing at least a portion of the bonding segments of multiple source bonding lines around the gate lead, thereby reducing the influence of common-source parasitic inductance and realizing the functions related to Kelvin source packaging. Furthermore, compared to the Kelvin source packaging structure, the packaging structure provided by this utility model can configure all source bonding lines to be electrically connected to the same common source packaging electrode, thus reducing the number of packaging electrodes, simplifying the packaging structure, and reducing the space occupied by the packaging structure. Attached Figure Description

[0034] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0035] Figure 1 This is an equivalent circuit diagram of an existing circuit that includes power semiconductor devices;

[0036] Figure 2 A schematic diagram of a power switch packaging structure provided in an embodiment of this utility model;

[0037] Figure 3 A schematic diagram of another power switch packaging structure provided in this embodiment of the present invention;

[0038] Figure 4 is a structural schematic diagram of another power switch packaging structure provided in an embodiment of the present utility model;

[0039] Figure 5 A schematic diagram of a power circuit provided in an embodiment of this utility model;

[0040] Figure 6 An equivalent circuit diagram of a power circuit provided for an embodiment of this utility model.

[0041] Figure label:

[0042] V DRV -Drive voltage; R G(int) - Internal gate resistance of the device; R G(ext) - External gate resistance of the device; L DRV - Drive circuit trace inductance; Lg - specifically gate parasitic inductance; Ld - specifically drain parasitic inductance; Ls - specifically common source parasitic inductance; Lps - source inductance; Lgs - mutual inductance; V GS- Gate-source voltage; Vgs - Gate-source voltage; S - Source; G - Gate; D - Drain; S1 - Electrode block; DC+ - Positive DC power; DC- - Negative DC power; AC power supply terminal; 10 - Power switch; 21 - Gate package electrode; 22 - Gate lead; 31 - Source common package electrode; 32 - Source bonding wire; 110 - Upper bridge arm power switch package structure; 120 - Lower bridge arm power switch package structure; 210 - Upper bridge arm drain common package electrode; 220 - Upper bridge arm gate common package electrode; 230 - Upper bridge arm source common package electrode; 240 - Lower bridge arm drain common package electrode; 250 - Lower bridge arm gate common package electrode; 260 - Lower bridge arm source common package electrode; 270 - Source-drain common package electrode; 311 - Cutout area; 310 - First cutout area; 320 - Second cutout area. Detailed Implementation

[0043] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0044] As described in the background section, with the rapid development of the social economy and the continuous advancement of technology, the packaging of power semiconductor devices is also constantly being improved in the pursuit of increasing energy efficiency. Existing power semiconductor device packaging structures are relatively complex, with a large number of packaging electrodes, resulting in a significant space requirement.

[0045] For details, please refer to the following: Figure 1 The diagram shown is an equivalent circuit diagram of a current circuit including power semiconductor devices. It should be noted that... Figure 1 The equivalent circuit diagram shown is a circuit diagram used when analyzing power semiconductor devices, where the circuit traces, device package pins, and device package bond wires are treated as inductors. V DRV For the driving voltage, R G(int) R is the internal gate resistance of the device. G(ext) L is the external gate resistor of the device. DRVLg, Ld, and Ls are parasitic inductances introduced by the bonding wires and lead pins in the drive circuit. Specifically, Lg is the gate parasitic inductance, Ld is the drain parasitic inductance, and Ls is the common-source parasitic inductance. The common-source parasitic inductance Ls is part of both the power circuit and the drive circuit. Therefore, when the device drain current changes rapidly, the common-source parasitic inductance Ls generates an induced electromotive force, which acts as negative feedback to the drive circuit, slowing down the switching speed and increasing switching losses. Therefore, the common-source parasitic inductance Ls is minimized in the design. For example, the currently used Kelvin source package introduces a four-pin package, reducing switching losses. The Kelvin source package adds an extra source pin (called the Kelvin source) specifically for the drive circuit. Using the Kelvin source package avoids the drive circuit and power circuit sharing a common line, achieving decoupling between the two circuits. The gate-source voltage V... GS The separate loop control reduces the impact of the common-source parasitic inductance Ls. Although the Kelvin source packaging method improves the energy efficiency of power semiconductor devices, it requires a separate Kelvin source, which makes the existing power semiconductor device packaging structure more cumbersome, with a large number of package electrodes and a large space occupation problem.

[0046] Based on this, the present invention provides a power switch packaging structure and power circuit, which sets all source bonding wires to be electrically connected to the same source common package electrode, thereby reducing the number of package electrodes, simplifying the packaging structure, and reducing the space occupied by the packaging structure.

[0047] To achieve the above objectives, the technical solution provided by the embodiments of this utility model is as follows, in detail... Figures 2 to 6 The technical solutions provided by the embodiments of this utility model will be described in detail.

[0048] refer to Figure 2 The diagram shown is a structural schematic of a power switch packaging structure provided in an embodiment of the present invention. The power switch packaging structure provided in this embodiment includes:

[0049] A power switch 10 includes a source S and a gate G; a gate package electrode 21, wherein the gate G is connected to the gate package electrode 21 via a gate lead 22; and a source common package electrode 31, wherein the source common package electrode 31 is connected to the source S via multiple source bonding lines 32, wherein at least some of the bonding line segments of the multiple source bonding lines 32 are distributed around the gate lead 22.

[0050] Understandably, the technical solution provided by this utility model embodiment improves the mutual inductance between the gate and source of the power switch by distributing at least a portion of the bonding segments of multiple source bonding lines around the gate lead, thereby reducing the influence of common-source parasitic inductance and realizing the related functions of Kelvin source packaging. Furthermore, compared to the Kelvin source packaging structure, the packaging structure provided by this utility model embodiment can configure all source bonding lines to be electrically connected to the same common source packaging electrode, thereby reducing the number of packaging electrodes, simplifying the packaging structure, and reducing the space occupied by the packaging structure.

[0051] Specifically, during the operation of a power switch, both the source bond wire and the gate lead have inductance. The mutual inductance between the source bond wire and the gate lead largely depends on the relative positions of the lines. When the physical distance between the source bond wire and the gate lead is small enough (e.g., less than 5 mm), that is, when the physical distance between at least a portion of the bond wire segments distributed around the gate lead and the gate lead is small enough, almost all the magnetic flux generated by the inductance of one of the two lines will interact with the other inductance, thereby inducing a relatively large electromotive force, increasing the mutual inductance, and thus reducing the influence of the common-source parasitic inductance.

[0052] In one embodiment of this invention, the source electrode can be configured to surround the gate, thereby allowing the source bonding wires to tend to wrap around the gate leads, further improving the mutual inductance between the gate and the source. Continuing as... Figure 2 As shown in the embodiment of this utility model, the source electrode S is arranged around the gate electrode G; the connection ends of the source bonding wires 32 and the source electrode S are distributed around the connection ends of the gate lead 22 and the gate electrode G. The gate package electrode 21 and the source common package electrode 31 can be located on the same side of the power switch 10. When the source bonding wires 32 are connected to the source common package electrode 31 and the gate lead 22 is connected to the gate package electrode 21, multiple source bonding wires 32 can be distributed in a wrapping manner around the gate lead 22, thereby improving the mutual inductance between the gate G and the source electrode S.

[0053] Continue as Figure 2 As shown in the embodiment of this utility model, the source electrode S is an integral ring electrode, wherein the source electrode S can be a square ring surrounding the gate electrode G. In other embodiments of this utility model, the source electrode can also be a circular ring surrounding the gate electrode, or the source electrode can be other irregular rings surrounding the gate electrode; this utility model does not impose specific limitations on this.

[0054] The source electrode provided in this embodiment of the present invention can be integrally formed in a ring around the gate, or the source electrode provided in this embodiment of the present invention can be further divided into multiple block electrodes surrounding the gate, so as to improve the applicability of the power switch packaging structure. See details. Figure 3 The diagram shown is a schematic representation of another power switch packaging structure provided in an embodiment of the present invention. In this embodiment, the source electrode includes a plurality of electrode blocks S1 arranged along a direction surrounding the gate G and isolated from each other. Each electrode block S1 is electrically connected to at least one source bonding line 32. (In conjunction with...) Figure 2 or Figure 3 As shown, the power switch 10 provided in this embodiment of the present invention also includes a drain D. This embodiment of the present invention does not impose specific restrictions on the position of the drain D, which needs to be specifically designed according to the actual application.

[0055] It should be noted that the embodiments of this utility model do not impose specific limitations on the number of electrode blocks or the number of source bonding lines electrically connected to the electrode blocks. These limitations need to be addressed in the specific design based on the actual application. Optionally, in one embodiment of this utility model, the source can be provided with at least six electrode blocks surrounding the gate, and each electrode block can be electrically connected to two to four source bonding lines.

[0056] Furthermore, to improve the effect of the source bonding wires wrapping the gate leads, the source common package electrode provided in this embodiment of the present invention includes a hollow area; the gate package electrode is disposed in the hollow area. Referring specifically to Figure 4, which is a schematic diagram of another power switch package structure provided in this embodiment of the present invention, the source common package electrode 31 includes a hollow area 311, and the gate package electrode 21 is disposed in the hollow area 311, with the gate package electrode 21 isolated from the source common package electrode 31. All connection ends of the source bonding wires 32 to the source common package electrode 31 can surround the gate package electrode 21 in a manner that surrounds the gate package electrode 21, thereby improving the effect of the source bonding wires 32 wrapping the gate leads 22 and further improving the mutual inductance between the gate and the source.

[0057] Based on the same inventive concept, this utility model embodiment also provides a power circuit, the power circuit including at least one power switch package structure, the power switch package structure including: a power switch, the power switch including a source and a gate; a gate package electrode, the gate and the gate package electrode being connected through a gate lead; a source common package electrode, the source common package electrode being connected to the source through multiple source bond lines, wherein at least a portion of the bond line segments of the multiple source bond lines are distributed around the gate lead. The power switch package structure provided by this utility model embodiment can be as follows: Figure 2 and Figure 3 As shown.

[0058] In one embodiment of this utility model, the power circuit provided in this embodiment may include a bridge inverter; the bridge inverter includes at least one phase arm, and any one phase arm includes multiple power switch package structures, all of which include at least one upper arm power switch package structure and at least one lower arm power switch package structure. See details. Figure 4 The diagram shows a power circuit provided in an embodiment of the present invention. The power circuit provided in this embodiment is a bridge inverter. Each phase bridge arm includes at least one upper bridge arm power switch package structure 110 and at least one lower bridge arm power switch package structure 120. The drain of the power switch of all the upper bridge arm power switch package structures 110 provided in this embodiment is electrically connected to the upper bridge arm drain common package electrode 210 (the connection line is not shown in the figure). The gate package electrodes of all the upper bridge arm power switch package structures 110 are shared as the upper bridge arm gate common package electrode 220, and the source common package electrodes of all the upper bridge arm power switch package structures 110 are shared as the upper bridge arm source common package electrode 230. Furthermore, the drains of the power switches in all the lower bridge arm power switch package structures 120 are electrically connected to the lower bridge arm drain common package electrode 240. The gate package electrodes of all the lower bridge arm power switch package structures 120 are shared as the lower bridge arm gate common package electrode 250, and the source common package electrodes of all the lower bridge arm power switch package structures 120 are shared as the lower bridge arm source common package electrode 260. The upper bridge arm source common package electrode 230 and the lower bridge arm drain common package electrode 240 are shared as the source-drain common package electrode 270. The upper bridge arm drain common package electrode 210 can be connected to the positive DC terminal DC+, the lower bridge arm source common package electrode 260 can be connected to the negative DC terminal DC-, and the source-drain common package electrode 270 can be connected to the AC power supply terminal AC.

[0059] Continue as Figure 4As shown, the upper bridge arm drain common package electrode 210 and the source drain common package electrode 270 provided in this embodiment of the present invention are arranged opposite to each other in a first direction. The source drain common package electrode 270 includes a first electrode portion and a second electrode portion arranged along the first direction, and the first electrode portion and the second electrode portion are connected by a connecting portion between them. The upper bridge arm drain common package electrode 210 includes at least one switch cutout area (not shown), and at least one power switch of the upper bridge arm power switch package structure 110 is disposed in the switch cutout area; and, the first electrode portion is close to the side of the upper bridge arm drain common package electrode 210, and the first electrode portion includes a first cutout area 310, and the upper bridge arm gate common package electrode 220 is located in the first cutout area 310; the lower bridge arm source common package electrode 260 is located between the first electrode portion and the second electrode portion, the lower bridge arm source common package electrode 260 includes a second cutout area 320, and the lower bridge arm gate common package electrode 250 is located in the second cutout area 320. Thus, while ensuring high energy efficiency of the power circuit, its occupied space is further reduced by optimizing the shared relationship of its package electrodes and optimizing the position of the package electrodes and power switches.

[0060] It should be noted that in the power circuit provided by the present invention, the power switch and common package electrodes (such as the upper bridge arm drain common package electrode, the upper bridge arm source common package electrode, the upper bridge arm gate common package electrode, the lower bridge arm drain common package electrode, the lower bridge arm source common package electrode, and the lower bridge arm gate common package electrode) can all be disposed on the substrate, and the common package electrode can be a metal layer on the substrate (optionally, the metal layer provided by the present invention can be a copper layer), and the present invention does not impose specific limitations on this.

[0061] Further integration Figure 5 The diagram shown is an equivalent circuit diagram of a power circuit provided in an embodiment of this utility model. It should be noted that... Figure 5 The equivalent circuit diagram shown is the circuit diagram used when analyzing power circuits, treating circuit traces, device package pins, and device package bond wires as inductors. V DRV For the driving voltage, R G(int) R is the internal gate resistance of the device. G(ext) L is the external gate resistor of the device. DRV Lg is the inductance of the drive circuit trace, Ld is the gate parasitic inductance, Lps is the source inductance, and Lgs is the mutual inductance. It can be seen that the mutual inductance Lgs caused by the source bonding wire and gate lead provided in this embodiment can function as a Kelvin source inductor, thereby avoiding the drive circuit and power circuit sharing a common line. The gate-source voltage Vgs is controlled by a separate circuit, reducing the influence of the common-source parasitic inductance.

[0062] In one embodiment of this utility model, in any of the power switch package structures, the source electrode is arranged around the gate electrode; the connection ends of the source electrode bonding wire and the source electrode are distributed around the connection ends of the gate lead and the gate electrode, further improving the mutual inductance between the gate electrode and the source electrode.

[0063] Furthermore, the source electrode provided in this embodiment of the present invention can be an integral ring electrode; or, the source electrode provided in this embodiment of the present invention includes a plurality of electrode blocks disposed along the direction surrounding the gate and isolated from each other, and any one of the electrode blocks is electrically connected to at least one source bonding line. Specifically, this can be combined with... Figure 2 and Figure 3 As shown, no further details will be provided for this embodiment of the utility model.

[0064] In summary, this utility model provides a power switch packaging structure and a power circuit. The power switch packaging structure includes: a power switch, which includes a source and a gate; a gate package electrode, wherein the gate and the gate package electrode are connected through a gate lead; and a source common package electrode, which is connected to the source through multiple source bonding lines, wherein at least a portion of the bonding line segments of the multiple source bonding lines are distributed around the gate lead.

[0065] As can be seen from the above, the technical solution provided by this utility model embodiment improves the mutual inductance between the gate and source of the power switch by distributing at least a portion of the bonding segments of multiple source bonding lines around the gate lead, thereby reducing the influence of common-source parasitic inductance and realizing the related functions of Kelvin source packaging. Furthermore, compared to the Kelvin source packaging structure, the packaging structure provided by this utility model embodiment can configure all source bonding lines to be electrically connected to the same common source packaging electrode, thereby reducing the number of packaging electrodes, simplifying the packaging structure, and reducing the space occupied by the packaging structure.

[0066] In the description of this utility model, it should be understood that the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and other terms indicating orientation or positional relationships are based on the orientation or positional relationships shown in the accompanying drawings and are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model.

[0067] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this utility model, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0068] In this utility model, unless otherwise explicitly specified and limited, terms such as "installation," "connection," "joining," and "fixing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between the components; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise explicitly limited. Those skilled in the art can understand the specific meaning of the above terms in this utility model according to the specific circumstances.

[0069] In this utility model, unless otherwise explicitly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0070] In this utility model, the terms "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of this utility model. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0071] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. A power switch packaging structure, characterized in that, The power switch packaging structure includes: A power switch, the power switch including a source and a gate; A gate-packaged electrode, wherein the gate is connected to the gate-packaged electrode via a gate lead; A source common package electrode is connected to the source electrode via multiple source bonding lines, wherein at least a portion of the bonding line segments of the multiple source bonding lines are distributed around the gate lead.

2. The power switch packaging structure according to claim 1, characterized in that, The source electrode is arranged around the gate electrode; The connection ends of the source bonding wire and the source are distributed around the connection ends of the gate lead and the gate.

3. The power switch packaging structure according to claim 2, characterized in that, The source electrode is an integral ring electrode; Alternatively, the source may include a plurality of electrode blocks disposed along a direction surrounding the gate and isolated from each other, and any one of the electrode blocks may be electrically connected to at least one source bonding line.

4. The power switch packaging structure according to claim 1, characterized in that, The source common package electrode includes a hollow area; The gate encapsulation electrode is disposed in the hollow area.

5. A power circuit, characterized in that, The power circuit includes at least one power switch package structure, the power switch package structure comprising: A power switch, the power switch including a source and a gate; A gate-packaged electrode, wherein the gate is connected to the gate-packaged electrode via a gate lead; A source common package electrode is connected to the source electrode via multiple source bonding lines, wherein at least a portion of the bonding line segments of the multiple source bonding lines are distributed around the gate lead.

6. The power circuit according to claim 5, characterized in that, The power circuit includes a bridge inverter; The bridge inverter includes at least one phase arm, and any one phase arm includes multiple power switch package structures, all of which include at least one upper arm power switch package structure and at least one lower arm power switch package structure.

7. The power circuit according to claim 6, characterized in that, The drain of the power switch in all the upper bridge arm power switch package structures is electrically connected to the common drain package electrode of the upper bridge arm. The gate package electrode of all the upper bridge arm power switch package structures is shared as the common gate package electrode of the upper bridge arm. The source package electrode of all the upper bridge arm power switch package structures is shared as the common source package electrode of the upper bridge arm. The drain of the power switch in all the lower bridge arm power switch package structures is electrically connected to the common drain package electrode of the lower bridge arm. The gate package electrodes of all the lower bridge arm power switch package structures are shared as the common gate package electrode of the lower bridge arm. The source package electrodes of all the lower bridge arm power switch package structures are shared as the common source package electrode of the lower bridge arm. The source package electrode of the upper bridge arm and the drain package electrode of the lower bridge arm are shared as the common source-drain package electrode.

8. The power circuit according to claim 7, characterized in that, The upper bridge arm drain common package electrode and the source drain common package electrode are disposed opposite to each other in a first direction. The source drain common package electrode includes a first electrode portion and a second electrode portion disposed along the first direction, and the first electrode portion and the second electrode portion are connected by a connection portion between them. The upper bridge arm drain common package electrode includes at least one switch cutout area, and at least one power switch of the upper bridge arm power switch package structure is disposed in the switch cutout area. The first electrode portion is located near the drain common package electrode of the upper bridge arm, and the first electrode portion includes a first hollow area, wherein the gate common package electrode of the upper bridge arm is located in the first hollow area. The lower bridge arm source common package electrode is located between the first electrode portion and the second electrode portion, the lower bridge arm source common package electrode includes a second hollow area, and the lower bridge arm gate common package electrode is located in the second hollow area.

9. The power circuit according to claim 5, characterized in that, In any of the power switch package structures described above, the source is arranged around the gate; The connection ends of the source bonding wire and the source are distributed around the connection ends of the gate lead and the gate.

10. The power circuit according to claim 9, characterized in that, The source electrode is an integral ring electrode; Alternatively, the source may include a plurality of electrode blocks disposed along a direction surrounding the gate and isolated from each other, and any one of the electrode blocks may be electrically connected to at least one source bonding line.

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