Chip transportation carrier tape structure capable of preventing ESD (Electro-Static Discharge) damage

Abstract

The utility model relates to the technical field of chip transport carrier tapes, and particularly discloses a chip transport carrier tape structure capable of preventing ESD (Electro-Static Discharge) damage, which comprises a transport carrier tape body and clamping grooves, the clamping grooves are formed in two sides of the surface of the transport carrier tape body, a covering plate is slidably mounted in each clamping groove, and an adsorption film is arranged in the center of the surface of each covering plate. A groove is formed in the transport carrier tape body, an upper sliding groove is formed in the bottom of the inner side of the groove, an upper sliding block is slidably connected to the surface of the upper sliding groove, a lower sliding groove is formed in the bottom surface of the transport carrier tape body, a lower sliding block is slidably connected to the surface of the lower sliding groove, a conductive plate is fixedly installed on one side of the surface of the lower sliding block, and a grounding head is fixedly installed at the bottom of the conductive plate. According to the chip transportation carrier tape structure capable of preventing ESD damage, the conductive plate can move synchronously with the covering plate all the time, the effectiveness of static electricity guiding out can be guaranteed no matter where the covering plate is located, and compared with a passive anti-static mode of a traditional carrier tape, the risk that a chip is damaged due to electrostatic discharge is greatly reduced.

Description

Technical Field

[0001] This utility model relates to the field of chip transport carrier technology, specifically a chip transport carrier structure that is resistant to ESD damage. Background Technology

[0002] In today's booming semiconductor industry, chips are the core components of various electronic devices, and their production, packaging, and transportation are of paramount importance. However, electrostatic discharge (ESD) damage during chip transportation has always been a serious challenge for the industry.

[0003] Traditional carrier tape cover designs also have shortcomings. Currently, many carrier tapes use simple adhesive or lamination cover designs, requiring multiple manual steps. This process may result in insufficient coverage, and during transportation, dust, moisture, and other impurities can easily enter due to vibration and friction. This can not only cause electrostatic adsorption problems but also lead to physical contamination and corrosion of the chip, affecting its performance. Therefore, we propose an ESD-resistant chip transport carrier tape structure. Utility Model Content

[0004] The purpose of this invention is to provide a chip transport carrier structure that prevents ESD damage, in order to solve the problem mentioned in the background art that dust, moisture and other impurities are easily introduced during transportation due to vibration and friction, which may not only cause electrostatic adsorption problems, but also cause physical pollution and corrosion to the chip, affecting chip performance.

[0005] To achieve the above objectives, this utility model provides the following technical solution: a chip transport carrier structure for preventing ESD damage, comprising a transport carrier body and slots. The slots are formed on both sides of the surface of the transport carrier body. A cover plate is slidably installed inside the slot. An adsorption film is provided at the center of the surface of the cover plate. A groove is formed inside the transport carrier body. An upper sliding groove is formed at the bottom of the inner side of the groove. An upper slider is slidably connected to the surface of the upper sliding groove. A lower sliding groove is formed on the bottom surface of the transport carrier body. A lower slider is slidably connected to the surface of the lower sliding groove. A conductive plate is fixedly installed on one side of the surface of the lower slider. A grounding head is fixedly installed at the bottom of the conductive plate.

[0006] The groove surface has a receiving slot.

[0007] The transport belt body has guide rails fixedly installed on both sides above it.

[0008] The receiving grooves are evenly opened on the surface of the groove, and the upper sliding groove and the lower sliding groove are symmetrically distributed at the upper and lower ends of the receiving groove surface.

[0009] The cover plates are symmetrically distributed on both sides above the receiving groove, corresponding vertically to the receiving groove, and are slidably engaged with the receiving groove above the receiving groove through the slot.

[0010] The upper slide groove and the lower slide groove are vertically aligned, and the upper and lower sliders slide synchronously through the upper and lower slide grooves, which in turn drive the conductive plate and the grounding head to slide synchronously with the cover plate.

[0011] The bottom of the adsorption membrane and the center of the surface of the receiving tank are vertically aligned.

[0012] This utility model has at least the following beneficial effects:

[0013] 1. The electrostatic discharge structure, consisting of a sliding groove, a sliding block, a conductive plate, and a grounding head, can promptly discharge and release static electricity generated during transportation to the ground. The synchronous sliding adjustment design of the upper sliding groove and upper sliding block, along with the lower sliding groove and lower sliding block, ensures that the conductive plate always moves synchronously with the cover plate. Regardless of the position of the cover plate, the effectiveness of electrostatic discharge is guaranteed. Compared with the passive anti-static method of traditional carrier tapes, this greatly reduces the risk of chip damage due to electrostatic discharge.

[0014] 2. The guide rails on top of the carrier tape, the slots on both sides of the surface, and the internal grooves and slides work together to enhance the overall stability of the carrier tape structure while providing electrostatic protection and chip protection. The guide rails assist in the stable transmission of the carrier tape on the transport equipment, and the sliding connection design of the slots and slides ensures smooth movement of each component, ensuring the stability of the carrier tape structure during transportation and further protecting the chip. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the connection structure of the transport belt body, groove, guide rail, slot and cover plate of this utility model;

[0016] Figure 2 This is a schematic diagram of the connection structure between the cover plate and the adsorption membrane of this utility model;

[0017] Figure 3 This is a schematic diagram of the cover plate, receiving groove, upper sliding groove and upper sliding connection structure of this utility model;

[0018] Figure 4 This is a schematic diagram of the connection structure of the sliding groove, sliding block, conductive plate and grounding head of this utility model.

[0019] Figure 5 This is a schematic diagram of the connection structure of the transport belt body, the receiving groove, and the grounding head of this utility model.

[0020] In the diagram: 100, transport belt body; 101, groove; 102, guide rail;

[0021] 200, Card slot; 201, Cover plate; 202, Adsorption film; 203, Receiving groove; 204, Upper sliding groove; 205, Upper slider; 206, Lower sliding groove; 207, Lower slider; 208, Conductive plate; 209, Grounding head. Detailed Implementation

[0022] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0023] Please see Figures 1 to 5 This utility model provides a technical solution: a chip transport carrier structure to prevent ESD damage, including a transport carrier body 100 and slots 200. Slots 200 are formed on both sides of the surface of the transport carrier body 100. Cover plates 201 are slidably installed inside the slots 200. The cover plates 201 are symmetrically distributed on both sides above a receiving groove 203, perpendicularly corresponding to the receiving groove 203, and are slidably engaged with the receiving groove 203 above it via the slots 200. An adsorption film 202 is provided at the center of the surface of the cover plate 201, with the bottom of the adsorption film 202 perpendicularly corresponding to the center of the surface of the receiving groove 203. A recess is formed inside the transport carrier body 100. The groove 101 has an upper sliding groove 204 at the bottom of its inner side. An upper slider 205 is slidably connected to the surface of the upper sliding groove 204. A lower sliding groove 206 is provided on the bottom surface of the transport belt body 100. The upper sliding groove 204 and the lower sliding groove 206 are vertically corresponding. The upper slider 205 and the lower slider 207 are adjusted synchronously through the upper sliding groove 204 and the lower sliding groove 206, which drives the conductive plate 208 and the grounding head 209 to adjust synchronously with the cover plate 201. The lower slider 207 is slidably connected to the surface of the lower sliding groove 206. A conductive plate 208 is fixedly installed on one side of the surface of the lower slider 207. A grounding head 209 is fixedly installed at the bottom of the conductive plate 208.

[0024] The surface of the groove 101 is provided with a receiving groove 203. The receiving groove 203 is evenly provided on the surface of the groove 101, and the upper sliding groove 204 and the lower sliding groove 206 are symmetrically distributed at the upper and lower ends of the surface of the receiving groove 203.

[0025] Guide rails 102 are fixedly installed on both sides above the transport belt body 100.

[0026] It should be noted that the adsorption membrane 202 is made of a special electrostatic adsorption material. When it comes into contact with the chip surface, it can generate a uniform and moderate adsorption force by utilizing the principle of electrostatic adsorption, so as to firmly fix the chip in the receiving groove 203.

[0027] The conductive plate 208 is made of a highly conductive metal material, and its surface has undergone special treatment to provide excellent oxidation and corrosion resistance, ensuring long-term stable conductivity. When static electricity is conducted to the conductive plate 208, it will quickly conduct the static electricity to the grounding head 209.

[0028] The grounding head 209 is designed with a quick-plug connection structure. Before transportation, the operator connects the grounding head 209 to an external professional grounding device. The grounding device typically uses a metal electrode buried deep underground, which can safely and quickly release static electricity into the ground.

[0029] Working principle: When transporting chips, the operator can slide the cover plate 201 to both sides along the slot 200, exposing the receiving slot 203. Since the receiving slot 203 is evenly distributed on the surface of the groove 101, it provides a stable placement space for the chip. The operator places the chip in the receiving slot 203, at which point the adsorption film 202 is directly above the chip. Next, the cover plate 201 is slid back to its original position along the slot 200, covering the receiving slot 203. The adsorption film 202 will contact the chip surface and create an adsorption effect, firmly fixing the chip in the receiving slot 203 and preventing damage due to shaking during transport.

[0030] During chip transportation, static electricity is inevitably generated due to factors such as friction. At this time, the static electricity discharge structure composed of the sliding groove 206, the sliding block 207, the conductive plate 208, and the grounding head 209 comes into play. The upper sliding groove 204 and the lower sliding groove 206 are vertically aligned, and the upper sliding block 205 and the lower sliding block 207 slide synchronously through the upper sliding groove 204 and the lower sliding groove 206. When the cover plate 201 slides, it causes the upper sliding block 205 to slide in the upper sliding groove 204, while the lower sliding block 207 also slides synchronously in the lower sliding groove 206, thereby causing the conductive plate 208 and the grounding head 209 to move synchronously with the cover plate 201.

[0031] The generated static electricity is conducted through the transport belt body 100 to the conductive plate 208, which then conducts the static electricity to the grounding head 209. The grounding head 209 is connected to an external grounding device, thereby releasing the static electricity to the ground in a timely manner. This design ensures that the conductive plate 208 maintains effective static electricity discharge regardless of the position of the cover plate 201.

[0032] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus.

[0033] Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the present invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A chip transport carrier structure resistant to ESD damage, comprising a transport carrier body (100) and a slot (200), characterized in that: The slots (200) are formed on both sides of the surface of the transport belt body (100). A cover plate (201) is slidably installed inside the slots (200). An adsorption film (202) is provided at the center of the surface of the cover plate (201). A groove (101) is formed inside the transport belt body (100). An upper sliding groove (204) is formed at the bottom of the inner side of the groove (101). An upper slider (205) is slidably connected to the surface of the upper sliding groove (204). A lower sliding groove (206) is formed on the bottom surface of the transport belt body (100). A lower slider (207) is slidably connected to the surface of the lower sliding groove (206). A conductive plate (208) is fixedly installed on one side of the surface of the lower slider (207). A grounding head (209) is fixedly installed at the bottom of the conductive plate (208).

2. The chip transport carrier structure for preventing ESD damage according to claim 1, characterized in that: The groove (101) has a receiving groove (203) on its surface.

3. The chip transport carrier structure for preventing ESD damage according to claim 1, characterized in that: Guide rails (102) are fixedly installed on both sides above the transport carrier body (100).

4. The chip transport carrier structure for preventing ESD damage according to claim 2, characterized in that: The receiving groove (203) is evenly opened on the surface of the groove (101), and the upper sliding groove (204) and the lower sliding groove (206) are symmetrically distributed on the upper and lower ends of the surface of the receiving groove (203).

5. The chip transport carrier structure for preventing ESD damage according to claim 1, characterized in that: The cover plate (201) is symmetrically distributed on both sides above the receiving groove (203), vertically corresponding to the receiving groove (203), and is slidably engaged above the receiving groove (203) through the slot (200).

6. The chip transport carrier structure for preventing ESD damage according to claim 1, characterized in that: The upper slide groove (204) and the lower slide groove (206) are vertically corresponding, and the upper slide block (205) and the lower slide block (207) are synchronously slidable and adjusted through the upper slide groove (204) and the lower slide groove (206), which in turn drive the conductive plate (208) and the grounding head (209) to be synchronously slidable and adjusted with the cover plate (201).

7. The chip transport carrier structure for preventing ESD damage according to claim 1, characterized in that: The bottom of the adsorption membrane (202) and the center of the surface of the receiving tank (203) are perpendicularly opposite each other.

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