Packaging structure and vehicle body electronic controller

Abstract

The embodiment of the utility model discloses a packaging structure and a vehicle body electronic controller. The packaging structure comprises a PCB (Printed Circuit Board), the PCB is provided with a via hole and a test point; wherein the plane where the PCB is located is defined as a projection reference plane, the forward projection of the via hole on the projection reference plane is a first projection, the forward projection of the test point on the projection reference plane is a second projection, and the first projection at least partially coincides with the second projection. According to the packaging structure, the via holes and the test points partially or completely coincide on the projection reference surface, the number of the via holes corresponding to the number of the test points is reduced, the area of a PCB is reduced, a stable contact surface is provided for ICT test, and the test accuracy is improved. The vehicle body electronic controller comprises the packaging structure and has all the beneficial effects.

Description

Technical Field

[0001] This utility model relates to the field of shaft technology, and in particular to a packaging structure and a vehicle body electronic controller. Background Technology

[0002] Today's controller products are facing increasing demands, such as pressure to reduce costs and improve quality. However, larger PCB boards present a problem due to their larger area, which does not save on material costs and also hinders the flexibility of product use.

[0003] In related technologies, PCBs have vias and test points, which are designed independently in the PCB layout, maintaining a certain distance between them to ensure they do not overlap. Meanwhile, as... Figure 1 As shown, based on the area distribution on the PCB, each via occupies an area of ​​0.87 mm², and each test point occupies an area of ​​2.85 mm². The actual total area occupied varies depending on the product design. Taking the existing 223mm x 175mm product as an example, the total number of vias is 4200, occupying an area of ​​3654 mm²; the total number of test points is 2100, occupying an area of ​​5985 mm²; the total product area is 39025 mm². Therefore, the proportion of vias on the PCB is 9.36%, and the proportion of test points on the PCB is 15.34%. It can be seen that the proportion of both on the PCB area is very large.

[0004] Therefore, a new packaging structure is urgently needed to solve the above-mentioned technical problems. Summary of the Invention

[0005] The purpose of this invention is to provide a packaging structure and a vehicle electronic controller. This packaging structure reduces the number of vias corresponding to the number of test points by partially or completely aligning the vias with the test points on the projection reference plane, thereby reducing the PCB area, providing a stable contact surface for ICT testing, and improving test accuracy.

[0006] This utility model discloses a packaging structure, which includes:

[0007] The PCB board has vias and test points.

[0008] Wherein, the plane on which the PCB board is located is defined as the projection reference plane, the positive projection of the via on the projection reference plane is the first projection, the positive projection of the test point on the projection reference plane is the second projection, and the first projection at least partially overlaps with the second projection.

[0009] Furthermore, the second projection is larger than the first projection, and the first projection falls completely within the second projection, so that the test point completely covers the via.

[0010] Furthermore, both the first projection and the second projection are circular, and the via pad corresponding to the via is tangent to the test point pad corresponding to the test point.

[0011] Furthermore, the center of the via is offset from the center of the test point.

[0012] Furthermore, the diameter of the via is 0.2 mm, and the diameter of the test point is 0.9 mm-1 mm.

[0013] Furthermore, the PCB board includes bare copper pads and an organic protective film, the organic protective film wrapping the bare copper pads; the packaging structure also includes solder paste, the solder paste being applied to the test points to stack and form a paste structure, wherein a portion of the paste structure fills the vias.

[0014] Furthermore, the thickness of the paste structure is 150 μm.

[0015] Furthermore, the PCB board includes bare copper pads and a tin layer, the tin layer being sprayed onto the bare copper pads, and the vias being located at any position within the area where the test point is located.

[0016] Furthermore, there are multiple vias and multiple test points, and each of the multiple vias and multiple test points corresponds to and cooperates with each other.

[0017] This utility model embodiment further discloses a vehicle body electronic controller, which includes the above-described packaging structure.

[0018] The packaging structure and vehicle electronic controller provided by this utility model have at least the following beneficial effects, including but not limited to:

[0019] 1) This packaging structure reduces the number of vias required for each test point by partially or completely aligning the vias with the test points on the projection reference plane, thereby reducing the PCB area, providing a stable contact surface for ICT testing, and improving test accuracy.

[0020] 2) This packaging structure allows for different layout methods for PCBs with different processes, thereby improving its applicability and enabling targeted reduction of manufacturing costs while improving testing accuracy. For example, for OSP-type PCBs, the placement of vias is particularly critical because test points require solder paste application. Research has shown that when the center of the via coincides with the center of the test point, the ICT test yield is extremely poor. This is because after the solder paste fills the via space, a small groove remains at the center of the test point. The top layer of the bottom of the groove is filled with flux, which is an insulating medium. Therefore, after the probe contacts the PCB, there is no electrical connection between the tester and the product, resulting in extremely poor test yield. Thus, this packaging structure uses different via and test point arrangements for different PCBs, which can effectively reduce the PCB area while improving testing accuracy. Attached Figure Description

[0021] This specification will be further described by way of exemplary embodiments, which will be described in detail with reference to the accompanying drawings. These embodiments are not limiting; in these embodiments, the same reference numerals denote the same structures, wherein:

[0022] Figure 1 One of the partial structural diagrams of the packaging structure provided in the embodiment of this utility model;

[0023] Figure 2 This is a second partial structural diagram of the packaging structure provided in an embodiment of the present utility model.

[0024] Icons: 100 - Package structure; 10 - Via; 101 - First projection; 11 - Test point; 111 - Second projection; 12 - Paste structure. Detailed Implementation

[0025] The following specific examples illustrate the implementation of this utility model. Those skilled in the art can easily understand other advantages and effects of this utility model from the content disclosed in this specification. This utility model can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this utility model. It should be noted that, unless otherwise specified, the following embodiments and features described therein can be combined with each other.

[0026] It should be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of the present invention. Therefore, the illustrations only show the components related to the present invention and are not drawn according to the number, shape and size of the components in actual implementation. In actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0027] In related technologies, vias and test points are designed independently on the PCB layout, each maintaining a certain distance from other electrical components to ensure they do not overlap. It should be noted that the independence of vias and test points on the PCB layout means that each test point and via needs to maintain a certain distance from other electrical components to ensure they do not overlap.

[0028] Therefore, the inventors, through research on related technologies, discovered that based on the design for product functionality, the distribution of test points and vias will not affect the product's functionality as long as it follows the PCB layout rules. The distribution of these points is relatively flexible and random. In general, the electrical properties of vias and test points are connected. Therefore, a breakthrough can be made in the design by directly overlapping the positions of the two (completely overlapping or partially overlapping) to save PCB area for the smaller of the two vias.

[0029] Please refer to Figures 1-2 This embodiment provides a packaging structure 100, which includes a PCB board. Through-holes 10 and test points 11 are formed on the PCB board; wherein, the plane where the PCB board is located is defined as a projection reference plane, the orthogonal projection of the through-hole 10 on the projection reference plane is a first projection 101, and the orthogonal projection of the test point 11 on the projection reference plane is a second projection 111, and the first projection 101 at least partially overlaps with the second projection 111.

[0030] It is worth noting that by partially or completely overlapping the vias 10 and test points 11 on the projection reference plane, the package structure 100 reduces the number of vias 10 corresponding to the number of test points 11, reduces the PCB area, provides a stable contact surface for ICT testing, and improves test accuracy.

[0031] In this embodiment, the second projection 111 is larger than the first projection 101, and the first projection 101 falls completely into the second projection 111, so that the test point 11 completely covers the via 10.

[0032] It is worth noting that test point 11 and via 10 share the same projection area, which avoids the extra space occupied by separating them in related designs, thereby achieving miniaturization and high integration of the PCB board. In addition, the test point pad completely covers via 10, allowing current to flow directly from test point 11 to via 10, which can shorten the signal transmission path, reduce parasitic inductance and resistance, and improve high-frequency signal integrity.

[0033] In this embodiment, both the first projection 101 and the second projection 111 are circular, and the via pad corresponding to the via 10 is tangent to the test point pad corresponding to the test point 11.

[0034] It is worth noting that the tangential (non-completely overlapping) layout of circular pads can minimize pad spacing while ensuring functional connectivity, avoiding the redundant space occupation of traditional separate layouts, making it suitable for high-density PCB designs. In addition, the symmetrical nature of the circular projection makes the area occupied by the tangential pads on the projection reference plane controllable, facilitating regular arrangement with other components or traces and reducing design complexity.

[0035] In this embodiment, for PCB boards using OSP-type processes, the PCB board includes bare copper pads and an organic protective film, with the organic protective film covering the bare copper pads; the package structure 100 also includes solder paste, which is applied to test points 11 to stack and form a paste structure 12, wherein a portion of the paste structure 12 fills the vias 10.

[0036] It is worth noting that for PCBs using OSP-type processes, the placement of vias 10 is particularly critical because test point 11 requires solder paste application. Research has shown that when the center of via 10 coincides with the center of test point 11, the ICT test yield is extremely poor. This is because after the solder paste fills the space of via 10, a small groove remains at the center of test point 11. The top layer at the bottom of the groove is filled with flux, which is an insulating medium. Therefore, after the probe contacts the PCB, no electrical connection is established between the tester and the product, resulting in extremely poor test yield.

[0037] Therefore, the inventors conceived that, in one embodiment of this invention, the center of the via 10 is offset from the center of the test point 11.

[0038] Optionally, the diameter of the via 10 is 0.2 mm, and the diameter of the test point 11 is 0.9 mm to 1 mm.

[0039] Specifically, the position of via 10 relative to test point 11 was optimized in the design, making it as far away from the center of test point 11 as possible. At the same time, the diameter of via 10 was reduced from 0.25mm to 0.2mm, so as to avoid the area where the probe contacts via 10 as much as possible, thereby improving the accuracy and efficiency of the test.

[0040] In this embodiment, the thickness of the paste structure 12 is 150 μm.

[0041] It is worth noting that the amount of solder paste was controlled during the manufacturing process, with the thickness of the paste structure 12 controlled at 150um and the solder paste area covering the entire test point 11 area. This ensured that the amount of solder paste just filled the space of the via 10, thereby eliminating the pits formed after reflow soldering and improving the mechanical strength of the solder interface and the stability of the electrical connection.

[0042] In this embodiment, for a PCB board manufactured using conventional processes, the PCB board includes bare copper pads and a solder layer. The solder layer is sprayed onto the bare copper pads, and the via 10 is located at any position within the area where the test point 11 is located (e.g., Figure 1 (As shown).

[0043] It is worth noting that for PCBs using standard processes, vias 10 can be placed anywhere within the area of ​​test point 11, providing greater design freedom, facilitating contact with test probes, and improving testing convenience and operability. Furthermore, this arrangement eliminates the need for additional complex processes, reducing manufacturing costs while increasing production efficiency.

[0044] In this embodiment, there are multiple vias 10 and multiple test points 11, and the multiple vias 10 and multiple test points 11 correspond one-to-one and cooperate with each other.

[0045] The structural design has been verified multiple times, and the preferred implementation is as follows: the diameter of via 10 is designed to be 0.2mm, and the edge of the via pad is designed to be tangent to the edge of the test point pad. The verification results show that the ICT test yield is 100%. The puncture marks of the ICT probes were observed under a high-magnification microscope and all of them had hit the test point 11 and deviated from the groove of via 10. At the same time, in order to ensure good electrical continuity even when the probe contact test point 11 is slightly off, the original sharp needle was replaced with a 4-claw needle with a needle diameter greater than 0.2mm. The verification results were even more ideal, so the verification was successful.

[0046] This utility model embodiment further discloses a vehicle body electronic controller, which includes the above-described packaging structure 100 and has all its beneficial effects.

[0047] The above embodiments are merely illustrative of the principles and effects of this utility model and are not intended to limit the scope of this utility model. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of this utility model. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this utility model should still be covered by the claims of this utility model.

[0048] Throughout this description, numerous specific details, such as examples of components and / or methods, are provided to provide a complete understanding of embodiments of the present invention. However, those skilled in the art will recognize that embodiments of the present invention may be practiced without one or more of these specific details or by other devices, systems, components, methods, parts, materials, components, etc. In other instances, well-known structures, materials, or operations have not been specifically shown or described in detail to avoid obscuring aspects of embodiments of the present invention.

[0049] Throughout this specification, references to "an embodiment," "an embodiment," or "a specific embodiment" mean that a particular feature, structure, or characteristic described in connection with an embodiment is included in at least one embodiment of the present invention, but not necessarily in all embodiments. Therefore, the various representations of the phrases "in one embodiment," "in an embodiment," or "in a specific embodiment" in different places throughout the specification do not necessarily refer to the same embodiment. Furthermore, a particular feature, structure, or characteristic of any specific embodiment of the present invention can be combined with one or more other embodiments in any suitable manner. It should be understood that other variations and modifications of the embodiments of the present invention shown herein may be based on the teachings herein and will be considered part of the spirit and scope of the present invention.

[0050] It should also be understood that one or more of the elements shown in the figures may be implemented in a more separate or more integrated manner, or may even be removed because they are inoperable in certain circumstances or provided because they may be useful for a particular application.

[0051] Furthermore, unless otherwise expressly stated, any arrows in the accompanying drawings should be considered illustrative only and not limiting. Additionally, unless otherwise stated, the term "or" as used herein is generally intended to mean "and / or". Where a term is anticipated to provide a separation or combination capability that is unclear, a combination of components or steps will also be considered as indicated.

[0052] As used herein and throughout the claims below, unless otherwise specified, “a” and “the” include the plural references. Similarly, as used herein and throughout the claims below, unless otherwise specified, “in” means “in” and “on”.

[0053] The above description of the embodiments shown in this utility model (including the content in the abstract of the specification) is not intended to be an exhaustive enumeration or to limit the utility model to the precise forms disclosed herein. Although specific embodiments and examples of the utility model have been described herein for illustrative purposes only, various equivalent modifications are possible within the spirit and scope of the utility model, as will be recognized and understood by those skilled in the art. As indicated, these modifications can be made to the utility model in accordance with the above description of the embodiments of the utility model, and such modifications will be within the spirit and scope of the utility model.

[0054] This document has generally described the systems and methods in detail to aid in understanding the present invention. Furthermore, various specific details have been set forth to provide a general understanding of embodiments of the present invention. However, those skilled in the art will recognize that embodiments of the present invention can be practiced without one or more specific details, or using other devices, systems, accessories, methods, components, materials, parts, etc. In other instances, well-known structures, materials, and / or operations have not been specifically shown or described in detail to avoid obscuring aspects of embodiments of the present invention.

Claims

1. A packaging structure, characterized in that, include: The PCB board has vias and test points. Wherein, the plane on which the PCB board is located is defined as the projection reference plane, the positive projection of the via on the projection reference plane is the first projection, the positive projection of the test point on the projection reference plane is the second projection, and the first projection at least partially overlaps with the second projection.

2. The packaging structure according to claim 1, characterized in that, The second projection is larger than the first projection, and the first projection falls completely within the second projection, so that the test point completely covers the via.

3. The packaging structure according to claim 2, characterized in that, Both the first projection and the second projection are circular, and the via pad corresponding to the via is tangent to the test point pad corresponding to the test point.

4. The packaging structure according to claim 2 or 3, characterized in that, The center of the via is offset from the center of the test point.

5. The packaging structure according to claim 4, characterized in that, The diameter of the via is 0.2 mm, and the diameter of the test point is 0.9 mm-1 mm.

6. The packaging structure according to claim 4, characterized in that, The PCB board includes bare copper pads and an organic protective film, the organic protective film being wrapped around the bare copper pads; the packaging structure also includes solder paste, the solder paste being applied to the test points to stack and form a paste structure, wherein a portion of the paste structure fills the vias.

7. The packaging structure according to claim 6, characterized in that, The thickness of the paste structure is 150 μm.

8. The packaging structure according to claim 2, characterized in that, The PCB board includes bare copper pads and a tin layer. The tin layer is sprayed onto the bare copper pads, and the vias are located at any position within the area where the test point is located.

9. The packaging structure according to claim 1, characterized in that, The number of vias and test points are both multiple, and the multiple vias and test points correspond one-to-one and cooperate with each other.

10. A vehicle body electronic controller, characterized in that, Includes the packaging structure as described in any one of claims 1-9.

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