Semiconductor packaging structure

Abstract

The utility model discloses a semiconductor packaging structure, and relates to the technical field of semiconductor packaging. The DBC lower layer connection copper layer is included, the top of the DBC lower layer connection copper layer is fixedly connected with a DBC insulation ceramic layer, the two sides of the top of the DBC insulation ceramic layer are both fixedly connected with DBC upper layer circuit copper layers, the top of the DBC upper layer circuit copper layer on one side is fixedly connected with a connection layer, the top of the connection layer is fixedly connected with a chip, and the chip is fixedly connected with the DBC lower layer connection copper layer. The top of the chip is fixedly connected with a chip electrode, and the top of the chip electrode is fixedly connected with a connecting piece. According to the utility model, an extra expensive solder layer or a complex silver sintering process and a bonding wire bonding step are not needed, so that the material cost is reduced; the DTS process relates to bonding of a silver sintered copper sheet and a bonding wire, the process is complex, and the cost is high, however, by simplifying the connection mode, the material and process cost is reduced, and the cost advantage is obvious.

Description

Technical Field

[0001] This utility model relates to the field of semiconductor packaging technology, and in particular to a semiconductor packaging structure. Background Technology

[0002] In semiconductor packaging, there are several common packaging methods for achieving electrical connections between the chip electrodes and the external frame / DBC (Direct Copper Ceramic Board) / AMB (Metal Brazing): 1. Wire bonding, 2. Aluminum / copper strip bonding, 3. Copper clip reflow soldering, and 4. DTS (Die Top System), where copper clips are sintered with silver and then bonded. Their respective advantages and disadvantages are as follows:

[0003] 1. Aluminum bonding wire bonding: Requires less stringent requirements for the chip surface metallization layer, resulting in lower cost. However, it suffers from lower mechanical strength, lower current carrying capacity, shorter reliability and lifespan, poor heat dissipation, higher thermal fatigue failure rate, and higher stray inductance.

[0004] 2. Copper bonding wire bonding: Lower cost, higher current carrying capacity, higher mechanical strength, better heat dissipation, and longer reliability and lifespan. However, it requires a higher metallization layer on the chip surface, is more difficult to implement, and is prone to damaging the chip cell.

[0005] 3. Aluminum / copper strip bonding: Lower cost, higher current carrying capacity, higher mechanical strength, better heat dissipation, and longer reliability and lifespan. However, it requires a longer minimum distance between the two connection points, can only be connected in a straight line, and has a small turning angle.

[0006] 4. Copper clip reflow soldering: High reliability, high current carrying capacity, high mechanical strength, and good heat dissipation. However, chips with an aluminum surface metal layer cannot be used; solder must be added as a connection layer, which increases cost and complicates the process.

[0007] 5. DTS (Die Top System) copper clip sintered with silver and then bonded: High reliability, high current carrying capacity, high mechanical strength, and good heat dissipation. However, chips with an aluminum surface metal layer cannot be used; silver-sintered copper clips and wire bonding are required, which is a complex and costly process.

[0008] To address these issues, we provide a semiconductor packaging structure. Summary of the Invention

[0009] In response to the current semiconductor packaging structure, this invention solves the problem that the existing packaging process is complex and cannot adapt to the connection between different chips and the DBC copper layer by coordinating the upper circuit copper layer, chip electrodes and connecting pieces.

[0010] To solve the above problems, the technical solution adopted by the present invention is a semiconductor packaging structure, including a lower DBC connecting copper layer, a DBC insulating ceramic layer fixedly connected to the top of the lower DBC connecting copper layer, upper DBC circuit copper layers fixedly connected to both sides of the top of the upper DBC circuit copper layer, a connection layer fixedly connected to the top of one of the upper DBC circuit copper layers, a chip fixedly connected to the top of the connection layer, a chip electrode fixedly connected to the top of the chip, a connection piece fixedly connected to the top of the chip electrode, and the other end of the connection piece fixedly connected to the top of the other upper DBC circuit copper layer.

[0011] Preferably, the connector includes an inner copper layer, the surface of which is coated with an outer aluminum layer. In this preferred embodiment, the inner copper layer ensures good conductivity, enabling efficient transmission of electrical signals; the outer aluminum layer has good oxidation resistance and bonding properties, facilitating connection with other components, while also reducing the weight of the connector to some extent and improving overall performance.

[0012] Preferably, the connecting piece is connected to the chip electrodes and the copper layer of the DBC upper circuitry via ultrasonic welding or bonding. In this preferred embodiment, this connection method can form a strong connection without introducing excessive impurities, ensuring the stability of signal transmission, and the process is relatively simple and easy to operate.

[0013] Preferably, the shape of the connector can be customized according to the copper layer of different DBC upper circuits. In this preferred embodiment, the customized design allows the package structure to better adapt to various complex circuit layout requirements, improves space utilization, and enhances the integration and applicability of the entire semiconductor device.

[0014] Preferably, the top metal layer on the chip electrode surface is any metal that can be bonded to aluminum. In this preferred embodiment, this greatly broadens the range of chip choices, allowing different types of chips to be well-suited to this packaging structure and improving its versatility.

[0015] Preferably, after the chip is connected to the copper layer of the upper circuit of the DBC, it needs to be plasma cleaned. In this preferred embodiment, plasma cleaning can remove impurities, oxides, etc. from the connection surface, improve the reliability and stability of the connection, and ensure the quality of electrical connection between the chip and the copper layer of the upper circuit of the DBC.

[0016] Preferably, the connector is positioned with respect to the chip electrodes and the copper layer of the DBC upper circuit using customized tooling. In this preferred embodiment, this positioning method ensures the accuracy of the connector's position during the connection process, improves production efficiency and product consistency, and reduces connection defects caused by positioning deviations.

[0017] Preferably, the connecting piece is connected to the upper copper layer of the DBC circuit via its own body or through an inner copper layer. In this preferred embodiment, the diverse connection methods provide more options for actual production and application, allowing for flexible adjustments according to specific needs and improving the application flexibility of the packaging structure.

[0018] Preferably, the lower connecting copper layer, the DBC insulating ceramic layer, and the upper circuit copper layer of the DBC are fixedly connected by a bonding process. In this preferred embodiment, the bonding process enables a tight bond between the layers, ensuring the stability and reliability of the entire DBC structure and facilitating the transmission of electrical signals and the dissipation of heat.

[0019] Preferably, the connection layer is formed by soldering or silver sintering. In this preferred embodiment, both connection processes can form a strong physical and electrical connection between the chip and the copper layer of the upper circuitry of the DBC, ensuring the stability of the chip during operation and effectively transmitting electrical signals and heat.

[0020] This utility model has the following beneficial effects:

[0021] 1. This utility model eliminates the need for additional expensive solder layers or complex silver sintering processes and bonding wire bonding steps, thus reducing material costs. The DTS process involves silver sintering of copper sheets and bonding wire bonding, which is complex and results in high costs. This invention simplifies the connection method, reduces material and process costs, and has a significant cost advantage.

[0022] 2. The semiconductor packaging structure of this utility model exhibits excellent performance in terms of mechanical strength, current carrying capacity, heat dissipation, reliability, lifespan, and stray inductance. Compared to aluminum bonding and wire bonding, it has higher mechanical strength, can better withstand external stress, and is less prone to breakage; it has stronger current carrying capacity, meeting the requirements of high current transmission; it has excellent heat dissipation, with the heat generated by the chip being quickly dissipated through structures such as the DBC ceramic substrate, reducing chip temperature and improving operational stability; it has a long reliability lifespan, reducing failures caused by thermal fatigue; and it has low stray inductance, which is beneficial for stable signal transmission, thus improving the overall performance and reliability of the semiconductor device. Attached Figure Description

[0023] To more clearly illustrate the technical solution of this utility model / invention, the drawings used in the description will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1A three-dimensional view of a semiconductor packaging structure;

[0025] Figure 2 This is a rear view schematic diagram of a semiconductor packaging structure;

[0026] Figure 3 In a semiconductor packaging structure Figure 2 Enlarged view of point A;

[0027] Figure 4 In a semiconductor packaging structure Figure 2 Enlarged diagram of point B.

[0028] In the attached diagram: 1. Lower DBC connecting copper layer; 2. DBC insulating ceramic layer; 3. Upper DBC circuit copper layer; 4. Connecting layer; 5. Chip; 6. Chip electrode; 7. Connecting piece; 71. Inner copper layer; 72. Outer aluminum layer. Detailed Implementation

[0029] To make the objectives, features, and advantages of this utility model / invention more apparent and understandable, the technical solutions of this utility model / invention will be clearly and completely described below with reference to the accompanying drawings of the specific embodiments. Obviously, the embodiments described below are only some embodiments of this utility model / invention, and not all embodiments. Based on the embodiments in this patent, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this patent.

[0030] Example 1

[0031] like Figure 1-4 As shown, a semiconductor packaging structure includes a lower DBC connecting copper layer 1, a DBC insulating ceramic layer 2 fixedly connected to the top of the lower DBC connecting copper layer 1, and upper DBC circuit copper layers 3 fixedly connected to both sides of the top of the upper DBC circuit copper layer 2. A connection layer 4 is fixedly connected to the top of one of the upper DBC circuit copper layers 3, a chip 5 is fixedly connected to the top of the connection layer 4, a chip electrode 6 is fixedly connected to the top of the chip 5, a connection piece 7 is fixedly connected to the top of the chip electrode 6, and the other end of the connection piece 7 is fixedly connected to the top of the other upper DBC circuit copper layer 3.

[0032] The outer aluminum layer 72 achieves good bonding conditions with the chip 5, which has a common surface metal layer of aluminum. The connection is achieved through ultrasonic welding or ultrasonic bonding. The inner copper layer 71 provides excellent mechanical properties, heat dissipation, reliability and current carrying capacity. Currently, most surface metal layers of the existing chip 5 can achieve good bonding with aluminum. During plasma cleaning, the main cleaning parameters are: RF plasma argon-hydrogen (95% Ar2, 5% H2) cleaning, cleaning power 500W, cleaning time 120S.

[0033] The connecting piece 7 includes an inner copper layer 71, and the surface of the inner copper layer 71 is covered with an outer aluminum layer 72.

[0034] The inner copper layer 71 ensures good conductivity and can transmit electrical signals efficiently; the outer aluminum layer 72 has good oxidation resistance and bonding properties, which is beneficial for connecting with other components, while also reducing the weight of the connector 7 to a certain extent and improving the overall performance.

[0035] The connecting piece 7 is connected to the chip electrode 6 and the copper layer 3 of the upper circuit of DBC by ultrasonic welding or bonding.

[0036] The connection is achieved by ultrasonic welding or bonding. This method can form a strong connection without introducing too many impurities, ensuring the stability of signal transmission. The process is relatively simple and easy to operate.

[0037] The shape of the connecting piece 7 can be customized according to the copper layer 3 of the upper circuit of different DBCs.

[0038] The shape of the connector 7 can be customized according to the copper layer 3 of different DBC upper circuits, which makes the package structure better adaptable to various complex circuit layout requirements, improves space utilization, and enhances the integration and applicability of the entire semiconductor device.

[0039] Example 2

[0040] The top metal layer on the surface of the chip electrode 6 can be any metal that can be bonded to aluminum. After the chip 5 is connected to the copper layer 3 of the upper circuit of the DBC, it needs to be plasma cleaned. The connecting piece 7 is positioned to the chip electrode 6 and the copper layer 3 of the upper circuit of the DBC using a customized tooling. The connecting piece 7 is connected to the copper layer 3 of the upper circuit of the DBC by its own body or through the inner copper layer 71. The lower connecting copper layer 1 of the DBC, the insulating ceramic layer 2 of the DBC and the copper layer 3 of the upper circuit of the DBC are fixedly connected by a bonding process. The connecting layer 4 is formed by brazing or silver sintering.

[0041] The top metal layer on the surface of chip electrode 6 can be any metal that can bond with aluminum, which greatly broadens the selection range of chip 5, allowing different types of chips 5 to be well adapted to this package structure and improving the versatility of the package structure. Plasma cleaning can remove impurities, oxides, etc. from the connection surface, improving the reliability and stability of the connection and ensuring the electrical connection quality between chip 5 and the copper layer 3 of the upper circuit of DBC. The connecting piece 7 is positioned with chip electrode 6 and copper layer 3 of upper circuit of DBC using customized tooling. This positioning method can ensure the accuracy of the position of the connecting piece 7 during the connection process and improve production efficiency. The high efficiency and product consistency reduce connection problems caused by positioning deviations. The diverse connection methods provide more choices for actual production and application, and can be flexibly adjusted according to specific needs, improving the application flexibility of the packaging structure. The bonding process enables a tight bond between the layers, ensuring the stability and reliability of the entire DBC structure. It is beneficial for the transmission of electrical signals and the dissipation of heat. The connection is fixed by soldering or silver sintering. Both connection processes can form a strong physical and electrical connection between the chip 5 and the copper layer 3 of the upper circuit of the DBC, ensuring the stability of the chip 5 during operation and effectively transmitting electrical signals and heat.

[0042] The working principle of this utility model is as follows: In this semiconductor packaging structure, the electrical signal generated by the chip 5 during operation is transmitted to the connecting piece 7 through the chip electrode 6. The connecting piece 7 acts as a bridge for signal transmission, transmitting the electrical signal to the upper copper layer 3 of the DBC circuit, and then to the external circuit through the lower copper layer 1 of the DBC, thus completing the signal output. At the same time, the power signal input from the external circuit is also transmitted to the chip 5 through the opposite path, providing power for the chip 5 to operate. In this process, the DBC insulating ceramic layer 2 effectively isolates copper layers with different potentials, preventing current leakage and ensuring the accuracy and stability of signal transmission. The upper and lower copper layers of the DBC, with their good conductivity, ensure efficient transmission of electrical signals. The reliable connection between the chip 5 and the upper copper layer 3 of the DBC circuit, as well as between the connecting piece 7 and the chip electrode 6 and the upper copper layer 3 of the DBC circuit, ensures the stable operation of the entire electrical connection path, meeting the working requirements of the semiconductor device.

[0043] The above description of the disclosed embodiments enables those skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A semiconductor packaging structure, comprising a lower DBC interconnect copper layer (1), characterized in that: The top of the lower DBC connecting copper layer (1) is fixedly connected to a DBC insulating ceramic layer (2). Both sides of the top of the DBC insulating ceramic layer (2) are fixedly connected to upper DBC circuit copper layers (3). The top of one side of the upper DBC circuit copper layer (3) is fixedly connected to a connecting layer (4). The top of the connecting layer (4) is fixedly connected to a chip (5). The top of the chip (5) is fixedly connected to a chip electrode (6). The top of the chip electrode (6) is fixedly connected to a connecting piece (7). The other end of the connecting piece (7) is fixedly connected to the top of the other upper DBC circuit copper layer (3).

2. The semiconductor packaging structure according to claim 1, characterized in that: The connecting piece (7) includes an inner copper layer (71), and the surface of the inner copper layer (71) is covered with an outer aluminum layer (72).

3. A semiconductor packaging structure according to claim 1, characterized in that: The connecting piece (7) is connected to the chip electrode (6) and the copper layer (3) of the upper circuit of DBC by ultrasonic welding or bonding.

4. A semiconductor packaging structure according to claim 1, characterized in that: The shape of the connecting piece (7) can be customized according to the copper layer (3) of the upper circuit of different DBC.

5. A semiconductor packaging structure according to claim 1, characterized in that: The top metal layer on the surface of the chip electrode (6) can be any metal that can be bonded to aluminum.

6. A semiconductor packaging structure according to claim 1, characterized in that: After the chip (5) is connected to the copper layer (3) of the upper circuit of DBC, it needs to be plasma cleaned.

7. A semiconductor packaging structure according to claim 1, characterized in that: The connecting piece (7) is positioned with the chip electrode (6) and the copper layer (3) of the upper circuit of DBC by a customized tooling.

8. A semiconductor packaging structure according to claim 2, characterized in that: The connecting piece (7) is connected to the upper circuit copper layer (3) of the DBC by its body or by the inner copper layer (71).

9. A semiconductor packaging structure according to claim 1, characterized in that: The lower DBC connecting copper layer (1), the DBC insulating ceramic layer (2), and the upper DBC circuit copper layer (3) are fixedly connected by a bonding process.

10. A semiconductor packaging structure according to claim 1, characterized in that: The connecting layer (4) is formed by brazing or silver sintering.

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