Electronic equipment power supply circuit based on USB interface

Abstract

The utility model relates to the technical field of electronic equipment power supply, in particular to an electronic equipment power supply circuit based on a USB (Universal Serial Bus) interface, which comprises a power supply connecting end, a reference power supply connecting end, a voltage comparator, a reference voltage generator, a trigger, a power switch and a voltage output end, wherein the power supply connecting end is respectively connected with the voltage comparator, the reference voltage generator and the power supply switch; the voltage comparator is connected with the trigger through the first switch, the trigger is connected with the power switch through the second switch and the third switch in sequence, and the power switch is further connected with the voltage output end. The reference power supply connecting end is arranged on a line between the voltage comparator and the reference voltage generator, and the reference power supply connecting end is further connected with the first switch, the trigger and the second switch. Through the logic control of the voltage comparator and the trigger, the circuit is ensured to stably supply power to equipment in a proper current mode, and the adverse effect caused by the oscillation of the input voltage is avoided.

Description

Technical Field

[0001] This utility model relates to the field of power supply technology for electronic devices, and in particular to a power supply circuit for electronic devices based on a USB interface. Background Technology

[0002] In the field of electronic device power supply circuits, stable and reliable voltage output is crucial for ensuring the normal operation of electronic devices. As electronic devices become increasingly complex, especially in scenarios requiring high stability, such as powering precision instruments and charging mobile devices, the input voltage gradually increases when a small current is supplied. This necessitates the system using additional software to readjust to a higher current output state. Such voltage fluctuations during charging can severely impact the device, potentially leading to damage or data loss. Therefore, the market demands a circuit capable of stabilizing current output and maintaining stable device voltage under complex operating conditions. Utility Model Content

[0003] This invention provides a power supply circuit for electronic devices based on a USB interface, which solves the defect of unstable power supply caused by continuous oscillation of input voltage in the power supply circuit in the prior art, and realizes that the circuit provides stable power supply to electronic devices in a suitable current mode.

[0004] This utility model provides a power supply circuit for an electronic device based on a USB interface, including: a power connection terminal, a reference power connection terminal, a voltage comparator, a reference voltage generator, a trigger, a power switch, and a voltage output terminal;

[0005] The power supply connection terminal is connected to a voltage comparator, a reference voltage generator, and a power switch, respectively. The voltage comparator is connected to a trigger via a first switch, and the trigger is connected to the power switch via a second switch and a third switch in sequence. The power switch is also connected to the voltage output terminal. The reference power supply connection terminal is located on the line between the voltage comparator and the reference voltage generator, and is also connected to the first switch, the trigger, and the second switch, respectively.

[0006] According to the present invention, a power supply circuit for an electronic device based on a USB interface is provided. The voltage comparator has 5 pins. Its V+ pin is connected to the power supply terminal, its IN- pin is connected to the power supply terminal through a first resistor, its IN+ pin is connected to the reference voltage generator through the reference power supply terminal, its V- pin is grounded, and its OUT pin is connected to the first switch.

[0007] According to the present invention, a power supply circuit for an electronic device based on a USB interface is provided. The reference voltage generator has 5 pins. Its IN pin is connected to the power supply terminal, its EN pin is connected to the power supply terminal through a tenth resistor, its EP pin and GND pin are grounded respectively, and its OUT pin is connected to the reference power supply terminal.

[0008] According to the present invention, a power supply circuit for an electronic device based on a USB interface is provided. The first switch includes a first NMOS transistor. The gate of the first NMOS transistor is connected to the OUT pin of a voltage comparator through a third resistor. The source of the first NMOS transistor is grounded, and the drain of the first NMOS transistor is connected to a flip-flop.

[0009] According to the present invention, a power supply circuit for an electronic device based on a USB interface is provided. The trigger has 6 pins. Its CLK pin is connected to the drain of the first NMOS transistor through the fifth resistor, the GND pin is grounded, the D pin is connected to the reference power supply terminal through the sixth resistor, the CLR pin is connected to the reference power supply terminal through the ninth resistor, the VCC pin is connected to the reference power supply terminal, and the Q pin is connected to the second switch.

[0010] According to the present invention, a power supply circuit for an electronic device based on a USB interface is provided. The second switch includes a second NMOS transistor. The gate of the second NMOS transistor is connected to the Q pin of a flip-flop through a fifteenth resistor. The source of the second NMOS transistor is grounded, and the drain of the second NMOS transistor is connected to a third switch.

[0011] According to the present invention, a power supply circuit for an electronic device based on a USB interface is provided, wherein the third switch includes a third NMOS transistor, the gate (G) of the third NMOS transistor is connected to the drain (D) of the second NMOS transistor, the source (S) of the third NMOS transistor is grounded, and the drain (D) of the third NMOS transistor is connected to the power switch.

[0012] According to the present invention, a power supply circuit for an electronic device based on a USB interface is provided. The power switch has 6 pins. Its IN pin is connected to the power connection terminal, the FAULT pin and EN pin are both connected to the power connection terminal through the eleventh resistor, the GND pin is grounded, the ILM pin is connected to the drain of the third NMOS transistor through the thirteenth resistor, the ILM pin is also grounded through the twelfth resistor, and the OUT pin of the power switch is connected to the voltage output terminal.

[0013] The USB interface-based electronic device power supply circuit provided by this utility model generates a threshold voltage through a reference voltage generator and uses a voltage comparator to compare the input voltage with the threshold voltage at the start of power supply. When the voltage comparator detects that the input voltage is greater than the threshold voltage, it indicates that the charging interface current load capacity of the electronic device is large, so the trigger cannot be triggered and the voltage output terminal provides stable power to the electronic device with a large current. When the voltage comparator detects that the input voltage is less than the threshold voltage, it indicates that the charging interface current load capacity of the electronic device is small, the circuit controls the trigger to be triggered (generating a falling edge), and controls the voltage output terminal to switch to a small current to power the electronic device. Since the power supply interface has not changed, its input power remains unchanged. The continuous small current supply will cause the input voltage to gradually increase until the voltage comparator detects that the input voltage is greater than the threshold voltage again, which will force a change in the output state of the voltage comparator. However, since the trigger has been triggered, its latching function will still maintain the small current supply mode of the voltage output terminal. This ensures that when the input voltage is greater than the threshold voltage, the voltage output terminal provides a stable power supply to the electronic device with a large current; when the input voltage is less than the threshold voltage, the voltage output terminal provides a stable power supply to the electronic device with a small current, and effectively avoids unstable charging state caused by continuous fluctuations in the input voltage. Attached Figure Description

[0014] To more clearly illustrate the technical solutions in this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this utility model. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0015] Figure 1 This is an electrical block diagram of the power supply circuit for an electronic device based on a USB interface provided by this utility model;

[0016] Figure 2 This is a circuit diagram of a power supply circuit for an electronic device based on a USB interface provided by this utility model;

[0017] Figure 3 This is a diagram showing the output states of the voltage comparator's OUT pin, the flip-flop's CLK pin, the flip-flop's Q pin, and the power switch's OUT pin when the input voltage exceeds the threshold voltage.

[0018] Figure 4 This is the output state diagram of the OUT pin of the voltage comparator, the CLK pin of the flip-flop, the Q pin of the flip-flop, and the OUT pin of the power switch when the input voltage is less than the threshold voltage. Detailed Implementation

[0019] To make the objectives, technical solutions, and advantages of this utility model clearer, the technical solutions of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this utility model.

[0020] The following is combined Figures 1-4 This invention describes a power supply circuit for an electronic device based on a USB interface, comprising: a power supply connection terminal, a reference power supply connection terminal, a voltage comparator U1, a reference voltage generator U3, a trigger U2, a power switch U4, and a voltage output terminal;

[0021] The power supply connection is connected to the voltage comparator U1, the reference voltage generator U3, and the power switch U4 respectively. The voltage comparator U1 is connected to the trigger U2 through the first switch. The trigger U2 is connected to the power switch U4 through the second switch and the third switch in sequence. The power switch U4 is also connected to the voltage output terminal. The reference power supply connection is set on the line between the voltage comparator U1 and the reference voltage generator U3. The reference power supply connection is also connected to the first switch, the trigger U2, and the second switch respectively.

[0022] The voltage comparator U1 is model TLV3511, which has 5 pins: V+, V-, IN+, IN-, and OUT. The V+ pin of the voltage comparator U1 is connected to the power supply terminal, the IN- pin is connected to the power supply terminal through the first resistor R1, the IN+ pin is connected to the reference voltage generator U3 through the reference power supply terminal, the V- pin is grounded, and the OUT pin of the voltage comparator U1 is connected to the first switch.

[0023] Furthermore, the IN- pin of voltage comparator U1 is also grounded through the second resistor R2, and the V+ pin of voltage comparator U1 is also grounded through the first capacitor C1 on the connection line between the power supply and the power supply connection terminal.

[0024] The reference voltage generator U3 is model SGM2036, which has 5 pins: IN, OUT, EN, EP, and GND. The IN pin of the reference voltage generator U3 is connected to the power supply terminal, the EN pin is connected to the power supply terminal through the tenth resistor R10, the EP pin and GND pin are grounded, and the OUT pin of the reference voltage generator U3 is connected to the reference power supply terminal.

[0025] Furthermore, the IN pin of the reference voltage generator U3 is grounded through a third capacitor C3 on the connection line between the IN pin and the power supply terminal, the EN pin is grounded through a fourth capacitor C4, and the OUT pin is grounded through a fifth capacitor C5 on the connection line between the OUT pin and the reference power supply terminal.

[0026] The first switch includes a first NMOS transistor Q1. The gate of the first NMOS transistor Q1 is connected to the OUT pin of the voltage comparator U1 through the third resistor R3. The source of the first NMOS transistor Q1 is grounded, and the drain of the first NMOS transistor Q1 is connected to the flip-flop U2.

[0027] Furthermore, the drain of the first NMOS transistor Q1 is also connected to the reference power supply terminal through the fourth resistor R4.

[0028] In this embodiment, the input voltage enters the circuit through the power connection terminal and undergoes filtering and voltage division by the first resistor R1, the second resistor R2, and the first capacitor C1 before flowing to the IN- pin of the voltage comparator U1. Simultaneously, the input voltage is also regenerated into a threshold voltage (also called a reference voltage) by the reference voltage generator U3, flowing to the IN+ pin of the voltage comparator U1. It is worth noting that the power connection terminal is a USB interface structure, used to connect to AC power or other power supply / energy storage devices that can provide the input voltage; the reference power connection terminal is merely a connection port, facilitating connection of the reference power supply to the first switch, trigger U2, and the second switch.

[0029] Voltage comparator U1 controls the operating state of the first NMOS transistor Q1 by comparing the voltage values ​​of its IN- pin (i.e., input voltage) and IN+ pin (i.e., threshold voltage). Specifically: when the voltage value of the IN- pin of voltage comparator U1 is greater than the voltage value of the IN+ pin, the OUT pin of voltage comparator U1 is in a low-level state, and no pressure difference can be generated between the gate and source of the first NMOS transistor Q1. Therefore, the drain and source of the first NMOS transistor Q1 are not conducting, so the first NMOS transistor Q1 is in an off state. When the voltage value of the IN- pin of voltage comparator U1 is less than the voltage value of the IN+ pin, the OUT pin of voltage comparator U1 is in a high-level state, and a pressure difference is formed between the gate and source of the first NMOS transistor Q1. Therefore, the drain and source of the first NMOS transistor Q1 are conducting, so the first NMOS transistor Q1 is in a conducting state.

[0030] Flip-flop U2 is a single-channel D-type flip-flop, model number SN74LVC1G175DCK. Flip-flop U2 has 6 pins: CLK, CLR, VCC, GND, D, and Q. The CLK pin of flip-flop U2 is connected to the drain of the first NMOS transistor Q1 through the fifth resistor R5. The GND pin is grounded. The D pin is connected to the reference power supply through the sixth resistor R6. The CLR pin is connected to the reference power supply through the ninth resistor R9. The VCC pin is connected to the reference power supply. The Q pin is connected to the second switch.

[0031] Furthermore, the VCC pin of the trigger U2 is also grounded through the second capacitor C2, the CLK pin of the trigger U2 is also grounded through the seventh resistor R7 on the connection line between the fifth resistor R5, and the D pin of the trigger U2 is also grounded through the eighth resistor R8 on the connection line between the sixth resistor R6.

[0032] The second switch includes a second NMOS transistor Q2. The gate of the second NMOS transistor Q2 is connected to the Q pin of the flip-flop U2 through the fifteenth resistor R15. The source of the second NMOS transistor Q2 is grounded, and the drain of the second NMOS transistor Q2 is connected to the third switch.

[0033] Furthermore, the drain of the second NMOS transistor Q2 is also connected to the reference power supply terminal through the fourteenth resistor R14.

[0034] The third switch includes a third NMOS transistor Q3. The gate (G) of the third NMOS transistor Q3 is connected to the drain (D) of the second NMOS transistor Q2. The source (S) of the third NMOS transistor Q3 is grounded. The drain (D) of the third NMOS transistor Q3 is connected to the power switch.

[0035] The power switch U4 is model TPS2553-Q1, which has 6 pins: IN, FAULT, EN, OUT, ILM, and GND. The IN pin of the power switch U4 is connected to the power supply terminal. The FAULT and EN pins are both connected to the power supply terminal through the eleventh resistor R11. The GND pin is grounded. The ILM pin is connected to the drain of the third NMOS transistor Q3 through the thirteenth resistor R13. The ILM pin is also grounded through the twelfth resistor R12. The OUT pin of the power switch U4 is connected to the voltage output terminal.

[0036] Furthermore, the connection line between the IN pin of the power switch U4 and the power connection terminal is also grounded through the sixth capacitor C6, and the EN pin of the power switch U4 is also grounded through the seventh capacitor C7.

[0037] In this embodiment, the trigger U2 is activated on the falling edge of its CLK pin. Specifically, when the CLK pin of the trigger U2 is high, the trigger U2 is inactive, and its Q pin is low. At this time, no pressure difference can be formed between the gate (G) and source (S) of the second NMOS transistor Q2, and the drain (D) and source (S) of the second NMOS transistor Q2 are not conducting. The second NMOS transistor Q2 is in an off state. Therefore, the drain of the second NMOS transistor Q2 (i.e., the gate of the third NMOS transistor Q3) is high, and a pressure difference is formed between the gate (G) and source of the third NMOS transistor Q3, causing the drain and source of the third NMOS transistor Q3 to conduct. The third NMOS transistor Q3 then conducts. At this time, the resistance connected to the ILM pin of the power switch U4 decreases (i.e., the twelfth resistor R12 and the thirteenth resistor R13 are connected in parallel to provide resistance), thereby controlling the OUT pin of the power switch U4 to charge the electronic device with a large current.

[0038] Similarly, when the CLK pin of trigger U2 is low, trigger U2 is activated, and its Q pin becomes high. At this time, a pressure difference is formed between the gate and source of the second NMOS transistor Q2, and the drain and source of the second NMOS transistor Q2 are connected. The second NMOS transistor Q2 is in the on state. Therefore, the drain of the second NMOS transistor Q2 (i.e., the gate of the third NMOS transistor Q3) is grounded, and a pressure difference cannot be formed between the gate and source of the third NMOS transistor Q3, so the drain and source of the third NMOS transistor Q3 are not connected, and the third NMOS transistor Q3 is turned off. At this time, the resistance connected to the ILM pin of the power switch U4 increases (i.e., the twelfth resistor R12 provides resistance alone), thereby controlling the OUT pin of the power switch U4 to charge the electronic device with a small current.

[0039] In this embodiment, on the one hand, such as Figure 3 As shown, when the input voltage is greater than the threshold voltage (i.e., the voltage at the IN- pin of the voltage comparator is greater than the voltage at the IN+ pin of the voltage comparator), the OUT pin of the voltage comparator U1 is in a low-level state, and the first NMOS transistor Q1 is turned off, making the CLK pin of the flip-flop U2 in a high-level state (i.e., the initial state). At this time, the flip-flop U2 is not triggered, so the Q pin of the flip-flop U2 is in a low-level state, making the second NMOS transistor Q2 turn off and the third NMOS transistor Q3 turn on, reducing the resistance value connected to the ILM pin of the power switch U4 (the twelfth resistor R12 and the thirteenth resistor R13 are connected in parallel to provide resistance), thereby controlling the OUT pin of the power switch U4 to stably charge the electronic device with a large current;

[0040] On the other hand, such as Figure 4As shown, when the input voltage is less than the threshold voltage (i.e., the voltage at the IN- pin of voltage comparator U1 is less than the voltage at the IN+ pin of voltage comparator U1), the OUT pin of voltage comparator U1 is in a high-level state. The first NMOS transistor Q1 is thus turned on, causing the CLK pin of flip-flop U2 to change from its initial state (i.e., high-level state) to a low-level state. At this time, flip-flop U2 is triggered (a falling edge appears on the CLK pin of flip-flop U2), so the Q pin of flip-flop U2 becomes high-level, causing the second NMOS transistor Q2 to turn on and the third NMOS transistor Q3 to turn off. This increases the resistance value connected to the ILM pin of power switch U4 (the twelfth resistor R12 provides the resistance value separately), thereby controlling the OUT pin of power switch U4 to charge the electronic device with a small current. It is worth noting... The key point is that when the circuit continuously supplies power to the electronic device with a small current, since the power supply interface does not change, the input power remains constant. The small current supply mode causes the input voltage to gradually increase until it exceeds the threshold voltage (at this time, the voltage of the IN- pin of voltage comparator U1 is greater than the voltage of the IN+ pin of voltage comparator). The OUT pin of voltage comparator U1 changes from a high level to a low level, causing the first NMOS transistor Q1 to turn off. At this time, the CLK pin of flip-flop U2 becomes high again. However, due to the latching effect of flip-flop U2, it does not trigger a falling edge. Therefore, the Q pin of flip-flop U2 remains high and controls the OUT pin of power switch U4 to continue supplying power to the electronic device with a small current.

[0041] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this utility model, and not to limit it. Although this utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this utility model.

Claims

1. A power supply circuit for an electronic device based on a USB interface, characterized in that, include: Power supply connection terminal, reference power supply connection terminal, voltage comparator, reference voltage generator, trigger, power switch, and voltage output terminal; The power supply connection terminal is connected to a voltage comparator, a reference voltage generator, and a power switch, respectively. The voltage comparator is connected to a trigger via a first switch, and the trigger is connected to the power switch via a second switch and a third switch in sequence. The power switch is also connected to the voltage output terminal. The reference power supply connection terminal is located on the line between the voltage comparator and the reference voltage generator, and is also connected to the first switch, the trigger, and the second switch, respectively.

2. The power supply circuit for an electronic device based on a USB interface according to claim 1, characterized in that, The voltage comparator has 5 pins. Its V+ pin is connected to the power supply terminal, its IN- pin is connected to the power supply terminal through the first resistor, its IN+ pin is connected to the reference voltage generator through the reference power supply terminal, its V- pin is grounded, and its OUT pin is connected to the first switch.

3. The power supply circuit for an electronic device based on a USB interface according to claim 1, characterized in that, The reference voltage generator has 5 pins. Its IN pin is connected to the power supply terminal, the EN pin is connected to the power supply terminal through the tenth resistor, the EP pin and the GND pin are grounded respectively, and the OUT pin of the reference voltage generator is connected to the reference power supply terminal.

4. The power supply circuit for an electronic device based on a USB interface according to claim 2, characterized in that, The first switch includes a first NMOS transistor, the gate of the first NMOS transistor is connected to the OUT pin of the voltage comparator through a third resistor, the source of the first NMOS transistor is grounded, and the drain of the first NMOS transistor is connected to a flip-flop.

5. The power supply circuit for an electronic device based on a USB interface according to claim 1, characterized in that, The trigger has 6 pins. Its CLK pin is connected to the drain of the first NMOS transistor through the fifth resistor, the GND pin is grounded, the D pin is connected to the reference power supply terminal through the sixth resistor, the CLR pin is connected to the reference power supply terminal through the ninth resistor, the VCC pin is connected to the reference power supply terminal, and the Q pin is connected to the second switch.

6. The power supply circuit for an electronic device based on a USB interface according to claim 5, characterized in that, The second switch includes a second NMOS transistor, the gate of which is connected to the Q pin of a flip-flop through a fifteenth resistor, the source of which is grounded, and the drain of which is connected to a third switch.

7. The power supply circuit for an electronic device based on a USB interface according to claim 6, characterized in that, The third switch includes a third NMOS transistor, the gate (G) of which is connected to the drain (D) of the second NMOS transistor, the source (S) of which is grounded, and the drain of which is connected to the power switch.

8. The power supply circuit for an electronic device based on a USB interface according to claim 1, characterized in that, The power switch has 6 pins. Its IN pin is connected to the power supply terminal. The FAULT pin and EN pin are both connected to the power supply terminal through the eleventh resistor. The GND pin is grounded. The ILM pin is connected to the drain of the third NMOS transistor through the thirteenth resistor. The ILM pin is also grounded through the twelfth resistor. The OUT pin of the power switch is connected to the voltage output terminal.

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