Display panel and display device

Abstract

The application belongs to the field of display, and particularly relates to a display panel and a display device, wherein the display panel comprises an array substrate and a counter substrate which are arranged in a cell, the counter substrate comprises a first substrate and a first conductive line, the array substrate comprises a second substrate, a ground line and a second conductive line, the second conductive line is connected with the ground line, and the counter substrate or the array substrate further comprises a raised portion, the raised portion is formed on a side of the first conductive line away from the second conductive line or a side of the second conductive line away from the first conductive line, the distance between the first conductive line and the second conductive line in a partial area provided with the raised portion is reduced or the first conductive line and the second conductive line are in contact, and the raised portion comprises at least one color resistance. In the use process of the display panel, when high-voltage static electricity is generated on the counter substrate, the static electricity is released to the ground end of the main board through the first conductive line, the second conductive line, the ground line and a flexible circuit board, so that the in-plane device, the circuit and the driving chip can be prevented from being injured by the high-voltage static electricity.

Description

Technical Field

[0001] This application belongs to the field of display technology, specifically relating to a display panel and a display device. Background Technology

[0002] During production and use, liquid crystal display devices are frequently subjected to external electrostatic discharge (ESD) impacts. To prevent ESD from damaging in-plane components, circuits, and driver chips, liquid crystal display devices are typically required to meet ESD tests of 15kV or higher.

[0003] In existing liquid crystal display devices, when assembling the whole unit, a conductive cloth is attached around the display panel to allow static electricity to be released to the outer shell of the liquid crystal display device through the conductive cloth. The outer shell is then grounded, and the electrostatic discharge is released to the ground through the conductive cloth and the outer shell, thereby protecting the in-plane components, circuits, and driver chips.

[0004] Users have increasingly higher requirements for the appearance of LCD displays, and the bezels of LCD displays are becoming narrower and narrower, with more and more products having ultra-narrow bezels or even bezel-less designs. Applying conductive cloth around the display panel will create a relatively wide bezel, so the solution of using conductive cloth to discharge static electricity to the outer casing is difficult to apply to narrow-bezel LCD displays. Utility Model Content

[0005] The purpose of this application is to provide a display panel and display device to solve the problem of electrostatic discharge damaging in-plane components, circuits and driver chips.

[0006] To achieve the above objectives, this application provides a display panel including an array substrate and a counter substrate disposed opposite each other. The counter substrate includes a first substrate and a first conductive line, wherein the first conductive line is formed on one side of the first substrate.

[0007] The array substrate includes a second substrate, a ground line, and a second conductive line. Both the ground line and the second conductive line are formed on one side of the second substrate, and the second conductive line is connected to the ground line.

[0008] The array substrate or the opposing substrate further includes a raised portion, which is formed on the side of the first conductive line away from the second conductive line or on the side of the second conductive line away from the first conductive line, so that in a portion of the area where the raised portion is provided, the distance between the first conductive line and the second conductive line is reduced or they are in contact. The raised portion includes at least one color resist. The display panel includes a display area and a non-display area surrounding the display area, and the raised portion is located in the non-display area.

[0009] Optionally, the raised portion includes multiple color resists of different colors, which are stacked together.

[0010] Optionally, the multiple color resists of different colors include a red color resist, a green color resist, and a blue color resist, wherein the orthographic projection of the green color resist on the first substrate is located within the orthographic projection of the red color resist on the first substrate, and the orthographic projection of the blue color resist on the first substrate is located within the orthographic projection of the green color resist on the first substrate.

[0011] Optionally, in the area where the raised portion is provided, the first conductive wire is in contact with the second conductive wire.

[0012] Optionally, the opposing substrate includes a black matrix formed on one side of the first substrate, and the raised portion is disposed on the side of the black matrix away from the first substrate.

[0013] Optionally, the array substrate includes a gate insulating layer and a passivation layer. The gate insulating layer is formed on one side of the second substrate, and the passivation layer is formed on the side of the gate insulating layer away from the second substrate. The second conductive line and the raised portion are both disposed on the side of the passivation layer away from the second substrate.

[0014] Optionally, the array substrate further includes a gate and a source / drain electrode. The gate is formed on the side of the gate insulating layer near the second substrate. The source / drain electrode is formed between the gate insulating layer and the passivation layer. The ground line is disposed in the same layer as the gate. The first conductive line passes through the gate insulating layer and the passivation layer and is connected to the ground line. Alternatively, the ground line is disposed in the same layer as the source / drain electrode. The first conductive line passes through the passivation layer and is connected to the ground line.

[0015] Optionally, both the first conductive line and the second conductive line are arranged to surround or partially surround the display area.

[0016] Optionally, a plurality of the raised portions are spaced apart along the extension direction of the first conductive line.

[0017] This application also provides a display device, including:

[0018] The display panel;

[0019] The motherboard is connected to the display panel.

[0020] The display panel and display device disclosed in this application have the following beneficial effects:

[0021] In this application, the display panel includes an array substrate and a counter substrate disposed opposite each other. The counter substrate includes a first substrate and a first conductive line, the first conductive line being formed on one side of the first substrate. The array substrate includes a second substrate, a ground line, and a second conductive line, both formed on one side of the second substrate. The second conductive line is connected to the ground line. The counter substrate or the array substrate also includes a raised portion, formed on the side of the first conductive line away from the second conductive line or on the side of the second conductive line away from the first conductive line. This reduces the distance between the first conductive line and the second conductive line in the area where the raised portion is provided, or allows them to come into contact. The raised portion includes at least one color resistor. During the use of the display panel, when the counter substrate generates high-voltage static electricity, the static electricity is released to the ground terminal of the main board through the first conductive line, the second conductive line, the ground line, and the flexible circuit board, preventing in-plane components, circuits, and driver chips from being damaged by high-voltage static electricity.

[0022] Other features and advantages of this application will become apparent from the following detailed description, or may be learned in part from practice of this application.

[0023] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0024] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application. It is obvious that the drawings described below are merely some embodiments of this application, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.

[0025] Figure 1 This is a schematic diagram of the display panel structure in Embodiment 1 of this application.

[0026] Figure 2 This is a schematic diagram showing the connection between the grounding wire of the array substrate and the motherboard in Embodiment 1 of this application.

[0027] Figure 3 This is a schematic diagram showing the spacing of conductive lines between the opposing substrate and the array substrate in Embodiment 1 of this application.

[0028] Figure 4 This is a schematic diagram of the display panel structure in Embodiment 2 of this application.

[0029] Figure 5 This is a schematic diagram of the display device in Embodiment 3 of this application.

[0030] Explanation of reference numerals in the attached figures:

[0031] 100, Opposing substrate; 110, First substrate; 120, Elevated portion; 121, Red resist; 122, Green resist; 123, Blue resist; 130, First conductive line; 140, Black matrix;

[0032] 200, Array substrate; 150, Second conductive line; 160, Ground line; 170, Gate insulating layer; 180, Passivation layer; 181, Via; 190, Second substrate;

[0033] 300, frame adhesive;

[0034] 10. Display panel; 11. Display area; 12. Non-display area; 20. Main board; 30. Flexible circuit board. Detailed Implementation

[0035] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided to make this application more comprehensive and complete, and to fully convey the concept of the exemplary embodiments to those skilled in the art.

[0036] Furthermore, the described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. Numerous specific details are provided in the following description to give a thorough understanding of embodiments of this application. However, those skilled in the art will recognize that the technical solutions of this application can be practiced without one or more of the specific details, or other methods, components, apparatuses, steps, etc., can be employed. In other instances, well-known methods, apparatuses, implementations, or operations are not shown or described in detail to avoid obscuring various aspects of this application.

[0037] The present application will now be described in further detail with reference to the accompanying drawings and specific embodiments. It should be noted that the technical features involved in the various embodiments described below can be combined with each other as long as they do not conflict with each other. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain the present application, and should not be construed as limiting the present application.

[0038] Example 1

[0039] See Figures 1 to 3As shown, in this embodiment, the display panel 10 includes an array substrate 200 and a counter substrate 100 disposed opposite each other. The counter substrate 100 includes a first substrate 110 and a first conductive line 130, with the first conductive line 130 forming on one side of the first substrate 110. The array substrate 200 includes a second substrate 190, a ground line 160, and a second conductive line 150. Both the ground line 160 and the second conductive line 150 are formed on one side of the second substrate 190. The second conductive line 150 is connected to the ground line 160, and the ground line 160 is connected to the ground terminal on the main board 20 through the flexible circuit board 30.

[0040] The opposing substrate 100 or the array substrate 200 also includes a raised portion 120. When the opposing substrate 100 includes the raised portion 120, the raised portion 120 is formed on the side of the first conductive line 130 away from the second conductive line 150; when the array substrate 200 includes the raised portion 120, the raised portion 120 is formed on the side of the second conductive line 150 away from the first conductive line 130. The raised portion 120 can raise a portion of the first conductive line 130 or the second conductive line 150, thereby reducing the distance between the first conductive line 130 and the second conductive line 150 or bringing them into contact in the area where the raised portion 120 is provided. This embodiment is described using the example of the raised portion 120 being provided on the opposing substrate 100 to raise a portion of the first conductive line 130.

[0041] The raised portion 120 includes at least one color resist, for example, a red color resist 121, a green color resist 122, or a blue color resist 123. The display panel 10 includes a display area 11 and a non-display area 12 surrounding the display area 11, with the raised portion 120 located in the non-display area 12. It should be understood that the raised portion 120 is used to raise a portion of the first conductive line 130 or the second conductive line 150, both of which are partially or entirely located in the non-display area 12.

[0042] During the use of the display panel 10, when high-voltage static electricity is generated on the opposing substrate 100, the static electricity will be released to the grounding terminal of the main board 20 through the first conductive line 130, the second conductive line 150, the grounding line 160, and the flexible circuit board 30. This prevents the static electricity from passing through the in-plane components, circuits, and driver chips, thus avoiding damage to these components, circuits, and driver chips. The display panel 10 does not rely on conductive cloth to release static electricity to the outer casing; therefore, the display panel 10 in this application can be used in narrow-bezel and bezel-less display devices.

[0043] In this embodiment, the display panel 10 includes an array substrate 200 and a counter substrate 100 disposed opposite each other. The counter substrate 100 includes a first substrate 110 and a first conductive line 130. The first conductive line 130 is formed on one side of the first substrate 110. The array substrate 200 includes a second substrate 190, a ground line 160 and a second conductive line 150. The ground line 160 and the second conductive line 150 are both formed on one side of the second substrate 190. The second conductive line 150 is connected to the ground line 160. The counter substrate 100 or the array substrate 200 also includes a raised portion 120. The raised portion 120 is formed on the side of the first conductive line 130 away from the second conductive line 150 or on the side of the second conductive line 150 away from the first conductive line 130, so that in a certain area where the raised portion 120 is disposed, the distance between the first conductive line 130 and the second conductive line 150 is reduced or they come into contact. The raised portion 120 includes at least one color resist. During the use of the display panel 10, when the opposing substrate 100 generates high voltage static electricity, the static electricity is released to the grounding terminal of the main board 20 through the first conductive line 130, the second conductive line 150, the grounding line 160, and the flexible circuit board 30, which can prevent the in-plane components, lines, and driver chips from being damaged by high voltage static electricity.

[0044] In some embodiments, the raised portion 120 includes a plurality of color resists of different colors, which are stacked together. For example, the raised portion 120 includes any two or three of red color resist 121, green color resist 122, and blue color resist 123. The red color resist 121 may be stacked at the bottom, the blue color resist 123 may be stacked at the top, and the green color resist 122 is disposed between the red color resist 121 and the blue color resist 123.

[0045] The raised part 120 includes multiple color resists of different colors. The multiple color resists of different colors are stacked to reduce the gap between the first conductive line 130 and the second conductive line 150 or make them contact each other, thereby ensuring that static electricity is released to the ground terminal of the main board 20 along the first conductive line 130, the second conductive line 150, the grounding line 160, and the flexible circuit board 30.

[0046] In some embodiments, the orthographic projection of the green color resist 122 on the first substrate 110 lies within the orthographic projection of the red color resist 121 on the first substrate 110, and the orthographic projection of the blue color resist 123 on the first substrate 110 lies within the orthographic projection of the green color resist 122 on the first substrate 110. That is, the size of the color resist stacked on the lower layer can be greater than or equal to the size of the color resist stacked on the upper layer.

[0047] The size of the color resist stacked on the lower layer is larger than that of the color resist stacked on the upper layer, which can improve the stability of the raised part 120 structure.

[0048] In some embodiments, in the area where the raised portion 120 is provided, the first conductive wire 130 is in contact with the second conductive wire 150.

[0049] The first conductive line 130 is in contact with the second conductive line 150, which ensures that static electricity is released along the first conductive line 130, the second conductive line 150, the grounding line 160, and the flexible circuit board 30 to the grounding terminal of the main board 20, reducing the risk of panel damage caused by high voltage electrostatic discharge breaking down the gap between the first conductive line 130 and the second conductive line 150.

[0050] It should be understood that the first conductive line 130 and the second conductive line 150 may not need to be in contact. Even if the raised portion 120 reduces the distance between the first conductive line 130 and the second conductive line 150, creating a gap between them, during the use of the display panel 10, when the substrate 100 generates high-voltage static electricity, the static electricity is more likely to break down the air at the raised portion 120. Therefore, the static electricity will be released to the ground terminal of the main board 20 through the first conductive line 130, the second conductive line 150, the grounding wire 160, and the flexible circuit board 30, preventing damage to the in-plane components, circuits, and driver chip caused by static electricity passing through them.

[0051] In some embodiments, the opposing substrate 100 includes a black matrix 140 formed on one side of the first substrate 110. A raised portion 120 is disposed on the side of the black matrix 140 away from the first substrate 110. The opposing substrate 100 is a color filter substrate, and further includes a color resist layer disposed in the display area 11. The color resist layer includes a red color resist 121, a green color resist 122, and a blue color resist 123, and the black matrix 140 is disposed between any adjacent color resists. During the fabrication of the opposing substrate 100, the red color resist 121, green color resist 122, and blue color resist 123 are formed sequentially while the color resist layer is being fabricated, and the stacking of multiple color resists in the raised portion 120 is also completed.

[0052] The raised portion 120 is disposed on the side of the black matrix 140 away from the first substrate 110, which can increase the height of the raised portion 120. The color resist layer and the raised portion 120 are fabricated simultaneously, which can reduce the manufacturing cost of the opposing substrate 100.

[0053] It should be noted that the raised portion 120 may be disposed on the side of the black matrix 140 away from the first substrate 110, but it is not limited thereto. The black matrix 140 may also be disposed around the raised portion 120, depending on the specific circumstances.

[0054] In some embodiments, the opposing substrate 100 further includes a common electrode, and the first conductive line 130 is disposed in the same layer as the common electrode. Both the common electrode and the first conductive line 130 may be made of indium tin oxide (ITO).

[0055] It should be understood that in this application, "same-layer configuration" refers to a layer structure formed using the same film deposition process to create a specific pattern, and then using the same mask to form a single patterning process. That is, one patterning process corresponds to one mask. Depending on the specific pattern, a single patterning process may include multiple exposure, development, or etching processes. The specific pattern in the formed layer structure can be continuous or discontinuous, and these specific patterns may also be at different heights or have different thicknesses. This simplifies the manufacturing process, saves manufacturing costs, and improves production efficiency.

[0056] In some embodiments, the first conductive line 130 and the second conductive line 150 are both arranged to surround or partially surround the display area 11.

[0057] The first conductive line 130 is arranged around the display area 11. When touching any position around the opposing substrate 100, static electricity is released to the ground terminal of the main board 20 through the first conductive line 130, the second conductive line 150, the grounding line 160, and the flexible circuit board 30.

[0058] In some embodiments, a plurality of raised portions 120 are spaced apart along the extending direction of the first conductive line 130. That is, the first conductive line 130 and the second conductive line 150 achieve multi-point contact at the locations of the plurality of raised portions 120.

[0059] The first conductive line 130 and the second conductive line 150 have multiple points of contact, which can prevent electrostatic discharge from the in-plane devices and circuits to the driver chip, thus avoiding electrostatic damage to the in-plane devices, circuits and driver chip.

[0060] In some embodiments, the array substrate 200 further includes a gate insulating layer 170 and a passivation layer 180. The gate insulating layer 170 is formed on one side of the second substrate 190, and the passivation layer 180 is formed on the side of the gate insulating layer 170 away from the second substrate 190. The second conductive line 150 is disposed on the side of the passivation layer 180 away from the second substrate 190.

[0061] The array substrate 200 also includes a gate and a source / drain electrode. The gate is formed on the side of the gate insulating layer 170 near the second substrate 190, and the source / drain electrode is formed between the gate insulating layer 170 and the passivation layer 180. A ground line 160 is disposed on the same layer as the gate. A via 181 is formed on the gate insulating layer 170 and the passivation layer 180. A first conductive line 130 passes through the via 181, through the gate insulating layer 170 and the passivation layer 180, and connects to the ground line 160. The array substrate 200 includes a bonding region, and the ground line 160 and the bonding region surround the display area 11. The first conductive line 130 surrounds the display area 11 of the array substrate 200, and a second conductive line 150 surrounds the display area 11 of the opposing substrate 100.

[0062] The grounding wire 160 is disposed on the same layer as the gate, which can reduce the manufacturing cost of the array substrate 200 and the display panel 10.

[0063] It should be noted that the ground wire 160 can be disposed on the same layer as the gate, but it is not limited to this. The ground wire 160 can also be disposed on the same layer as the source and drain, depending on the specific situation. When the ground wire 160 is disposed on the same layer as the source and drain, a via 181 is formed on the passivation layer 180, and the first conductive wire 130 passes through the via 181 through the passivation layer 180 and connects to the ground wire 160.

[0064] In some embodiments, the array substrate 200 includes a pixel electrode, and a second conductive line 150 is disposed on the same layer as the pixel electrode. The pixel electrode is disposed in the display area 11, and the second conductive line 150 is disposed in the non-display area 12. Both the pixel electrode and the second conductive line 150 may be made of indium tin oxide.

[0065] The second conductive line 150 is disposed on the same layer as the pixel electrode, which can reduce the manufacturing cost of the array substrate 200 and the display panel 10.

[0066] In some embodiments, in the display panel 10, the opposing substrate 100 and the array substrate 200 have the same shape and are equal in size, or the opposing substrate 100 is slightly larger than the array substrate 200. The display panel 10 also includes a frame adhesive 300, which is disposed between the opposing substrate 100 and the array substrate 200, and is located in the non-display area 12 of the opposing substrate 100 and the array substrate 200. The first conductive line 130, the second conductive line 150 and the ground line 160 may be disposed outside the frame adhesive 300, or the first conductive line 130, the second conductive line 150 and the ground line 160 may be disposed where the area where the frame adhesive 300 is located at least partially overlaps with the area where the frame adhesive 300 is located, and the first conductive line 130, the second conductive line 150 and the ground line 160 are at least partially embedded in the frame adhesive 300.

[0067] The opposing substrate 100 and the array substrate 200 have the same shape, and the opposing substrate 100 is slightly larger than the array substrate 200, which can reduce light leakage and improve the display quality of the display panel 10. The first conductive line 130, the second conductive line 150 and the ground line 160 can be disposed in a region that at least partially overlaps with the region where the frame adhesive 300 is located, and the frame adhesive 300 can protect the first conductive line 130 and the second conductive line 150.

[0068] Example 2

[0069] The main difference between Embodiment 2 and Embodiment 1 is that in Embodiment 2, the raised portion 120 is disposed on the array substrate 200.

[0070] See Figure 4As shown, the array substrate 200 further includes a gate insulating layer 170 and a passivation layer 180. The gate insulating layer 170 is formed on one side of the second substrate 190, and the passivation layer 180 is formed on the side of the gate insulating layer 170 away from the second substrate 190. The second conductive line 150 and the raised portion 120 are disposed on the side of the passivation layer 180 away from the second substrate 190.

[0071] During the use of the display panel 10, when high-voltage static electricity is generated on the opposing substrate 100, the static electricity will be released to the grounding terminal of the main board 20 through the first conductive line 130, the second conductive line 150, the grounding line 160, and the flexible circuit board 30. This prevents the static electricity from passing through the in-plane components, circuits, and driver chips, thus avoiding damage to these components, circuits, and driver chips. The display panel 10 does not rely on conductive cloth to release static electricity to the outer casing; therefore, the display panel 10 in this application can be used in narrow-bezel and bezel-less display devices.

[0072] Example 3

[0073] See Figure 5 As shown, in this embodiment, the display device includes the display panel 10 and the main board 20 disclosed in Embodiment 1 or 2, with the main board 20 connected to the display panel 10. The display device may also include a flexible circuit board 30, with the main board 20 and the display panel 10 connected via the flexible circuit board 30.

[0074] Since the array substrate 200 or the opposing substrate 200 is provided with a raised portion 120, the raised portion 120 reduces the distance between the first conductive line 130 and the second conductive line 150 or makes them contact each other. Static electricity is released to the grounding terminal of the main board 20 through the first conductive line 130, the second conductive line 150, the grounding line 160, and the flexible circuit board 30. This can prevent in-plane components, lines and driving chips from being damaged by high voltage electrostatic discharge, and improve the electrostatic protection capability of the display panel 10 and the display device.

[0075] The terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first," "second," etc., may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0076] In this application, unless otherwise expressly specified and limited, the terms "assembly," "connection," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0077] In the description of this specification, references to terms such as "some embodiments," "exemplarily," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. The illustrative expressions of the above terms in this specification do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in a suitable manner in any one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0078] Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of this application. Therefore, any changes or modifications made in accordance with the claims and description of this application should fall within the scope of this application.

Claims

1. A display panel, comprising an array substrate and an opposing substrate disposed opposite each other, characterized in that, The opposing substrate includes a first substrate and a first conductive line, wherein the first conductive line is formed on one side of the first substrate. The array substrate includes a second substrate, a ground line, and a second conductive line. Both the ground line and the second conductive line are formed on one side of the second substrate, and the second conductive line is connected to the ground line. The array substrate or the opposing substrate further includes a raised portion, which is formed on the side of the first conductive line away from the second conductive line or on the side of the second conductive line away from the first conductive line, so that in a portion of the area where the raised portion is provided, the distance between the first conductive line and the second conductive line is reduced or they are in contact. The raised portion includes at least one color resist. The display panel includes a display area and a non-display area surrounding the display area, and the raised portion is located in the non-display area.

2. The display panel according to claim 1, characterized in that, The raised portion includes multiple color resists of different colors, which are stacked together.

3. The display panel according to claim 2, characterized in that, The multiple color resists of different colors include a red color resist, a green color resist, and a blue color resist. The orthographic projection of the green color resist on the first substrate is located within the orthographic projection of the red color resist on the first substrate, and the orthographic projection of the blue color resist on the first substrate is located within the orthographic projection of the green color resist on the first substrate.

4. The display panel according to claim 2, characterized in that, In the area where the raised portion is provided, the first conductive wire is in contact with the second conductive wire.

5. The display panel according to claim 1, characterized in that, The opposing substrate includes a black matrix formed on one side of the first substrate, and the raised portion is disposed on the side of the black matrix away from the first substrate.

6. The display panel according to claim 1, characterized in that, The array substrate includes a gate insulating layer and a passivation layer. The gate insulating layer is formed on one side of the second substrate, and the passivation layer is formed on the side of the gate insulating layer away from the second substrate. The second conductive line and the raised portion are both disposed on the side of the passivation layer away from the second substrate.

7. The display panel according to claim 6, characterized in that, The array substrate further includes a gate and a source / drain electrode. The gate is formed on the side of the gate insulating layer near the second substrate. The source / drain electrode is formed between the gate insulating layer and the passivation layer. The ground line is disposed in the same layer as the gate. The first conductive line passes through the gate insulating layer and the passivation layer and is connected to the ground line. Alternatively, the ground line is disposed in the same layer as the source / drain electrode and the first conductive line passes through the passivation layer and is connected to the ground line.

8. The display panel according to claim 1, characterized in that, Both the first conductive line and the second conductive line are arranged to surround or partially surround the display area.

9. The display panel according to claim 8, characterized in that, The plurality of the raised portions are spaced apart along the extension direction of the first conductive line.

10. A display device, characterized in that, include: The display panel as described in any one of claims 1 to 9; The motherboard is connected to the display panel.

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