A low-delay conversion circuit for photoelectric signal conversion and an optical communication device.

Abstract

This invention relates to the field of network communication technology and provides a low-latency conversion circuit for photoelectric signal conversion. The low-latency conversion circuit includes a power supply module, a control module, a first conversion module, and a second conversion module. The first conversion module receives optical signals and converts them into electrical signals, which are then transmitted to the control module. Simultaneously, it also receives electrical signals sent by the control module and converts them back into optical signals for output, thus extending the data transmission range of optical fiber communication equipment. The second conversion module receives electrical signals and transmits them to the control module. It also receives electrical signals sent by the control module and outputs them. Through signal conversion between the first and second conversion modules, bidirectional signal transmission is achieved.

Description

Technical Field

[0001] This utility model belongs to the field of network communication technology, and in particular relates to a low-latency conversion circuit for photoelectric signal conversion and an optical communication device. Background Technology

[0002] The core of optical communication equipment is an integrated device that uses optical modules as interfaces, optical amplification or modulation and demodulation as signal protection, optical path multiplexing or control as efficiency support, and protocol control as the basis for coordination, ultimately achieving efficient, reliable, and high-capacity transmission of optical signals.

[0003] In existing technologies, optical communication equipment generally uses optical fibers to transmit data with optical signals as the carrier. The optical signal is received by the receiving end, converted into an electrical signal, and then output. It is not possible to receive an electrical signal at the receiving end, convert the electrical signal into an optical signal, and then output it. It can only transmit in one direction and cannot achieve dual-channel signal transmission on a single optical communication device. Utility Model Content

[0004] The purpose of this utility model embodiment is to provide a low-latency conversion circuit for photoelectric signal conversion and an optical communication device, aiming to solve the problem in the prior art that optical communication devices generally use optical fibers to transmit data with optical signals as carriers. The optical signals are received by the receiving end, converted into electrical signals, and then output. It is not possible to receive electrical signals by the receiving end, convert the electrical signals into optical signals, and then output them. Only unidirectional channel transmission is possible, and dual-channel signal transmission cannot be achieved on an optical communication device.

[0005] This utility model embodiment is implemented as follows: a low-latency conversion circuit for photoelectric signal conversion, the low-latency conversion circuit for photoelectric signal conversion includes: a power supply module, a control module, a first conversion module and a second conversion module;

[0006] The power module is connected to the control module and is used to provide power to the control module.

[0007] The control module is connected to the first conversion module and the second conversion module respectively, and is used for signal transmission between the first conversion module and the second conversion module;

[0008] The first conversion module is used to receive optical signals and convert them into electrical signals, and send the electrical signals to the control module, or the first conversion module receives electrical signals sent by the control module and converts the electrical signals into optical signals for output;

[0009] The second conversion module is used to receive electrical signals and send them to the control module, or the second conversion module receives electrical signals sent by the control module and outputs them.

[0010] Preferably, the power module includes a charging module and a voltage conversion module;

[0011] The output terminal of the charging module is connected to the input terminal of the voltage conversion module; the output terminal of the voltage conversion module is connected to the control module and is used to provide the control module with the converted voltage.

[0012] The charging module includes a TYPEC-1 chip, a diode D2, and a charging interface J1;

[0013] The VBUS interface of the TYPEC-1 chip is connected to the positive terminal of the diode D2;

[0014] The negative terminal of diode D2 is connected to the input terminal of the voltage conversion module;

[0015] The positive terminal of the charging interface J1 is connected to the input terminal of the voltage conversion module.

[0016] Preferably, the voltage conversion module includes chip U10 and chip U11;

[0017] The IN interface of the chip U10 is connected to the positive terminal of the charging interface J1, and the OUT interface is connected to the input terminal of the control module.

[0018] The VIN interface of the chip U11 is connected to the negative terminal of the diode D2, and the VOUT interface is connected to the input terminal of the control module.

[0019] Preferably, the control module includes chip U1, chip U4, crystal oscillator X2, and crystal oscillator X3;

[0020] The EP interface of chip U1 is connected to the EP interface of chip U4, the AVDDH interface is connected to the OUT interface of chip U10, and the HSOP, HSON, HSIP, and HSIN interfaces are connected to the first conversion module.

[0021] The U3SSTXP, U3SSTXN, U3SSRXP, and U3SSRXN interfaces of the chip U4 are connected to the second conversion module.

[0022] One end of the crystal oscillator X2 is connected to the CKXTAL1 interface of the chip U4, and the other end is connected to the CKXTAL2 interface of the chip U4.

[0023] One end of the crystal oscillator X3 is connected to the XTALI interface of the chip U1, and the other end is connected to the XTALO interface of the chip U1.

[0024] Preferably, the first conversion module includes chip SFP1, capacitor C43, capacitor C44, capacitor C45, and capacitor C46;

[0025] The TD+ interface of the SFP1 chip is connected to the HSOP interface of the U1 chip via capacitor C44, the TD- interface is connected to the HSON interface of the U1 chip via capacitor C43, the RD+ interface is connected to the HSIP interface of the U1 chip via capacitor C45, and the RD- interface is connected to the HSIN interface of the U1 chip via capacitor C46.

[0026] Preferably, the first conversion module is provided with multiple fiber optic interfaces that are connected to the SFP1 chip.

[0027] Preferably, the second conversion module includes chip U12, capacitor C3, capacitor C4, capacitor C5, capacitor C6, chip U5, resistor R3, and resistor R11;

[0028] The TX_P interface of chip U12 is connected to the U3SSTXP interface of chip U4 through capacitor C3, the TX_N interface is connected to the U3SSTXN interface of chip U4 through capacitor C4, the RX_P interface is connected to the U3SSRXP interface of chip U4 through capacitor C5, and the RX_N interface is connected to the U3SSRXN interface of chip U4 through capacitor C6.

[0029] The CC1 interface of chip U12 is connected to the CC1 interface of chip TYPEC-1, the CC2 interface is connected to the CC2 interface of chip TYPEC-1, the TX1_P interface is connected to the SSTXPI interface of chip TYPEC-1, the TX1_N interface is connected to the SSTXN1 interface of chip TYPEC-1, the TXW_P interface is connected to the SSTXP2 interface of chip TYPEC-1, the TX2_P interface is connected to the SSTXN2 interface of chip TYPEC-1, the RX1_P interface is connected to the SSRXP1 interface of chip TYPEC-1, the RX1_N interface is connected to the SSRXN1 interface of chip TYPEC-1, the RX2_P interface is connected to the SSRXP2 interface of chip TYPEC-1, and the RX2_N interface is connected to the SSRXN2 interface of chip TYPEC-1.

[0030] The SPISDI interface of chip U5 is connected to the SPISDI interface of chip U4 through resistor R3, the SPISCK interface is connected to the SPISCK interface of chip U4, the SPISDO interface is connected to the SPISDO interface of chip U4 through resistor R11, and the SPISSB interface is connected to the SPISSB interface of chip U4.

[0031] Preferably, the low-latency conversion circuit for photoelectric signal conversion further includes a storage module, which includes a chip U13 and a resistor R60;

[0032] The SDA interface of chip U13 is connected to the SDA interface of chip U1 through resistor R60, the SCL interface is connected to the SCK interface of chip U1, and the VCC interface is connected to the AVDDH interface of chip U1.

[0033] Another objective of this utility model is to provide an optical communication device, which includes: a housing, a heat dissipation assembly, and a low-latency conversion circuit for photoelectric signal conversion disposed within the housing.

[0034] This utility model provides a low-latency conversion circuit for photoelectric signal conversion. A power supply module is connected to a control module to provide power to the control module. The control module is connected to both a first conversion module and a second conversion module. The control module is used for signal transmission between the first and second conversion modules. The first conversion module receives optical signals and converts them into electrical signals, which are then transmitted to the control module. It can also receive electrical signals sent by the control module and output them directly or convert them into optical signals. The second conversion module receives electrical signals and transmits them to the control module. It can also receive electrical signals sent by the control module and output them. This allows the optical communication device to not only support data transmission using optical signals as carriers but also data transmission using electrical signals as carriers, achieving bidirectional channel signal transmission. Attached Figure Description

[0035] Figure 1 A structural diagram of a low-delay conversion circuit for photoelectric signal conversion provided in an embodiment of this utility model;

[0036] Figure 2 This is the circuit diagram for the charging module;

[0037] Figure 3 This is the circuit diagram of the voltage conversion module;

[0038] Figure 4 This is the circuit diagram of chip U1 in the control module;

[0039] Figure 5 This is the circuit diagram of chip U4 in the control module;

[0040] Figure 6 This is the circuit diagram of the first conversion module;

[0041] Figure 7 This is the circuit diagram for the second conversion module;

[0042] Figure 8 This is a structural diagram of the first conversion module and the second conversion module;

[0043] Figure 9 This is the circuit diagram for chip U5;

[0044] Figure 10 This is the circuit diagram for the storage module;

[0045] Figure 11 This is the circuit diagram for the indicator light module. Detailed Implementation

[0046] To make the objectives, technical solutions, and advantages of this utility model clearer, the present utility model will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present utility model and are not intended to limit the present utility model.

[0047] The specific implementation of this utility model will be described in detail below with reference to specific embodiments.

[0048] like Figure 1 The diagram shown is a structural diagram of a low-delay conversion circuit for photoelectric signal conversion provided in an embodiment of the present invention, including: a power supply module, a control module, a first conversion module, and a second conversion module;

[0049] The power module is connected to the control module and is used to provide power to the control module.

[0050] The control module is connected to the first conversion module and the second conversion module respectively, and is used to receive a first signal sent by the first conversion module and send a second signal to the second conversion module according to the first signal sent by the first conversion module, receive a third signal sent by the second conversion module and send a fourth signal to the first conversion module according to the third signal sent by the second conversion module;

[0051] The first conversion module is used to receive optical signals and convert them into electrical signals, and send the electrical signals to the control module. The first conversion module receives the electrical signals sent by the control module and converts the electrical signals into optical signals for output, thereby extending the transmission range of the optical communication device.

[0052] The second conversion module is used to receive electrical signals and send them to the control module. The second conversion module receives the electrical signals sent by the control module and outputs the electrical signals, thereby extending the transmission range of the optical communication device.

[0053] In this embodiment of the invention, the power module can be connected to an external power source and provide power to the control module. The power module can be single or dual power supply mode, and supports hot-swapping while being equipped with AC fuses and DC fuses.

[0054] In this embodiment of the invention, the control module is connected to the first conversion module and the second conversion module respectively. The control module supports the conversion of optical signals to electrical signals or the conversion of electrical signals to optical signals. It is used for signal transmission connection between optical fiber and copper cable, high-bandwidth data transmission scenarios, and can ensure simple compatibility of network devices. It facilitates signal transmission between the first conversion module and the second conversion module to meet the data signal transmission needs of different distances or ranges. The protocols supported by the control module include 1 / 10 / 40 / 100 / 200 / 400G Ethernet; -1 / 2 / 4 / 8 / 16 / 32G Fibre Channel, etc.

[0055] In this embodiment of the utility model, the first conversion module is mainly used for physical connection between circuits and signal transmission, so that the optical fiber communication equipment can transmit optical signals to the first conversion module, convert the optical signals into a first signal and transmit the first signal to the control module. At this time, long-distance data signal transmission can be realized through the first conversion module. The first signal after optical signal conversion can be an electrical signal. The first conversion module receives a fourth signal sent by the control module. The fourth signal can be an electrical signal or an electrical signal. It is converted into an optical signal by the first conversion module and output. The distance and range of signal transmission are extended through optical fiber. Furthermore, through DWDM (Dense Wavelength Division Multiplexing) optical fiber communication technology, optical signals of different wavelengths can be multiplexed into the same optical fiber for transmission, which greatly improves the transmission capacity. Low latency can be indirectly achieved through parallel transmission of multiple signals.

[0056] In this embodiment of the invention, the second conversion module is mainly used for physical layer connection and data transmission between Ethernet devices, so that the Ethernet device can transmit a third signal to the second conversion module. The third signal can be an electrical signal. The second conversion module transmits the third signal to the control module. At this time, the second conversion module can realize short-distance data signal transmission. When it is necessary to transmit the signal to realize long-distance transmission, the control module can transmit a fourth signal to the first conversion module according to the third signal to facilitate signal transmission between the two conversion modes. The parallel transmission of the two data transmission channels can indirectly achieve low latency.

[0057] This utility model provides a low-latency conversion circuit for photoelectric signal conversion. A power supply module is connected to a control module to provide power to the control module. The control module is connected to both a first conversion module and a second conversion module. The control module is used for signal transmission between the first and second conversion modules. The first conversion module receives optical signals and converts them into electrical signals, which are then transmitted to the control module. It can also receive electrical signals sent by the control module and output them directly or convert them into optical signals. The second conversion module receives electrical signals and transmits them to the control module. It can also receive electrical signals sent by the control module and output them. This allows the optical communication device to not only support data transmission using optical signals as carriers but also data transmission using electrical signals as carriers, achieving bidirectional channel signal transmission.

[0058] like Figure 2-3 As shown, in a preferred embodiment of the present invention, the power supply module includes a charging module and a voltage conversion module;

[0059] The output terminal of the charging module is connected to the input terminal of the voltage conversion module; the output terminal of the voltage conversion module is connected to the control module and is used to provide the converted voltage to the control module.

[0060] In this embodiment of the utility model, the power module includes a charging module and a voltage conversion module. The output terminal of the charging module and the input terminal of the voltage conversion module are used. The charging module can be connected to an external power source or battery to provide a stable and converted voltage to the control module through the charging module and the voltage conversion module. The voltage conversion module converts the voltage output from the charging module into the required voltage to ensure the normal operation of the control module.

[0061] like Figure 2 As shown, in a preferred embodiment of the present invention, the charging module includes a TYPEC-1 chip, a diode D2, and a charging interface J1;

[0062] The VBUS interface of the TYPEC-1 chip is connected to the positive terminal of the diode D2;

[0063] The negative terminal of diode D2 is connected to the input terminal of the voltage conversion module;

[0064] The positive terminal of the charging interface J1 is connected to the input terminal of the voltage conversion module.

[0065] In this embodiment of the utility model, the charging module is connected to the TYPEC interface via the TYPEC-1 chip and can be connected to an external power source or battery between the control module via the TYPEC interface to provide power to the control module and to transmit data. Connecting the VBUS interface of the TYPEC-1 chip to the positive terminal of the diode D2 can protect the TYPEC-1 chip from reverse current surges. A third indicator LED1 can also be provided and connected to the TYPEC-1 chip.

[0066] In this embodiment of the invention, the charging interface J1 is mainly used to provide a stable DC power input.

[0067] like Figure 3 As shown, in a preferred embodiment of the present invention, the voltage conversion module includes chip U10 and chip U11;

[0068] The IN interface of the chip U10 is connected to the positive terminal of the charging interface J1, and the OUT interface is connected to the input terminal of the control module.

[0069] The VIN interface of the chip U11 is connected to the negative terminal of the diode D2, and the VOUT interface is connected to the input terminal of the control module.

[0070] In this embodiment of the utility model, the output terminal of the charging interface J1 can be 9V, and the output through the OUT interface of the chip U10 can be 3.3V. The chip U10 is used to step down and stabilize the voltage to provide clean power for low-power devices. Alternatively, the output terminal can be set to 5V.

[0071] In this embodiment of the present invention, the VBUS interface of the TYPEC-1 chip can output 5V, and the voltage is stepped down and stabilized by the chip U11, resulting in a stable output voltage of 3.3V through the chip U11.

[0072] like Figure 4-5 As shown, in a preferred embodiment of the present invention, the control module includes chip U1, chip U4, crystal oscillator X2, and crystal oscillator X3;

[0073] The EP interface of chip U1 is connected to the EP interface of chip U4, the AVDDH interface is connected to the OUT interface of chip U10, and the HSOP, HSON, HSIP, and HSIN interfaces are connected to the first conversion module.

[0074] The U3SSTXP, U3SSTXN, U3SSRXP, and U3SSRXN interfaces of the chip U4 are connected to the second conversion module.

[0075] One end of the crystal oscillator X2 is connected to the CKXTAL1 interface of the chip U4, and the other end is connected to the CKXTAL2 interface of the chip U4.

[0076] One end of the crystal oscillator X3 is connected to the XTALI interface of the chip U1, and the other end is connected to the XTALO interface of the chip U1.

[0077] In this embodiment of the invention, chip U1 can be an RTL8213B-CG chip, providing interfaces such as SGMII, 1000Base-X (fiber optic), and 100FX (multimode fiber optic), suitable for fiber optic and copper network conversion scenarios. It is mainly used for media conversion functions in network devices, such as converting copper network signals to fiber optic transmission, or achieving compatibility conversion between networks of different speeds. An indicator light module can also be connected to chip U1. Figure 11 As shown, the indicator module includes a first indicator light FIBER1 and a second indicator light 1000M1; the P6LED0 interface of chip U1 is connected to the first indicator light FIBER1, and the P3LED1 interface of chip U1 is connected to the second indicator light 1000M1.

[0078] In this embodiment of the utility model, the chip U4 can be selected as RTL8153B-VB-CG. The chip U4 is connected to the second conversion module. The chip U4 can meet the Ethernet requirements and directly connect to the network cable for short-distance and efficient transmission of electrical signals.

[0079] like Figure 6-8 As shown, in a preferred embodiment of the present invention, the first conversion module includes chip SFP1, capacitor C43, capacitor C44, capacitor C45, and capacitor C46.

[0080] The TD+ interface of the SFP1 chip is connected to the HSOP interface of the U1 chip via capacitor C44, the TD- interface is connected to the HSON interface of the U1 chip via capacitor C43, the RD+ interface is connected to the HSIP interface of the U1 chip via capacitor C45, and the RD- interface is connected to the HSIN interface of the U1 chip via capacitor C46.

[0081] The first conversion module is equipped with multiple fiber optic interfaces that are connected to the SFP1 chip.

[0082] In this embodiment of the present invention, the SFP1 chip may also be provided with multiple SFP interfaces installed on the SFP1 chip. The SFP1 chip and the SFP interfaces are connected. The SFP interfaces are used to connect the optical fiber and the low-latency conversion circuit for photoelectric signal conversion, so as to realize the transmission of optical signals in optical fiber transmission by plugging the SFP interface into the optical fiber.

[0083] In this embodiment of the invention, the SFP1 chip can be connected to a 3.3V power supply via the VccT and VccR interfaces respectively. Multiple fiber optic interfaces are connected to the SFP1 chip. The fiber optic interfaces can be SFP interfaces, and multiple interfaces can be provided to expand the connection ports in order to support multiple fiber optic connections to achieve multi-channel data transmission and signal conversion.

[0084] like Figure 7-9 As shown, in a preferred embodiment of the present invention, the second conversion module includes chip U12, capacitor C3, capacitor C4, capacitor C5, capacitor C6, chip U5, resistor R3, and resistor R11.

[0085] The TX_P interface of chip U12 is connected to the U3SSTXP interface of chip U4 through capacitor C3, the TX_N interface is connected to the U3SSTXN interface of chip U4 through capacitor C4, the RX_P interface is connected to the U3SSRXP interface of chip U4 through capacitor C5, and the RX_N interface is connected to the U3SSRXN interface of chip U4 through capacitor C6.

[0086] The CC1 interface of chip U12 is connected to the CC1 interface of chip TYPEC-1, the CC2 interface is connected to the CC2 interface of chip TYPEC-1, the TX1_P interface is connected to the SSTXPI interface of chip TYPEC-1, the TX1_N interface is connected to the SSTXN1 interface of chip TYPEC-1, the TXW_P interface is connected to the SSTXP2 interface of chip TYPEC-1, the TX2_P interface is connected to the SSTXN2 interface of chip TYPEC-1, the RX1_P interface is connected to the SSRXP1 interface of chip TYPEC-1, the RX1_N interface is connected to the SSRXN1 interface of chip TYPEC-1, the RX2_P interface is connected to the SSRXP2 interface of chip TYPEC-1, and the RX2_N interface is connected to the SSRXN2 interface of chip TYPEC-1.

[0087] like Figure 9 As shown, the SPISDI interface of chip U5 is connected to the SPISDI interface of chip U4 through resistor R3, the SPISCK interface is connected to the SPISCK interface of chip U4, the SPISDO interface is connected to the SPISDO interface of chip U4 through resistor R11, and the SPISSB interface is connected to the SPISSB interface of chip U4.

[0088] In this embodiment of the invention, chip U12 in the second conversion module is connected to chip U4 in the control module. An RJ45 interface can be used to connect to both chip U12 and chip U4, allowing the Ethernet twisted-pair cable and the extended-range optical communication equipment control circuit to be connected via one or more RJ45 interfaces. This enables bidirectional signal transmission or bidirectional control signal transmission for the Ethernet device through the RJ45 interface and twisted-pair cable connection. Specifically, the TX_P pin of chip U12 can be connected to the RX+ interface of the RJ45 interface, and the TX+ interface of the RJ45 interface can be connected to the U3SSTXP interface of chip U4 for electrical signal transmission. The TX_N pin of chip U12... The RJ45 interface's RX- connector is connected to the RJ45 interface's TX- connector, which in turn connects to the U3SSTXN connector of chip U4 for signal transmission. Similarly, chip U12's RX_P connector is connected to the RJ45 interface's TX+ connector, and its RX+ connector is connected to the U3SSRXP connector of chip U4 for signal transmission. Chip U12's RX_N connector is connected to the RJ45 interface's TX- connector, and its RX- connector is connected to the U3SSRXN connector of chip U4 for signal transmission. This RJ45 connection between chip U12 and chip U4 supports communication over local area networks (LANs) and wide area networks (WANs), enabling data transmission.

[0089] Chip U5 is connected to chip U4 and has a reserved SPI communication interface to facilitate the transmission of data signals.

[0090] like Figure 10 As shown in the preferred embodiment of this utility model, the low-latency conversion circuit for photoelectric signal conversion further includes a storage module. The storage module includes a chip U13 and a resistor R60. The SDA interface of the chip U13 is connected to the SDA interface of the chip U1 through the resistor R60, the SCL interface is connected to the SCK interface of the chip U1, and the VCC interface is connected to the AVDDH interface of the chip U1.

[0091] In this embodiment of the utility model, the storage module chip U13 can be a BL24C02F-SFRC chip, which is connected to chip U1 through the SDA interface, SCL interface and VCC interface of chip U13, respectively, so as to store the data transmitted between chip U1 and chip U4.

[0092] This utility model embodiment also provides an optical communication device, including: a housing, a heat dissipation component, and a low-latency conversion circuit for photoelectric signal conversion disposed in the housing.

[0093] In this embodiment of the utility model, the low-latency conversion circuit for photoelectric signal conversion in the optical communication device is installed inside the housing via a circuit board, and a heat dissipation component is provided inside the housing. The heat dissipation component can dissipate heat inside the housing. The heat dissipation component can be a cooling fan and other connecting parts connected to the cooling fan.

[0094] This embodiment of the invention provides an optical communication device that connects to a control module via a power module to provide power to the control module. The control module is connected to a first conversion module and a second conversion module. The control module is used for signal transmission between the first and second conversion modules. The first conversion module receives optical signals and converts them into electrical signals, which are then transmitted to the control module. It can also receive electrical signals sent by the control module and output them directly or convert them into optical signals. The second conversion module receives electrical signals and transmits them to the control module. It can also receive electrical signals sent by the control module and output them. This allows the optical communication device to not only support data transmission using optical signals as the carrier but also data transmission using electrical signals as the carrier, thus achieving bidirectional channel signal transmission.

[0095] The above description is only a preferred embodiment of the present utility model and is not intended to limit the present utility model. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present utility model should be included within the protection scope of the present utility model.

Claims

1. A low-delay conversion circuit for photoelectric signal conversion, characterized in that, The low-delay conversion circuit for photoelectric signal conversion includes: a power supply module, a control module, a first conversion module, and a second conversion module; The power module is connected to the control module and is used to provide power to the control module. The control module is connected to the first conversion module and the second conversion module respectively, and is used for signal transmission between the first conversion module and the second conversion module; The first conversion module is used to receive optical signals and convert them into electrical signals, and send the electrical signals to the control module, or the first conversion module receives electrical signals sent by the control module and converts the electrical signals into optical signals for output; The second conversion module is used to receive electrical signals and send them to the control module, or the second conversion module receives electrical signals sent by the control module and outputs them.

2. The low-delay conversion circuit for photoelectric signal conversion according to claim 1, characterized in that, The power module includes a charging module and a voltage conversion module; The output terminal of the charging module is connected to the input terminal of the voltage conversion module; the output terminal of the voltage conversion module is connected to the control module and is used to provide the control module with the converted voltage. The charging module includes a TYPEC-1 chip, a diode D2, and a charging interface J1; The VBUS interface of the TYPEC-1 chip is connected to the positive terminal of the diode D2; The negative terminal of diode D2 is connected to the input terminal of the voltage conversion module; The positive terminal of the charging interface J1 is connected to the input terminal of the voltage conversion module.

3. The low-delay conversion circuit for photoelectric signal conversion according to claim 2, characterized in that, The voltage conversion module includes chip U10 and chip U11; The IN interface of the chip U10 is connected to the positive terminal of the charging interface J1, and the OUT interface is connected to the input terminal of the control module. The VIN interface of the chip U11 is connected to the negative terminal of the diode D2, and the VOUT interface is connected to the input terminal of the control module.

4. The low-delay conversion circuit for photoelectric signal conversion according to claim 3, characterized in that, The control module includes chip U1, chip U4, crystal oscillator X2, and crystal oscillator X3; The EP interface of chip U1 is connected to the EP interface of chip U4, the AVDDH interface is connected to the OUT interface of chip U10, and the HSOP, HSON, HSIP, and HSIN interfaces are connected to the first conversion module. The U3SSTXP, U3SSTXN, U3SSRXP, and U3SSRXN interfaces of the chip U4 are connected to the second conversion module. One end of the crystal oscillator X2 is connected to the CKXTAL1 interface of the chip U4, and the other end is connected to the CKXTAL2 interface of the chip U4. One end of the crystal oscillator X3 is connected to the XTALI interface of the chip U1, and the other end is connected to the XTALO interface of the chip U1.

5. The low-delay conversion circuit for photoelectric signal conversion according to claim 4, characterized in that, The first conversion module includes chip SFP1, capacitor C43, capacitor C44, capacitor C45, and capacitor C46; The TD+ interface of the SFP1 chip is connected to the HSOP interface of the U1 chip via capacitor C44, the TD- interface is connected to the HSON interface of the U1 chip via capacitor C43, the RD+ interface is connected to the HSIP interface of the U1 chip via capacitor C45, and the RD- interface is connected to the HSIN interface of the U1 chip via capacitor C46.

6. The low-delay conversion circuit for photoelectric signal conversion according to claim 5, characterized in that, The first conversion module is equipped with multiple fiber optic interfaces that are connected to the SFP1 chip.

7. The low-delay conversion circuit for photoelectric signal conversion according to claim 5, characterized in that, The second conversion module includes chip U12, capacitor C3, capacitor C4, capacitor C5, capacitor C6, chip U5, resistor R3, and resistor R11; The TX_P interface of chip U12 is connected to the U3SSTXP interface of chip U4 through capacitor C3, the TX_N interface is connected to the U3SSTXN interface of chip U4 through capacitor C4, the RX_P interface is connected to the U3SSRXP interface of chip U4 through capacitor C5, and the RX_N interface is connected to the U3SSRXN interface of chip U4 through capacitor C6. The CC1 interface of chip U12 is connected to the CC1 interface of chip TYPEC-1, the CC2 interface is connected to the CC2 interface of chip TYPEC-1, the TX1_P interface is connected to the SSTXPI interface of chip TYPEC-1, the TX1_N interface is connected to the SSTXN1 interface of chip TYPEC-1, the TXW_P interface is connected to the SSTXP2 interface of chip TYPEC-1, the TX2_P interface is connected to the SSTXN2 interface of chip TYPEC-1, the RX1_P interface is connected to the SSRXP1 interface of chip TYPEC-1, the RX1_N interface is connected to the SSRXN1 interface of chip TYPEC-1, the RX2_P interface is connected to the SSRXP2 interface of chip TYPEC-1, and the RX2_N interface is connected to the SSRXN2 interface of chip TYPEC-1. The SPISDI interface of chip U5 is connected to the SPISDI interface of chip U4 through resistor R3, the SPISCK interface is connected to the SPISCK interface of chip U4, the SPISDO interface is connected to the SPISDO interface of chip U4 through resistor R11, and the SPISSB interface is connected to the SPISSB interface of chip U4.

8. The low-delay conversion circuit for photoelectric signal conversion according to claim 5, characterized in that, The low-delay conversion circuit for photoelectric signal conversion also includes a storage module, which includes a chip U13 and a resistor R60. The SDA interface of chip U13 is connected to the SDA interface of chip U1 through resistor R60, the SCL interface is connected to the SCK interface of chip U1, and the VCC interface is connected to the AVDDH interface of chip U1.

9. An optical communication device, characterized in that, The optical communication device includes: a housing, a heat dissipation assembly, and a low-latency conversion circuit for photoelectric signal conversion as described in any one of claims 1-8 disposed within the housing.

Images