DPC-based sip radio frequency module

Abstract

This application relates to the field of semiconductor packaging technology, and in particular to a DPC-based SIP RF module. The DPC-based SIP RF module includes a ceramic substrate and a frame. A chip arrangement metal layer is formed on the first surface of the ceramic substrate, including a circuit plating layer and a solder plating layer surrounding the outside of the circuit plating layer. The bottom end of the frame is used for soldering to the solder plating layer. The thickness of the solder plating layer is less than that of the circuit plating layer, and a solder resist layer is provided along the peripheral edge of the circuit plating layer. A recess is formed on the inner side of the bottom end of the frame, and the end face of the bottom end of the frame can be adapted to face and soldered to the solder plating layer. The peripheral edge of the circuit plating layer and the solder resist layer are adapted to extend into the recess. Thus, a dam structure is formed on the ceramic substrate by soldering the frame, effectively preventing solder overflow during soldering. Furthermore, compared to directly electroplating an ultra-thick dam structure on the ceramic substrate, this method effectively shortens the processing cycle and improves production efficiency.

Description

Technical Field

[0001] This application relates to the field of semiconductor packaging technology, and in particular to a DPC-based SIP radio frequency module. Background Technology

[0002] System-in-package (SIP) technology is widely used in high-power radio frequency (RF) front-end modules in fields such as missile guidance, satellite communication, and radar. In practical applications of high-power RF front-end modules, the selection of the packaging substrate is crucial due to their complex operating environment and stringent performance requirements. Currently, ceramic substrates suitable for such scenarios are mainly classified into LTCC (Low Temperature Co-fired Multilayer Ceramic), HTCC (High Temperature Co-fired Multilayer Ceramic), DPC (Direct Metal-Clad Ceramic), and DBC (Direct Copper-Clad Ceramic). Among these, DPC technology has attracted significant attention due to its advantages such as good flatness, fine metal lines, low loss, low cost, short processing cycle, and excellent heat dissipation performance.

[0003] However, the DPC process typically requires the formation of an ultra-thick dam structure exceeding 0.6 mm on a ceramic substrate through electroplating, which is then combined with a cover plate to form a sealed encapsulation space. Although this design can meet the performance requirements of specific encapsulation structures, the processing cycle of ceramic substrates with dam structures is relatively long, generally taking about 50 days. This remains a problem that urgently needs to be solved for modern industrial systems that pursue efficient production and rapid delivery. Utility Model Content

[0004] The purpose of this invention is to provide a DPC-based SIP radio frequency module to shorten the processing cycle and improve production efficiency to a certain extent.

[0005] This utility model provides a DPC-based SIP radio frequency module, including a ceramic substrate and a frame;

[0006] One side surface of the ceramic substrate is a first surface, and a chip arrangement metal layer is formed on the first surface of the ceramic substrate.

[0007] The chip arrangement metal layer includes a circuit plating layer and a solder plating layer surrounding the outside of the circuit plating layer. The thickness of the solder plating layer is less than the thickness of the circuit plating layer, and a solder resist layer is provided on the circuit plating layer, which is surrounding the peripheral edge of the circuit plating layer.

[0008] One end of the frame is the bottom end, and a recessed platform is formed on the inner side of the bottom end of the frame. The end face of the bottom end of the frame is opposite to and welded to the welding plating layer, and the solder resist layer extends into the recessed platform.

[0009] Furthermore, the SIP module also includes a cover plate;

[0010] The end of the enclosure away from the first surface is the top end. The cover plate is welded to the top end of the enclosure to seal the top end of the enclosure. A protrusion is formed on the side of the cover plate facing the enclosure, and the protrusion extends into the enclosure.

[0011] Furthermore, the bottom end face of the frame is welded to the welding plating layer using a lead-tin alloy as solder.

[0012] Furthermore, the top end face of the frame and the cover plate are welded together using a lead-tin alloy as solder and through parallel seam welding.

[0013] Furthermore, the width of the welding coating is 0.3 mm to 0.5 mm.

[0014] Furthermore, the thickness of the circuit plating layer is 35 μm to 100 μm;

[0015] The thickness of the welding coating is 10 μm to 35 μm.

[0016] Furthermore, the thickness of the solder resist layer is 20 μm to 40 μm.

[0017] Furthermore, the side of the ceramic substrate facing away from the frame is a second surface, and a bottom metal layer and a BGA layer are sequentially disposed on the second surface of the ceramic substrate.

[0018] Furthermore, the enclosure is a Kovar enclosure; the cover plate is a Kovar cover plate.

[0019] Furthermore, both the frame and the cover plate are plated with a nickel-gold layer.

[0020] Compared with the prior art, the beneficial effects of this utility model are as follows:

[0021] The DPC-based SIP RF module provided by this utility model includes a ceramic substrate and a frame. One surface of the ceramic substrate along its thickness direction is a first surface, on which a chip arrangement metal layer is formed. The chip arrangement metal layer includes a circuit plating layer in the central region and a solder plating layer surrounding the outside of the circuit plating layer. Chips are arranged on the circuit plating layer. One end of the frame is the bottom end, and the solder plating layer is used to solder to the bottom end of the frame. The thickness of the solder plating layer is less than the thickness of the circuit plating layer, and a solder resist layer is provided on the circuit plating layer. The solder resist layer is arranged around the peripheral edge of the circuit plating layer, forming a stepped structure between the solder plating layer and the peripheral edge of the circuit plating layer with the solder resist layer. A recessed platform is formed on the inner side of the bottom end of the frame, making the bottom end of the frame also a stepped structure. When the frame is assembled onto the ceramic substrate, the end face of the bottom end of the frame can be adapted to face and soldered to the solder plating layer, and the peripheral edge of the circuit plating layer and the solder resist layer thereon adaptably extend into the recessed platform.

[0022] This method forms a dam structure on the ceramic substrate by welding a frame. The stepped structure between the frame and the chip arrangement metal layer effectively prevents solder from overflowing and damaging the circuit plating during welding of the bottom end face of the frame to the welding plating layer. Compared to directly electroplating an ultra-thick dam structure on the ceramic substrate, this application forms a chip arrangement metal layer with different thicknesses in different areas on the ceramic substrate, which can effectively shorten the processing cycle and improve production efficiency. Attached Figure Description

[0023] To more clearly illustrate the specific embodiments of this utility model or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this utility model. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0024] Figure 1 This is a schematic diagram of the structure of the DPC-based SIP radio frequency module provided in an embodiment of the present invention;

[0025] Figure 2 A cross-sectional schematic diagram of a partial structure of a DPC-based SIP radio frequency module provided in an embodiment of this utility model;

[0026] Figure 3 for Figure 2 Enlarged view of point A in the middle.

[0027] Figure label:

[0028] 1-Ceramic substrate, 2-Chip arrangement metal layer, 21-Circuit plating layer, 22-Solder plating layer, 23-Solder resist layer, 3-Bottom metal layer, 4-BGA layer, 5-Frame, 51-Sunk plate, 6-Cover plate, 61-Giant. Detailed Implementation

[0029] The technical solution of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are some embodiments of this utility model, but not all embodiments.

[0030] The components of the present invention embodiments described and shown in the accompanying drawings can typically be arranged and designed in a variety of different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention.

[0031] Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this utility model.

[0032] In the description of this utility model, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the accompanying drawings and are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0033] In the description of this utility model, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances.

[0034] The following reference Figures 1 to 3 This application describes a DPC-based SIP radio frequency module according to some embodiments.

[0035] This application provides a DPC-based SIP RF module, such as Figures 1 to 3 As shown, the DPC-based SIP RF module includes a ceramic substrate 1, a frame 5, and a cover plate 6.

[0036] The ceramic substrate 1 includes a first surface and a second surface along its thickness direction. A chip arrangement metal layer 2 is formed on the first surface of the ceramic substrate 1, and a bottom metal layer 3 is formed on the second surface of the ceramic substrate 1. The chip arrangement metal layer 2, the ceramic substrate 1, and the bottom metal layer 3 are integrally formed by DPC process.

[0037] The chip arrangement metal layer 2 includes a line plating layer 21 located in the central region and a solder plating layer 22 surrounding the outside of the line plating layer 21. The line plating layer 21 is used to arrange the chip. The frame 5 has a top end and a bottom end along its own axis. The solder plating layer 22 is used to solder to the bottom end of the frame 5 and cooperates with the cover plate 6 that covers the top end of the frame 5, so that the frame 5 forms a sealed space on one side of the first surface of the ceramic substrate 1 to encapsulate the line plating layer 21 and the chip arranged thereon.

[0038] In this embodiment, the thickness of the solder plating layer 22 is less than the thickness of the circuit plating layer 21, and the circuit plating layer 21 is provided with a solder resist layer 23. The solder resist layer 23 is disposed around the peripheral edge of the circuit plating layer 21, so that the solder plating layer 22 and the peripheral edge of the circuit plating layer 21 with the solder resist layer 23 form a stepped structure. A recessed platform 51 is formed on the inner side of the bottom end of the frame 5, so that the bottom end of the frame 5 is also a stepped structure. When the frame 5 is assembled on the ceramic substrate 1, the end face of the bottom end of the frame 5 can be adapted to face and welded to the solder plating layer 22, and the peripheral edge of the circuit plating layer 21 and the solder resist layer 23 disposed thereon adaptably extend into the recessed platform 51.

[0039] By welding the frame 5, a dam structure is formed on the ceramic substrate 1. The stepped structure between the frame 5 and the chip arrangement metal layer 2 effectively prevents solder from overflowing and damaging the circuit plating layer 21 when the bottom end face of the frame 5 is welded to the welding plating layer 22. Compared with directly electroplating on the ceramic substrate 1 to form an ultra-thick dam structure, this application forms a chip arrangement metal layer 2 with different thicknesses in different areas on the ceramic substrate 1, which can effectively shorten the processing cycle and improve production efficiency.

[0040] Regarding the assembly of the cover plate 6 and the top of the frame 5, in this embodiment, preferably, the cover plate 6 is welded to the end face of the top of the frame 5 by parallel seam welding, and a boss 61 is formed on the side surface of the cover plate 6 facing the frame 5. The outer diameter of the boss 61 is adapted to the inner diameter of the frame 5, so that the boss 61 can be inserted into the frame 5. Thus, the boss 61 can limit the assembly position of the cover plate 6 on the frame 5.

[0041] Meanwhile, when welding the end faces of the cover plate 6 and the top of the frame 5, local high heat is generated at the connection point by intermittent pulse current between the electrodes, and parallel seam welding is performed by micro-spot welding. This ensures that high heat is generated only at the welding connection point between the cover plate 6 and the frame 5, while the overall temperature rise of other parts is less. This reduces the thermal shock to the chips on the chip arrangement metal layer 2, so as to avoid affecting the chips and improve the overall assembly yield.

[0042] In this embodiment, preferably, a solder layer is provided at the connection between the bottom end of the frame 5 and the welding plating layer 22, and at the connection between the top end of the frame 5 and the cover plate 6, and the solder layer is a lead-tin alloy solder layer; for example, Sn10Pb90 with a high melting point (around 270°C) is used as the solder layer.

[0043] In the prior art, the welding between the dam structure formed by direct electroplating on the ceramic substrate 1 and the cover plate 6 requires the use of gold-tin solder. Specifically, this is to avoid temperature interference with the subsequent ball-planting process and to ensure that the end face of the top of the dam has a certain degree of flatness after the solder is applied. However, this application uses a machined frame 5 instead of the electroplated dam, which not only shortens the processing cycle but also allows the use of a lower-priced lead-tin alloy as solder at the welding point, thereby reducing processing costs to a certain extent.

[0044] In this embodiment, preferably, the welding plating layer 22 is annular, and its width along its radial direction is d; correspondingly, the width of the end face of the bottom of the frame 5 in its radial direction is also d. d is not less than 0.3 mm. More preferably, d is 0.3 mm to 0.5 mm; for example, the width of the welding plating layer 22 along its radial direction is 0.3 mm, 0.35 mm, 0.4 mm, 0.45 mm, etc. This ensures sufficient welding area between the bottom of the frame 5 and the welding plating layer 22 to guarantee welding strength.

[0045] In this embodiment, preferably, both the circuit plating layer 21 and the solder plating layer 22 have a predetermined thickness along the thickness direction of the ceramic substrate 1. The thickness of the circuit plating layer 21 is from 35μm to 100μm, for example, 40μm, 45μm, 50μm, 55μm, 60μm, 65μm, 70μm, 75μm, 80μm, 85μm, 90μm, etc. The thickness of the solder plating layer 22 is less than the thickness of the circuit plating layer 21, but the thickness of the solder plating layer 22 is from 10μm to 35μm, for example, 15μm, 20μm, 25μm, 30μm, etc. This, to a certain extent, prevents solder from overflowing into the circuit plating layer 21 when the solder plating layer 22 is soldered to the frame 5.

[0046] In this embodiment, preferably, the solder resist layer 23 also has a predetermined thickness in the thickness direction of the ceramic substrate 1, and the thickness of the solder resist layer 23 is 20μm to 40μm; for example, the thickness of the solder resist layer 23 is 25μm, 30μm, 35μm, etc. Thus, the solder resist layer 23 effectively prevents solder overflow.

[0047] In one embodiment of this application, preferably, a BGA (Ball Grid Array Package) layer is further provided on the bottom metal layer 3 on one side of the second surface of the ceramic substrate 1. The SIP RF module is soldered to the circuit board through the BGA layer 4 to achieve mechanical fixation and electrical connection with the circuit board.

[0048] In this embodiment, preferably, both the frame 5 and the cover plate 6 are made of Kovar material, which gives the frame 5 and the cover plate 6 good weldability and machinability, as well as high strength and toughness, to ensure the sealing and electrical performance stability of the SIP RF module package.

[0049] In this embodiment, preferably, the surfaces of the frame 5 and the cover plate 6 are both plated with a nickel-gold layer; that is, the surfaces of the two are plated with a nickel film layer and a gold film layer from the inside out in sequence; the nickel film layer serves as a weld-resistant corrosion-resistant layer for welding, and the gold film layer serves as a weldable layer and a protective layer to prevent metal oxidation.

[0050] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this utility model, and are not intended to limit it. Although the utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this utility model.

Claims

1. A DPC-based SIP radio frequency module, characterized in that, Includes ceramic substrate and frame; One side surface of the ceramic substrate is a first surface, and a chip arrangement metal layer is formed on the first surface of the ceramic substrate. The chip arrangement metal layer includes a circuit plating layer and a solder plating layer surrounding the outside of the circuit plating layer. The thickness of the solder plating layer is less than the thickness of the circuit plating layer, and a solder resist layer is provided on the circuit plating layer, which is surrounding the peripheral edge of the circuit plating layer. One end of the frame is the bottom end, and a recessed platform is formed on the inner side of the bottom end of the frame. The end face of the bottom end of the frame is opposite to and welded to the welding plating layer, and the solder resist layer extends into the recessed platform.

2. The DPC-based SIP RF module according to claim 1, characterized in that, It also includes a cover plate; The end of the enclosure away from the first surface is the top end. The cover plate is welded to the top end of the enclosure to seal the top end of the enclosure. A protrusion is formed on the side of the cover plate facing the enclosure, and the protrusion extends into the enclosure.

3. The DPC-based SIP RF module according to claim 1, characterized in that, The bottom end face of the frame is welded to the welding plating layer using a lead-tin alloy as solder.

4. The DPC-based SIP RF module according to claim 2, characterized in that, The top end face of the frame and the cover plate are welded together using lead-tin alloy as solder and by parallel seam welding.

5. The DPC-based SIP RF module according to claim 1, characterized in that, The width of the welding coating is 0.3 mm to 0.5 mm.

6. The DPC-based SIP RF module according to claim 1, characterized in that, The thickness of the circuit plating layer is 35μm to 100μm; The thickness of the welding coating is 10 μm to 35 μm.

7. The DPC-based SIP RF module according to claim 1, characterized in that, The thickness of the solder resist layer is 20 μm to 40 μm.

8. The DPC-based SIP RF module according to claim 1, characterized in that, The surface of the ceramic substrate facing away from the frame is the second surface, and a bottom metal layer and a BGA layer are sequentially disposed on the second surface of the ceramic substrate.

9. The DPC-based SIP RF module according to claim 2, characterized in that, The enclosure is a Kovar enclosure; the cover plate is a Kovar cover plate.

10. The DPC-based SIP RF module according to claim 2, characterized in that, Both the frame and the cover plate are plated with a nickel-gold layer.

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