A chip package structure

Abstract

The embodiment of the application provides a chip packaging structure, the MOSFET and the control chip are combined and sealed, the space occupied by the two independent components is integrated into a relatively compact packaging structure, when designing a PCB, a larger interval and space need not be reserved for the two independent components, and the overall use area of the PCB can be significantly reduced.

Description

Technical Field

[0001] This application belongs to the field of semiconductor technology, and in particular relates to a chip packaging structure. Background Technology

[0002] In lithium battery applications, battery protection is crucial. Currently, lithium battery protection systems commonly employ a method where MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) and control chips are procured separately, soldered onto PCBs (Printed Circuit Boards), and connected separately. This traditional approach has several drawbacks. From a PCB area perspective, MOSFETs and control chips, as two independent components, require separate space on the PCB, resulting in a larger overall PCB area requirement. For space-constrained electronic devices such as smartphones and wearable devices, a large PCB area not only limits miniaturization but can also lead to more complex internal layouts, increasing design and manufacturing difficulties. Regarding MOSFET cracking, MOSFETs are subjected to stress during soldering and are susceptible to vibration and temperature changes during actual use. Individual MOSFETs lack sufficient physical support, making them prone to cracking under these external forces. Once a MOSFET cracks, it severely affects the normal operation of the battery protection circuit and may even cause short circuits, overcharging, and over-discharging, significantly reducing the reliability and stability of the lithium battery system. Furthermore, this separate procurement and assembly model lengthens the supply chain. This involves multiple stages such as the procurement, transportation, and storage of two different components, increasing management costs and potential risks, such as supply delays and component compatibility issues. In summary, the existing lithium battery protection circuit, which separates the MOSFET and the control chip, has significant shortcomings in terms of PCB footprint, MOSFET reliability, and supply chain management, and urgently needs improvement. Summary of the Invention

[0003] To solve or alleviate the above-mentioned technical problems, embodiments of this application provide a chip packaging structure, including a control chip and a MOSFET;

[0004] The control chip is disposed above the MOSFET, the output terminal of the control chip is connected to the gate of the MOSFET, and the source of the MOSFET is connected to the pin.

[0005] The control chip and the MOSFET are encapsulated in a plastic package.

[0006] The molding compound has a groove containing a conductive material. The input terminal of the control chip is connected to the conductive material in the groove via a conductive wire. The end of the groove furthest from the control chip is connected to the power input terminal.

[0007] In a preferred embodiment of this application, the control chip is an MCU.

[0008] In a preferred embodiment of this application, the gate of the MOSFET is disposed on the side away from the control chip, and the output terminal of the control chip is disposed at a position corresponding to the gate.

[0009] In a preferred embodiment of this application, the source of the MOSFET is disposed on the side away from the control chip, and the drain of the MOSFET is not brought out.

[0010] Compared with the prior art, this application proposes to package the MOSFET and the control chip together. The space originally occupied by the two independent components is integrated into a relatively compact package structure. When designing the PCB, there is no need to reserve a large gap and space for the two independent components, which can significantly reduce the overall area used by the PCB. Attached Figure Description

[0011] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. Some specific embodiments of this application will be described in detail below with reference to the accompanying drawings in an exemplary and non-limiting manner. The same reference numerals in the drawings designate the same or similar parts or components. Those skilled in the art should understand that these drawings are not necessarily drawn to scale. In the drawings:

[0012] Figure 1 This is a schematic diagram of the back of a chip packaging structure provided in an embodiment of this application;

[0013] Figure 2 yes Figure 1 A schematic diagram of the cross-section after cutting at point 4 (cutting line);

[0014] Figure 3 yes Figure 1 A schematic diagram of the cross-section after cutting at point 5;

[0015] Figure 4 This is a front view of a chip packaging structure provided in an embodiment of this application. Detailed Implementation

[0016] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are merely some, not all, of the embodiments of the present application. All other embodiments obtained by those skilled in the art based on the embodiments of the present application without creative effort should fall within the scope of protection of the present application.

[0017] like Figure 1 and Figure 2 As shown, this application embodiment provides a chip packaging structure, including a control chip 3 and a MOSFET 2;

[0018] The control chip 3 is disposed above the MOSFET 2. The output terminal of the control chip 3 is connected to the gates G1 and G2 of the MOSFET. The sources S1 and S2 of the MOSFET 2 and the gates G1 and G2 of the MOSFET are connected to the pins of the metal pad 1.

[0019] The control chip 3, the MOSFET 2, and the metal pad 1 are encapsulated by the plastic package 8;

[0020] like Figure 3 As shown, a groove 9 is provided in the molding compound 8, and a conductive material is provided in the groove 9. The input terminal of the control chip 3 is connected to the conductive material in the groove 9 through a conductive line. The end of the groove 9 away from the control chip 2 is connected to the VSS voltage port.

[0021] In this embodiment, the MOSFET 2 and the control chip 3 are packaged together. The space originally occupied by the two independent components is integrated into a relatively compact package structure. When designing the PCB, there is no need to reserve a large gap and space for the two independent components, which can significantly reduce the overall area used by the PCB.

[0022] In a preferred embodiment of this application, the control chip 3 is an MCU. MCU stands for Microcontroller Unit.

[0023] In a preferred embodiment of this application, the gates G1 and G2 of the MOSFET 2 are disposed on the side away from the control chip 3, and the output terminal of the control chip 3 is disposed at a position corresponding to the gates G1 and G2.

[0024] In a preferred embodiment of this application, the source terminals S1 and S2 of the MOSFET 2 are disposed on the side away from the control chip 3, and the drain terminal of the MOSFET 2 is not brought out.

[0025] like Figure 4As shown, the input terminal 6 of the control chip 3 is connected to the monitoring pin VM, the input power supply VDD, and the voltage port VSS. The output terminal 7 of the control chip 3 is connected to the gates G1 and G2 of the MOSFET 2, respectively. The gates G1 and G2 of the MOSFET 2 are connected to the control input terminals OD and OC, respectively.

[0026] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A chip packaging structure, characterized in that, Including control chips and MOSFETs; The control chip is positioned above the MOSFET, and the output terminal of the control chip is connected to the gate of the MOSFET. Both the source and gate of the MOSFET are connected to pins. The control chip and the MOSFET are encapsulated in a plastic package. The molding compound has a groove containing a conductive material. The input terminal of the control chip is connected to the conductive material in the groove, and the end of the groove away from the control chip is connected to the power input terminal.

2. The chip packaging structure as described in claim 1, characterized in that, The control chip is an MCU.

3. The chip packaging structure as described in claim 1, characterized in that, The gate of the MOSFET is located on the side away from the control chip, and the output terminal of the control chip is located at the position corresponding to the gate.

4. The chip packaging structure as described in claim 1, characterized in that, The source of the MOSFET is located on the side away from the control chip, and the drain of the MOSFET is not brought out.

Images