Blister packaging for improving the placement rate of PCB circuit boards

Abstract

The utility model discloses a kind of blister packaging of improving PCB circuit board placement rate, it includes integrally-formed blister shell, multiple downward extension accommodating cavities are equipped on the upper end surface of blister shell, the inner wall of accommodating cavity is around and is equipped with the convex platform of supporting circuit board, and first boss is equipped in accommodating cavity inner chamber and corresponds electrolytic capacitor on circuit board;To reduce the first interval after the superposition of two adjacent blister shell. By the setting of convex platform and first boss, to reduce the first interval between blister shell after placing circuit board, with total height 230mm as an example, blister shell without first boss can only be placed to 13 layers, while blister shell with first boss can be placed to 18 layers, so that packaging volume rate increases 38.4%.

Description

TECHNICAL FIELD

[0001] The utility model relates to the packaging field technology especially is a kind of blister packaging for improving the placement rate of PCB circuit board. BACKGROUND

[0002] The blister packaging of circuit board (PCB) is a common packaging method, which uses blister technology to wrap the circuit board in a plastic shell to provide protection and fixation.

[0003] However, the conventional design of the traditional circuit board blister packaging does not avoid the height space of high-volume electronic components (such as connectors and electrolytic capacitors), resulting in a limited number of blister shells and products that can be stacked within the same outer box volume. SUMMARY

[0004] Therefore, the utility model provides a kind of blister packaging for improving the placement rate of PCB circuit board, which reduces the height of the blister by designing the height space of PCB finger grabbing position to avoid high-volume electronic components (such as connectors and electrolytic capacitors), thereby allowing more blister shells and products to be stacked within the same outer box volume.

[0005] To achieve the above-mentioned purpose, the utility model adopts the following technical solutions: a kind of blister packaging for improving the placement rate of PCB circuit board, comprising an integrated blister shell, a plurality of downward extending accommodation cavities are provided on the upper end face of the blister shell, a convex platform for supporting circuit board A is provided around the inner wall of the accommodation cavity, and a first boss corresponding to the electrolytic capacitor on the circuit board A is provided in the inner cavity of the accommodation cavity; to reduce the first interval of two adjacent blister shells after stacking.

[0006] Further, the convex platform includes a second boss supporting the side edge of the circuit board A and a third boss accommodating the connector on the circuit board A.

[0007] Further, the upper ends of the first boss, the second boss and the third boss are parallel, and the second boss and the third boss are connected.

[0008] Further, a first cut-off between two adjacent accommodation cavities is provided to communicate with each other, and the first and second cut-offs are provided in parallel corresponding to the first cut-off.

[0009] Further, a reinforcing rib is provided in the first cut-off.

[0010] Further, the second boss is divided into a first part connected with the third boss and a second part separated from the first part by the first and / or second cut-offs.

[0011] Further, the first part has two and is separated, and one of them is connected with the third boss, and the second part has two and is separated from each other.

[0012] Further, the first part and the third boss are connected head to tail, and the second part has two and is separated from each other.

[0013] Further, the first boss is not less than two, and one is located in the middle of the accommodating cavity and corresponds to the first and second cutouts, and the other is located between the first part or between the second part.

[0014] Further, the inner cavity of the accommodating cavity is further provided with a plurality of concave pressing holes.

[0015] The utility model has obvious advantages and beneficial effects compared with prior art, specifically speaking, according to the above technical scheme, by the setting of the convex platform and the first boss, the first spacing between the blister shell after placing the circuit board A is reduced, taking the total height 230mm as an example, the blister shell without the first boss can only be placed to 13 layers, and the blister shell with the first boss can be placed to 18 layers, so that the packaging volume rate is increased by 38.4%.

[0016] In order to more clearly set forth the structural features and functions of the utility model, the utility model will be described in detail below in combination with the drawings and specific embodiments. BRIEF DESCRIPTION OF DRAWINGS

[0017] Fig. 1 It is the plane display diagram of embodiment 1 of the utility model.

[0018] Fig. 2 It is the cross-sectional view of a plurality of blister shells after superposition of embodiment 1 of the utility model.

[0019] Fig. 3 It is the height contrast display diagram of the blister shell layer of embodiment 1 of the utility model.

[0020] Explanation of figure mark:

[0021] Circuit board A;

[0022] First spacing 1;

[0023] Blister shell 10, accommodating cavity 20, convex platform 21, second boss 211, first part 2111, second part 2112, third boss 212, first boss 22, first cutout 23, second cutout 24, reinforcing rib 25, pressing hole 26. DETAILED DESCRIPTION

[0024] Please refer to Figs. 1-3As shown, it illustrates the specific structure of a preferred first embodiment of the present invention, which is a blister packaging for improving the placement rate of PCB circuit boards. It includes an integrally formed blister shell 10, with multiple downwardly extending receiving cavities 20 on the upper surface of the blister shell 10. The inner wall of each receiving cavity 20 is surrounded by a convex platform 21 that supports a circuit board A, and a first boss 22 located within the receiving cavity 20 and corresponding to an electrolytic capacitor on the circuit board A; this reduces the first distance 1 between two adjacent blister shells 10 after stacking. The convex platform 21 and the first boss 22 reduce the first distance 1 between the blister shells 10 after placing the circuit board A, as shown... Fig. 3 As shown, taking a total height of 230mm as an example, the blister shell 10 without the first protrusion 22 can only be placed up to 13 layers, while the blister shell 10 with the first protrusion 22 can be placed up to 18 layers, increasing the packaging volume ratio by 38.4%.

[0025] It should be noted that the first protrusion 22 is a space for the electrolytic capacitor to avoid gaps.

[0026] For example, the convex platform 21 includes a second boss 211 supporting the side of the circuit board A and a third boss 212 accommodating a connector on the circuit board A. The third boss 212 serves as a connector clearance on the circuit board A. When it cooperates with the first boss 22, the height of the blister shell 10 without the first boss 22 and the third boss 212 is 24 mm, while the height of the blister shell 10 with the first boss 22 and the third boss 212 is 19 mm, thereby increasing the blister stack to 18 layers and increasing the packaging volume ratio by 38.4%.

[0027] For example, the upper ends of the first protrusion 22, the second protrusion 211, and the third protrusion 212 are parallel, and the second protrusion 211 and the third protrusion 212 are connected. The flush first protrusion 22, the second protrusion 211, and the third protrusion 212 can make the circuit board A placed therein more stable, so as to enhance the wrapping performance of the two adjacent adsorption shells 10 after being stacked.

[0028] For example, two adjacent accommodating cavities 20 are connected by a first segment 23, and the first and last parts of multiple accommodating cavities 20 connected by the first segment 23 are also connected by a second segment 24 parallel to and corresponding to the first segment 23. The first segment 23 and the second segment 24 can be used as finger gripping positions to facilitate the operator to remove the circuit board A from the accommodating cavity 20.

[0029] For example, a reinforcing rib 25 is provided in the first cut 23. The reinforcing rib 25 is mainly used to separate the first cut 23 to prevent electrical components on the circuit board A in any accommodating cavity 20 from falling into other accommodating cavities 20 through the first cut 23 and causing the fallen electrical components to collide with electrical components on the circuit board A in other accommodating cavities 20 during transportation.

[0030] For example, the second boss 211 is divided into a first part 2111 connected to the third boss 212 and a second part 2112 separated from the first part 2111 by the first cut 23 and / or the second cut 24. By dividing the second boss 211 by the first cut 23 and / or the second cut 24, the amount of material used for the second boss 211 is reduced, and the circuit board A is specifically supported, thereby enhancing the stability of the circuit board A placed on the second boss 211.

[0031] The first part 2111 has two parts that are separated from each other, and one of them is connected to the third boss 212. The second part 2112 has two parts that are separated from each other.

[0032] The first part 2111 and the third boss 212 are connected end to end, and the second part 2112 has two parts that are separated from each other.

[0033] There are at least two first protrusions 22, one of which is located in the middle of the accommodating cavity 20 and corresponds to the first cut-out 23 and the second cut-out 24, and the other is located between the first portions 2111 or between the second portions 2112.

[0034] The inner cavity of the receiving cavity 20 is also provided with multiple recessed pressure holes 26.

[0035] It should be noted that the distance between the upper surface of the convex platform 21 and the upper surface of the blister housing 10 is 8.5mm. When the circuit board A is placed face up on the convex platform 21, there is a 0.5mm gap between the edge of the circuit board A and the inner wall of the accommodating cavity 20. The distance between the bottom end of the accommodating cavity 20 and the upper end of the convex platform 21 is 5mm. The distance between the bottom end of the pressing hole 26 and the bottom end of the accommodating cavity 20 is 5.5mm. The first cut 23 and the second cut 24 are parallel to the bottom end of the accommodating cavity 20. At this time, the total height is 19mm. After stacking 18 layers in the same direction, the layer height is 227, which is still lower than the above-mentioned limit of 230mm for the total height.

[0036] The above description is merely a preferred embodiment of the present utility model and does not constitute any limitation on the technical scope of the present utility model. Therefore, any minor modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present utility model shall still fall within the scope of the technical solution of the present utility model.

Claims

1. A blister packaging for improving PCB board placement rate, comprising an integrally formed blister shell (10), wherein the upper surface of the blister shell (10) is provided with a plurality of downwardly extending receiving cavities (20), characterized in that: The inner wall of the accommodating cavity (20) is surrounded by a convex platform (21) that can support the circuit board (A), and a first boss (22) located in the inner cavity of the accommodating cavity (20) and corresponding to the electrolytic capacitor on the circuit board (A); so as to reduce the first gap (1) after the two adjacent blister shells (10) are stacked.

2. The blister packaging for improving PCB circuit board placement rate according to claim 1, characterized in that: The convex platform (21) includes a second boss (211) supporting the side of the circuit board (A) and a third boss (212) accommodating the connector on the circuit board (A).

3. The blister packaging for improving PCB circuit board placement rate according to claim 2, characterized in that: The upper ends of the first protrusion (22), the second protrusion (211) and the third protrusion (212) are parallel, and the second protrusion (211) and the third protrusion (212) are connected.

4. The blister packaging for improving PCB circuit board placement rate according to claim 2, characterized in that: Two adjacent accommodating cavities (20) are connected by a first segment (23), and the first and last parts of multiple accommodating cavities (20) connected by the first segment (23) are also connected by a second segment (24) that is parallel to and corresponds to the first segment (23).

5. The blister packaging for improving PCB circuit board placement rate according to claim 4, characterized in that: The first cut (23) is provided with a reinforcing rib (25).

6. The blister packaging for improving PCB circuit board placement rate according to claim 4, characterized in that: The second boss (211) is divided by the first cut (23) and / or the second cut (24) into a first part (2111) connected to the third boss (212) and a second part (2112) separated from the first part (2111).

7. A blister packaging method for improving PCB circuit board placement rate according to claim 6, characterized in that: The first part (2111) has two and is separated, and one of them is connected to the third boss (212). The second part (2112) has two and is separated from each other.

8. A blister packaging method for improving PCB circuit board placement rate according to claim 6, characterized in that: The first part (2111) and the third boss (212) are connected end to end, and the second part (2112) has two and is separated from each other.

9. A blister packaging method for improving PCB circuit board placement rate according to claim 6, characterized in that: There are at least two first protrusions (22), one of which is located in the middle of the accommodating cavity (20) and corresponds to the first cut-out (23) and the second cut-out (24), and the other is located between the first part (2111) or between the second part (2112).

10. A blister packaging method for improving PCB circuit board placement rate according to claim 1, characterized in that: The cavity (20) is also provided with a plurality of recessed pressure holes (26).

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