Chip testing board and chip testing system
By using a double-layer circuit board structure, the second circuit board expands the contact spacing of the first circuit board and shares the test circuit, solving the problem of high processing difficulty of miniaturized chip test boards and achieving the effects of simplified processing and reduced transmission loss.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- HUAWEI TECH CO LTD
- Filing Date
- 2025-03-13
- Publication Date
- 2026-06-16
Smart Images
Figure CN224366138U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of chip testing, specifically to a chip test board and a chip test system. Background Technology
[0002] As chips in consumer electronics become increasingly smaller, wafer-level chip-scale packaging (WLCSP) will be more and more widely used in chip products. Due to the high complexity of chips, they need to be tested before leaving the factory to ensure functional integrity and reliability. Therefore, to meet the demands of mass production testing and chip testing boards, testing environments and chip test boards need further improvement to satisfy the ever-evolving needs of the chip industry.
[0003] As chips become increasingly miniaturized, the pin pitch is shrinking. This makes the fabrication of test boards for chip testing increasingly challenging. For example, fabricating a large number of high-density test pins and mounting test components on the test board becomes particularly difficult. Therefore, there is a need to develop a new type of test board to meet the testing requirements of miniaturized chips. Utility Model Content
[0004] This application provides a chip test board and a chip test system to reduce the processing difficulty of the chip test board and meet the testing requirements of small-pitch pin chips.
[0005] In a first aspect, this application provides a chip test board, comprising: a first circuit board and a second circuit board. A first contact is provided on one side surface of the first circuit board. The second circuit board is disposed on one side of the first circuit board, and includes a first surface and a second surface. The first surface is disposed close to the first circuit board, and the second surface is disposed away from the first circuit board. A second contact is provided on the first surface of the second circuit board for electrical connection with the first contact; a third contact is provided on the second surface of the second circuit board for connecting to the chip under test.
[0006] The second and third contacts are electrically connected within the second circuit board, and the density of the second contacts is less than that of the third contacts.
[0007] The chip test board of this application comprises two circuit boards. The first circuit board connects to a chip testing machine and establishes a signal connection between them. The second circuit board connects the first circuit board and the chip under test (DUT). Second contacts connect to the first circuit board to enable conductivity between the first and second circuit boards. A third contact connects to the DUT to enable conductivity between the second circuit board and the DUT. The second and third contacts on opposite sides of the second circuit board have different densities; the density of the third contacts connected to the DUT is greater than the density of the second contacts connected to the first circuit board. Therefore, by reducing the density of the second contacts, the spacing between at least some of the second contacts can be increased, thereby increasing the spacing between the first contacts on the first circuit board used for connecting to the second circuit board. While increasing the spacing of the first contacts on the first circuit board through the second circuit board, the second circuit board also reduces the processing difficulty of the first contacts on the first circuit board by sharing some of the contact setup, and facilitates the installation of various test components on the first circuit board.
[0008] The first contact, the second contact, and the third contact can all be pins, serving as external connection points for the first circuit board and the second circuit board.
[0009] In one possible implementation, the area of the connection region formed by the second contact is larger than the area of the connection region formed by the third contact. The number of second and third contacts can be the same or different. When the number of second and third contacts is different, the number of third contacts can be greater than the number of second contacts. When the number of second and third contacts is the same and the area of the connection region formed by the second contacts is larger, the spacing between the second contacts will be increased. Since the first contacts of the first circuit board are connected to each other, the spacing between the first contacts can also be set relatively large, thereby reducing the processing difficulty of the first connecting board. When the number of second contacts is less than the number of third contacts, the area of the connection region of the second contacts is larger than the area of the connection region of the third contacts, which can further increase the spacing between the second contacts.
[0010] In one possible implementation, the spacing between the second contacts is greater than the spacing between the third contacts. For example, in one possible implementation, the spacing between the second contacts is 0.6-1.2 mm, and the spacing between the third contacts is 0.1-0.5 mm. The third contact is used to connect to the chip under test (DUT), and the test contacts of the DUT are located on the surface of the DUT facing the second circuit board. As the DUT becomes increasingly miniaturized and integrated, the contact density of the DUT is higher, and the spacing is smaller, such as less than 0.5 mm, less than 0.4 mm, or less than 0.35 mm. If small-pitch pins, i.e., small-pitch first contacts, are directly fabricated on the first circuit board, the small spacing of the first contacts would severely affect the installation of various test components, such as capacitors, resistors, diodes, and transistors, since these need to be fabricated on the first circuit board. Therefore, by using the second circuit board as an intermediate bridging circuit board, the pin spacing is enlarged, making the spacing between the second and third contacts greater than the spacing between the third contacts. The first contact and the second contact are connected in a one-to-one correspondence, which allows the spacing between the first contacts to be increased, thus facilitating the processing and manufacturing of the first circuit board.
[0011] In one possible implementation, a first connecting plate is provided between the first circuit board and the second circuit board. A first conductor is provided within the first connecting plate, with both ends of the first conductor extending beyond the side surfaces of the first connecting plate, respectively for connection to a first contact and a second contact. To achieve a stable connection between the first circuit board and the second circuit board, the chip test board may further include the first connecting plate disposed between the first and second circuit boards. The first conductor within the first connecting plate must extend beyond the side surfaces of the first connecting plate, with one end of the first conductor connected to the first contact and the other end connected to the second contact. The number of first conductors can be set according to the number of first contacts and second contacts. Multiple first conductors are insulated from each other.
[0012] The first connecting plate is a rigid plate, capable of withstanding the weight of the second circuit board and the locking force of the chip test board during assembly without bending or deforming. A first conductor is embedded within the first connecting plate to enable conductivity between the first and second circuit boards. The first conductor can be a straight conductor, extending linearly along the thickness direction of the first connecting plate to reduce transmission loss.
[0013] For example, in one possible implementation, the first conductor is a needle-shaped conductor. The end of the needle-shaped conductor is pointed and small in size, enabling it to connect with the first contact and the second contact.
[0014] In one possible implementation, a second connecting plate is provided on one side of the second surface of the second circuit board. A second conductor is provided within the second connecting plate, with both ends of the second conductor extending out from the two side surfaces of the second connecting plate, respectively for connection to a third contact and a contact of the chip under test (DUT). To achieve a stable connection between the second circuit board and the DUT, the second connecting plate is provided on the side of the second circuit board facing away from the first circuit board. Both ends of the second conductor within the second connecting plate must protrude from the second connecting plate. One end of the second conductor is connected to the third contact of the second circuit board. The other end of the second conductor is connected to a contact of the DUT.
[0015] The second connecting board is a rigid board that can withstand the weight of the chip and the locking force of the chip test board during assembly without bending or deforming. A second conductor is embedded inside the second connecting board to enable conductivity between the second circuit board and the chip under test. The second conductor can be a straight conductor, extending linearly along the thickness direction of the second connecting board to reduce transmission loss.
[0016] For example, in one possible implementation, the second conductor is a needle-shaped conductor. The end of the needle-shaped conductor is pointed. It is small in size, enabling mating with the third contact and the chip under test.
[0017] In one possible implementation, a transmission line is provided within the second circuit board, and second and third contacts are connected to the transmission line. The transmission line forms both a transmission circuit and a test circuit. By placing the transmission line within the second circuit board, the spacing between the second and third contacts can be varied. For example, the transmission line within the second circuit board can be a curved line. The transmission line within the second circuit board can form both the transmission circuit and the test circuit. The transmission circuit is used to connect the second and third contacts. The test circuit can be placed within the second circuit board to perform a functional test on the chip under test, and can form a high-speed signal test circuit. By forming the test circuit within the second circuit board, the number of test circuits in the first circuit board can be reduced, thereby reducing the number of first contacts in the second circuit board and alleviating the processing burden and difficulty of the first circuit board. After setting the test circuit on the second circuit board, the shorter distance between the second circuit board and the chip under test further helps to reduce test losses.
[0018] Secondly, this application provides a chip testing system, which includes a chip testing machine and a chip testing board of this application. The chip testing board is disposed on the chip testing machine, and the chip testing machine is electrically connected to a first circuit board.
[0019] The chip testing system of this application includes the chip testing board of this application. Therefore, the chip testing system of this application has all the advantages of the chip testing board of this application, which will not be repeated here.
[0020] In this application, the data in the various possible implementations described above, such as the distance between the first contact and the distance between the second contact, should be understood as falling within the range defined in this application, provided that the data falls within the engineering measurement error range. Attached Figure Description
[0021] Figure 1 A schematic cross-sectional view of a chip test board provided in an embodiment of this application;
[0022] Figure 2 This is a schematic diagram of the top surface of a second circuit board according to one embodiment;
[0023] Figure 3 This is a schematic diagram of the back side structure of a second circuit board according to one embodiment;
[0024] Figure 4 This is a schematic diagram of the structure of a chip test board provided in an embodiment of this application.
[0025] Figure label:
[0026] 01-Chip test board; 11-First circuit board; 111-First contact;
[0027] 12-Second circuit board; 121-Second contact; 122-Third contact; 123-Transmission line;
[0028] 13-First connecting plate; 131-First conductor;
[0029] 14-Second connecting plate; 141-Second conductor;
[0030] 15-Chip under test; 151-Chip contact; 16-Fixing frame; 161-Locking component;
[0031] C1 / C2 / C3 / C4 - Grooves. Detailed Implementation
[0032] To make the objectives, technical solutions, and advantages of this application clearer, the application will now be described in further detail with reference to the accompanying drawings.
[0033] The terminology used in the following embodiments is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. As used in the specification and appended claims of this application, the singular expressions “a,” “an,” “the,” “the,” and “this” are intended to also include expressions such as “one or more,” unless the context clearly indicates otherwise.
[0034] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.
[0035] In the mass production of chips, chip quality inspection plays a crucial role. Typically, chips are tested during production. Chip testing systems usually consist of a testing machine and a test circuit board mounted on the machine. During testing, the chip under test (DUT) is placed on the test circuit board, and the testing machine applies signals to the board to test whether the internal circuitry of the chip functions correctly. With the miniaturization and integration of chips, chip pins are gradually decreasing in size; for example, pin spacing can be less than 0.2mm. The test pins of the test circuit board also need to be improved accordingly. However, because the test circuit board needs to test various chip functions, it requires multiple test circuits. If the chip pins are too small, the fabrication of the test pins and the placement of various test components, such as resistors, capacitors, inductors, diodes, and transistors, become more difficult when manufacturing the test circuits on the test circuit board. Therefore, to adapt to the testing of miniaturized chips, a new type of chip test board needs to be developed to meet the demands of chip development.
[0036] Figure 1 This is a schematic diagram of the structure of a chip test board according to one embodiment of this application. Figure 1 As shown, the chip test board of this embodiment may include a first circuit board 11 and a second circuit board 12. The first circuit board 11 and the second circuit board 12 are in... Figure 1 The circuit boards are stacked vertically as shown. The first circuit board 11 is located at the bottom and is used for connection to the chip testing equipment. The second circuit board 12 is located above the first circuit board 11 and is used for connection to the chip under test 15. The first circuit board 11 and the second circuit board 12 are electrically connected to achieve the testing of the chip under test 15 by using the combination of the first circuit board 11 and the second circuit board 12.
[0037] When testing the chip 15 under test, the required tests may include high-speed signal testing and ordinary signal testing. Ordinary signals may include analog signals other than high-speed signals, low-speed signals, and power signals.
[0038] The positional relationships described below, such as "up" and "down" indicating directional positions, will be represented by... Figure 1 The positional relationships shown are explained.
[0039] Reference Figure 1 Signal input ports and signal output ports can be provided on the lower surface or peripheral side of the first circuit board 11, and the signal input ports and signal output ports can be used to connect to the test machine.
[0040] The upper surface of the first circuit board 11 is provided with a first contact 111. The first contact 111 can be a solder ball or a first connection pin. The first connection pin is a metal pin, such as a copper pin, to achieve electrical connection with the second circuit board 12. There are multiple first contacts 111.
[0041] The first circuit board 11 contains test circuits, such as analog signal test circuits, low-speed signal test circuits, and power signal test circuits. The first circuit board 11 can be used to check whether the analog signal function, low-speed signal function, and power signal function of the chip under test 15 are normal.
[0042] Continue to refer to Figure 1 The second circuit board 12 includes a first surface and a second surface. The first surface is the lower surface of the second circuit board 12. The second surface is the upper surface of the second circuit board 12. The first surface is disposed close to the first circuit board 11, and the second surface is disposed away from the first circuit board 11.
[0043] The second circuit board 12 has a second contact 121 on its first surface. The second contact 121 is used for electrical connection with the first contact 111. The second surface of the second circuit board 12 also has a third contact 122, which is used to connect to the chip under test 15 and can be connected to the chip contact 151. The second contact 121 can be a solder ball or a second connection pin. The third contact 122 can also be a solder ball or a third connection pin. Both the second and third connection pins are metal pins, such as copper pins.
[0044] The second contact 121 and the third contact 122 are electrically connected within the second circuit board 12. For example, a transmission line 123 may be provided within the second circuit board 12, and the second contact 121 and the third contact 122 are connected to the transmission line 123. The two ends of the transmission line 123 may extend from the second surface and the third surface of the second circuit board 12, respectively, to form a second connection pin and a third connection pin.
[0045] The transmission line 123 in the second circuit can be a transmission circuit formed within the second circuit board 12 to achieve conduction between the second contact 121 and the third contact 122. The density of the second contact 121 is less than the density of the third contact 122. There are multiple second contacts 121 and multiple third contacts 122. When the density of the third contact 122 connected to the chip under test 15 is greater than the density of the second contact 121 connected to the first circuit board 11, the spacing between at least some of the second contacts 121 is greater than the spacing between the third contacts 122. That is, the second circuit board 12 can achieve at least a partial change in the connection pin spacing. Since the second contacts 121 of the second circuit board 12 are used to connect to the first contacts 111 of the first circuit board 11, increasing the spacing of the second contacts 121 can increase the spacing of the first contacts 111 of the first circuit board 11, thereby reducing the processing difficulty of the first circuit board 11 and facilitating the installation of various test components in the first circuit board 11.
[0046] In another embodiment, the area of the connection region formed by the second contact 121 is larger than the area of the connection region formed by the third contact 122. The number of second contacts 121 and the number of third contacts 122 can be the same or different. When the number of second contacts 121 and the number of third contacts 122 are different, the number of third contacts 122 can be more than the number of second contacts 121. When the number of second contacts 121 and the number of third contacts 122 are the same and the area of the connection region formed by the second contacts 121 is larger, the spacing between the second contacts 121 will be increased, and correspondingly, the spacing between the first contacts 111 in the first circuit board 11 will also increase, thereby reducing the processing difficulty of the first connecting plate 13. When the number of second contacts 121 and the number of third contacts 122 are different, for example, when the number of second contacts 121 is less than the number of third contacts 122, the area of the connection region of the second contacts 121 is larger than the area of the connection region of the third contacts 122, which can further increase the spacing of the second contacts 121.
[0047] In another embodiment, in the second circuit board 12, the spacing of the second contacts 121 on the second circuit board 12 is greater than the spacing of the third contacts 122. For example, the spacing of the second contacts 121 is 0.6-1.2 mm, and the spacing of the third contacts 122 is 0.1-0.5 mm. For instance, the spacing of the second contacts 121 could be 1.0 mm, and the spacing of the third contacts could be 0.5 mm. The second contacts 121 are used to connect to the chip under test (DUT) 15. As the DUT 15 becomes increasingly miniaturized and integrated, the density of the contacts on the DUT 15 is higher, and the spacing is smaller, such as less than 0.5 mm, less than 0.4 mm, or less than 0.35 mm. If the second circuit board 12 is not provided, and each contact of the DUT 15 is connected to the first circuit board 11, the spacing of each pin on the first circuit board 11 will also be synchronized with that of the DUT 15, thus affecting the installation of the various test components used in the test circuit. In this embodiment of the application, the pins are enlarged by using the second circuit board 12 as an intermediate bridging circuit board. That is, by increasing the spacing of the second contact 121, the spacing of the first contact 111 can be enlarged, so as to utilize the processing and manufacturing of the first circuit board 11.
[0048] Figure 2 This is a schematic diagram of the top surface of a second circuit board according to one embodiment. Figure 3 for Figure 2 A schematic diagram of the back side of the second circuit board shown. (As illustrated) Figure 2 As shown, the connection area of the third contact 122 on the top surface of the second circuit board 12, i.e., the second surface, is a square with an area of A and a side length of a. Figure 3 As shown, the connection area formed by the second contact 121 on the back side of the second circuit board 12, i.e., the first surface, is also square, with an area of B and a value of b. Here, side length a is less than side length b, and area A is less than area B. Figure 2 and Figure 3 As can be seen from the comparison, Figure 2 The density of the third contact 122 is significantly greater than that of the second contact 121.
[0049] Since the first contact 111 needs to connect with the second contact 121, the area of the connection region formed by the first contact 111 can be the same as the area of the connection region formed by the second contact 121. The spacing between the first contacts 111 can be the same as the spacing between the second contacts 121. The first contacts 111 and the second contacts 121 can be configured in a one-to-one correspondence.
[0050] To reduce the burden on the first circuit board 11, a test circuit, distinct from the test circuit in the first circuit board 11, can be provided in the second circuit board 12. This test circuit in the second circuit board 12 could be, for example, a high-speed signal test circuit, used to detect whether the high-speed signal function of the chip under test 15 is normal. Since the second circuit board 12 is directly connected to the chip under test 15, using the second circuit board 12 to detect the high-speed signal function of the chip under test 15 reduces the transmission distance and thus reduces transmission loss compared to using the first circuit board 11. The test circuit in the second circuit board 12 can also be formed by the transmission lines 123 within the second circuit board 12. Therefore, within the second circuit board 12, some transmission lines 123 can form a transmission circuit, and some can form a test circuit. Thus, the chip test board of this embodiment, while increasing the spacing of the first contacts 111 through the second circuit board 12, can also share some of the test circuit load through the second circuit board 12, thereby reducing the processing burden on the first circuit board 11 and further reducing the processing difficulty of the first circuit board 11.
[0051] Figure 4 This is an exploded view of a chip test board according to this application. (Refer to...) Figure 1 and Figure 4 In addition to the first circuit board 11 and the second circuit board 12, the chip test board 01 in this application embodiment may also include a first connecting board 13 and a second connecting board 14, as well as a fixing frame 16 for the chip under test 15.
[0052] Because the first circuit board 11 and the second circuit board 12 need to maintain a sufficiently high connection strength during the testing process to ensure the stability of the testing process, a first connecting plate 13 is provided between the first circuit board 11 and the second circuit board 12.
[0053] The first connecting plate 13 includes a plate body and a first conductor 131 disposed within the plate body. The plate body of the first connecting plate can be made of a rigid material and must be an insulating material. The plate body of the first connecting plate 13 is a rigid plate body, capable of withstanding the weight of the second circuit board 12 and the locking force of the chip test board during assembly without bending deformation. Exemplarily, its forming material includes, but is not limited to, polyethylene, polypropylene, polyvinyl chloride, polystyrene, polyvinyl alcohol, polyurethane, polyimide, or epoxy resin.
[0054] like Figure 1As shown, the first conductor 131 within the first connecting plate 13 extends vertically and is a straight conductor. The first conductor 131 can be inserted into the body of the first connecting plate 13, and the plate body of the first connecting plate 13 is used to fix the first conductor 131. Both ends of the first conductor 131 extend out from the side surfaces of the first connecting plate 13, respectively, and are used to connect to the first contact 111 and the second contact 121. One end of the first conductor 131 is connected to the first contact 111, and the other end is connected to the second contact 121. The number of first conductors 131 can be set according to the number of first contacts 111 and second contacts 121. Multiple first conductors 131 are insulated from each other.
[0055] The first conductor 131 is embedded inside the first connecting plate 13 to enable conductivity between the first circuit board 11 and the second circuit board 12. The first conductor 131 can be a straight conductor, extending linearly along the thickness direction of the first connecting plate 13 to reduce transmission loss. The first conductor 131 inserted into the plate can be a needle-type conductor. When the first conductor 131 is a needle-type conductor, the first connecting plate 13 can be called a first pin socket. The end of the needle-type conductor is pointed and small in size, allowing it to connect with the first contact 111 and the second contact 121.
[0056] The first conductor 131 may be a metallic conductor, and its material may be gold, silver, copper, or an alloy, etc.
[0057] Among them, continue to refer to Figure 1 The bottom and top surfaces of the first connecting plate 13 may be provided with grooves C1 and C2 of a certain depth, respectively. The groove C1 at the bottom of the first connecting plate 13 can be used to accommodate the first contact 111, i.e., the first connecting pin. The groove C2 at the top of the first connecting plate 13 can be used to accommodate the second contact 121, i.e., the second connecting pin.
[0058] In one embodiment, such as Figure 1 and Figure 4 As shown, the first connecting plate 13 can be a cuboid structure. The thickness of the first connecting plate 13 can be, for example, 2-4 mm. The central region of the first connecting plate 13 can be the area where the first conductor 131 is installed. The edge regions of the first connecting plate 13 can be the connection areas with the first circuit board 11 and the second connecting plate 14. The connection method between the first connecting plate 13 and the first circuit board 11 and the second circuit board 12 can be a detachable connection method, including but not limited to bolt connection, screw connection, plug-in connection, etc.
[0059] Among them, such as Figure 4As shown, the connection area of the first connecting plate 13 may be provided with positioning holes, and the first circuit board 11 may be provided with positioning components or locking components. During installation, the first connecting plate 13 and the first circuit board 11 can be positioned and connected through the positioning components or locking components and positioning holes. During the assembly process of the first connecting plate 13, to ensure the correct installation orientation of the first connecting plate 13 and the first circuit board 11, a foolproof marking may be provided in the connection area of the first connecting plate 13, and a foolproof structure may also be provided on the first circuit board 11.
[0060] In addition to the aforementioned connection structure, the first connecting plate 13 and the first circuit board 11 can be connected by welding. In the welding connection method, solder pads need to be provided at the connection points of the first connecting plate 13 and the first connecting plate 12. The solder pads in the first connecting plate 13 are spaced apart from the area where the first conductor 131 is located, i.e., insulated from the first conductor 131. The solder pads in the first circuit board 11 also need to be insulated from other conductive components. Welding connection can improve the connection strength between the first connecting plate 13 and the first circuit board 11 and the second circuit board 12, preventing shaking during transportation and assembly.
[0061] Similarly, in order to achieve a stable connection between the chip under test 15 and the second circuit board 12, a second connecting plate 14 can be provided on one side of the second surface of the second circuit board 12.
[0062] like Figure 1 As shown, the second connecting plate 14 includes a plate body and a second conductor 141 disposed within the plate body. The plate body of the second connecting plate can be made of a rigid material and must be an insulating material. The plate body of the second connecting plate 14 is a rigid plate body, capable of withstanding the weight of the second circuit board 12 and the locking force of the chip test board during assembly without bending deformation. Exemplarily, its forming material includes, but is not limited to, polyethylene, polypropylene, polyvinyl chloride, polystyrene, polyvinyl alcohol, polyurethane, polyimide, or epoxy resin.
[0063] The second conductor 141 within the second connecting plate 14 extends vertically and is a straight conductor. The second conductor 141 can be inserted into the body of the second connecting plate 14, and the plate body of the second connecting plate 14 is used to fix the second conductor 141. Both ends of the second conductor 141 extend out from the side surfaces of the second connecting plate 14, respectively, and are used to connect to the third contact 122 and the contact of the chip under test 15. Both ends of the second conductor 141 within the second connecting plate 14 must protrude from the second connecting plate 14. One end of the second conductor 141 is connected to the third contact 122 of the second circuit board 12. The other end of the second conductor 141 is connected to the contact of the chip under test 15.
[0064] The number of second conductors 141 can be set according to the number of contacts of the third contact 122 and the chip under test 15. Multiple second conductors 141 are insulated from each other.
[0065] The second conductor 141 is embedded inside the body of the second connecting plate 14 to enable conduction between the second circuit board 12 and the chip under test 15. The second conductor 141 can be a straight conductor, that is, it extends in a straight line along the thickness direction of the second connecting plate 14 to reduce transmission loss.
[0066] The second conductor 141 inserted into the board body can be a needle-type conductor. When the second conductor 141 is a needle-type conductor, the second connecting plate 14 can be called a second pin holder. The end of the needle-type conductor is pointed and small in size, which can realize the docking with the contacts of the third contact 122 and the chip under test 15.
[0067] The second conductor 141 can be a metallic conductor, and its material can be gold, silver, copper, or an alloy, etc.
[0068] Continue to refer to Figure 1 The top and bottom surfaces of the second connecting plate 14 can be respectively provided with grooves C3 and C4 of a certain depth. The groove C3 at the bottom of the second connecting plate 14 can be used to accommodate the third contact 122, i.e., the third connection pin. The groove C4 at the top of the second connecting plate 14 can be used to accommodate the chip under test 15.
[0069] Similarly, such as Figure 1 and Figure 4 As shown, the outer contour of the second connecting plate 14 can be a cuboid structure. Its thickness can be 6-8mm. The central region of the second connecting plate 14 is the setting area of the second conductor 141. This region corresponds to the setting area of the third contact 122 of the second circuit board 12.
[0070] The edge area of the second connecting plate 14 can be the connection area with the second circuit board 12. The connection method between the second connecting plate 14 and the second circuit board 12 can be a detachable connection method, including but not limited to bolt connection, screw connection, plug connection, etc.
[0071] Among them, such as Figure 4 As shown, the connection area of the second connecting plate 14 can be provided with positioning holes, and locking components such as positioning pins and bolts can be used to achieve the positioning connection between the second connecting plate 14 and the second circuit board 12.
[0072] In one embodiment, the second circuit board 12 may also be provided with positioning holes, and the positioning pins of the first circuit board 11 can pass through the positioning holes of the first connecting plate 13, the second circuit board 12, and the second connecting plate 14. During installation, positioning connection can be achieved through the positioning pins and positioning holes. During the assembly of the second connecting plate 14, to ensure the correct installation orientation of the second connecting plate 14, error-proof markings can be provided in the connection area of the second connecting plate 14.
[0073] In addition to the aforementioned connection structure, the second connecting plate 14 and the second circuit board 12 can also be connected by welding. In the welding connection method, solder pads need to be provided at the connection points of the second connecting plate 14 and the second connecting plate 14. The solder pads in the second connecting plate 14 are spaced apart from the area where the second conductor 141 is located, i.e., insulated from the second conductor 141. The solder pads in the second circuit board 12 also need to be insulated from other conductive components. Welding connection can improve the connection strength between the second connecting plate 14 and the second circuit board 12, preventing shaking during transportation and assembly.
[0074] During the test, to prevent the chip under test 15 from shaking, such as Figure 1 and Figure 4 As shown, a fixing frame 16 can be provided on the outside of the second connecting plate 14. The fixing frame 16 has a hollowed-out area in the middle, the size of which can be set according to the size of the chip under test 15, and is not specifically limited here. The hollowed-out area of the fixing frame 16 corresponds to the setting area of the second conductor 141 of the second connecting plate 14. During testing, the chip under test 15 is placed inside the fixing frame 16 to prevent the chip under test 15 from moving horizontally. For example, the fixing frame 16 can be a plastic frame.
[0075] Continue to refer to Figure 1 and Figure 4 In one embodiment, the fixing frame 16 may be provided with a locking member 161. The locking member 161 may be a positioning pin or a positioning bolt. After the second connecting plate 14, the second circuit board 12 and the second connecting plate 14 are stacked one on the other, the locking member 161 on the fixing frame 16 can pass through the positioning holes of the second connecting plate 14, the positioning holes of the second circuit board 12 and the positioning holes of the first circuit board 11 to achieve a fixed connection between the first circuit board 11, the first connecting plate 13, the second circuit board 12 and the second connecting plate 14.
[0076] It is understood that any two adjacent components of the first circuit board 11, the first connecting plate 13, the second circuit board 12, and the second connecting plate 14 can be detachably connected via locking devices, or they can be fixedly connected by soldering through solder pads. Alternatively, they can be fixed using a combination of bolts and soldering. Here, no specific limitations are made on the specific connection method of the first circuit board 11, the first connecting plate 13, the second circuit board 12, and the second connecting plate 14.
[0077] The chip test board of this application embodiment uses a second circuit board 12 disposed between two pin headers, namely a first connecting plate 13 and a second connecting plate 14. The top surface of the second circuit board 12 is connected to the chip under test 15 via the first connecting plate 13. Through the magnification of the second circuit board 12, a large-pitch pin can be formed on the bottom surface of the second circuit board 12, thus increasing the pin spacing. The connection contacts of the chip under test 15 transmit electrical properties to the second circuit board 12 via the second connecting plate 14, and the second circuit board 12 then transmits these properties to the first circuit board 11 via the first connecting plate 13.
[0078] Meanwhile, in this embodiment, high-speed signal test circuits and ordinary signal test circuits can be set on different circuit boards. For example, high-speed signal test circuits, such as those for serial (SERDES) signals and high-speed C-bus service units (HICbus), can be set on the second circuit board 12. Ordinary signal test circuits, such as low-speed signal test circuits and power module test circuits, can be set on the first circuit board 11, thereby completing ordinary signal testing on the first circuit board 11. Thus, the main function of the first circuit board 11 is to complete the ordinary signal test circuit and power supply. The functions of the second circuit board 12 are: first, to complete the loopback test of high-speed signals, such as the test of high-speed signals like SERDES / HICbus; and second, to rearrange and adjust the small-distance contact arrangement of the received chip under test 15 to output larger-distance contacts, which are then transmitted to the first circuit board 11 through the first connecting board 13, thereby reducing the processing difficulty of the first circuit board 11. Among them, the loopback design of high-speed signals is completed in the second circuit board 12 to reduce the number of traces. If the high-speed signal test circuit is set on the first circuit board 11, holes need to be drilled on the back of the first circuit board 11 to achieve circuit connection. Compared to the structure where the high-speed signal test circuit is located on the first circuit board 11, the structure of this application does not require back-drilling to achieve high-speed signal performance testing, thereby further reducing the processing difficulty of the first circuit board 11.
[0079] Based on the same technical objective, this application also provides a chip testing system, which includes a chip testing machine and the chip testing board of this application. The chip testing board is disposed on the chip testing machine, and the chip testing machine is electrically connected to a first circuit board.
[0080] During testing, the chip test board can be fixedly mounted on the test bench surface of the chip testing machine and electrically connected to the machine. During testing, a detection signal is applied to the chip test board by the chip testing machine, and a test signal is obtained from the chip test board.
[0081] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. A chip test board, characterized in that, include: A first circuit board, wherein a first contact is provided on one side surface of the first circuit board; The second circuit board is disposed on one side of the first circuit board and includes a first surface and a second surface. The first surface is disposed close to the first circuit board, and the second surface is disposed away from the first circuit board. The second circuit board has a second contact on its first surface, which is used to electrically connect with the first contact; the second circuit board has a third contact on its second surface, which is used to connect to the chip under test. The second contact and the third contact are electrically connected within the second circuit board, and the density of the second contact is less than the density of the third contact.
2. The chip test board according to claim 1, characterized in that, The area of the connection region formed by the second contact point is larger than the area of the connection region formed by the third contact point.
3. The chip test board according to claim 2, characterized in that, The spacing between the second contact points is greater than the spacing between the third contact points.
4. The chip test board according to claim 3, characterized in that, The spacing between the second contact points is 0.6-1.2 mm, and the spacing between the third contact points is 0.1-0.5 mm.
5. The chip test board according to any one of claims 1-4, characterized in that, A first connecting plate is provided between the first circuit board and the second circuit board. A first conductor is provided inside the first connecting plate. The two ends of the first conductor extend out of the two side surfaces of the first connecting plate and are used to connect with the first contact and the second contact, respectively.
6. The chip test board according to claim 5, characterized in that, The first conductor is a needle-shaped conductor.
7. The chip test board according to any one of claims 1-4, characterized in that, A second connecting plate is provided on one side of the second surface of the second circuit board. A second conductor is provided inside the second connecting plate. The two ends of the second conductor extend out of the two side surfaces of the second connecting plate, respectively, and are used to connect with the third contact and the contact of the chip under test.
8. The chip test board according to claim 7, characterized in that, The second conductor is a needle-shaped conductor.
9. The chip test board according to any one of claims 1-4, characterized in that, The second circuit board has a transmission line, and the second contact and the third contact are connected to the transmission line, which forms a transmission circuit and a test circuit.
10. A chip testing system, characterized in that, include: The chip testing machine and the chip testing board as described in any one of claims 1-9, wherein the chip testing board is disposed on the chip testing machine and the chip testing machine is electrically connected to the first circuit board.