Circuit board and optical module

By staggering the gaps between the power pins and ground pins at the ends of the circuit board's gold fingers, the problem of repeated power-on and power-off during the insertion and removal of optical modules is solved, achieving power supply and grounding stability and avoiding the generation of inrush current.

CN224368051UActive Publication Date: 2026-06-16INNOLIGHT TECHNOLOGY (SUZHOU) LTD +1
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
INNOLIGHT TECHNOLOGY (SUZHOU) LTD
Filing Date
2025-04-29
Publication Date
2026-06-16

AI Technical Summary

Technical Problem

The repeated power-on and power-off phenomenon caused by the gap between the gold finger pins during the insertion and removal of the optical module causes current surges, affecting the power stability of the optical module and external devices.

Method used

The power and ground pins at the gold finger end of the circuit board are designed so that the gap between each power pin is completely staggered from the gap between other power pins, and the gap between each ground pin is also completely staggered, ensuring that the power bus and ground trace remain powered on during insertion and removal.

Benefits of technology

This avoids repeated power-on and power-off cycles between the optical module and external devices during insertion and removal, prevents the generation of inrush current, ensures the stability of the power supply and grounding, and guarantees the continuity of power supply during insertion and removal.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a circuit board and an optical module. The circuit board is provided with a golden finger end, a power supply bus and a ground trace. In the golden finger end, each power supply pin includes at least two power supply pads, each power supply pad is electrically connected with the power supply bus, a first gap exists between adjacent power supply pads, any first gap of any power supply pin is completely staggered with the first gap of at least one of other power supply pins, each ground pin includes at least two ground pads, each ground pad is electrically connected with the ground trace, a second gap exists between adjacent ground pads, and any second gap of any ground pin is completely staggered with the second gap of at least one of other ground pins. Therefore, in the process of plugging the optical module with an external device, the power supply bus and the ground trace can always keep a power-on state, the repeated power-on and power-off situation is avoided, and thus the impact current generated during plugging is avoided.
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Description

Technical Field

[0001] This application relates to the field of optical communication, and more particularly to a circuit board and an optical module. Background Technology

[0002] Optical modules are the core components of optical communication systems, which perform the mutual conversion of photoelectric signals.

[0003] An optical module typically includes a housing, a circuit board inside the housing, and optical components. One end of the circuit board has gold fingers exposed outside the housing for pluggable connection to external devices. When an external device, such as an optical switch / server, is inserted, the gold fingers of the circuit board are inserted into the connector slot of the external device to achieve electrical connection. The surface of the gold fingers on the circuit board has multiple rows of pins along the insertion / removal direction. Industry standards for optical modules specify the functions of these gold finger pins to ensure they meet the power supply and communication requirements of the processor and optical chip on the optical module, establishing a matching relationship between the gold finger pins, the processor, and the optical chip. During insertion and removal, due to the gaps between the multiple rows of gold fingers, repeated power-on and power-off cycles can occur, causing current surges to the power supplies of both the internal components of the optical module and the external devices. Utility Model Content

[0004] The purpose of this application is to provide a circuit board and an optical module to solve the technical problem of repeated power-on and power-off during the insertion and removal of optical modules and external devices.

[0005] In a first aspect, this application provides a circuit board having a first surface and a second surface opposite to each other. The first surface has a first side and a second side that are perpendicular to each other. The direction of extension along the first side is a first direction, and the direction of extension along the second side is a second direction. The circuit board is provided with:

[0006] The gold finger tip includes multiple power pins, multiple signal pins, and multiple ground pins. The power pins, signal pins, and ground pins all extend along a first direction, and the power pins, signal pins, and ground pins are arranged side by side and spaced apart along a second direction.

[0007] The power bus is electrically connected to the power pins.

[0008] Signal traces, signal traces electrically connected to signal pins; and

[0009] Grounding trace, which is electrically connected to the grounding pin;

[0010] Each power pin includes at least two power pads arranged along a first direction, each power pad being electrically connected to a power bus. In the first direction, there is a first gap between two adjacent power pads, and any first gap of any power pin is completely offset from at least one first gap of other power pins in the first direction.

[0011] Each grounding pin includes at least two grounding pads arranged along a first direction, each grounding pad being electrically connected to a grounding trace, wherein a second gap exists between two adjacent grounding pads in the first direction, and any second gap of any grounding pin is completely offset from at least one second gap of other grounding pins in the first direction.

[0012] In some embodiments, the circuit board includes stacked multilayer dielectric layers, inner conductive patterns located between the dielectric layers, and surface conductive patterns located on a first surface and a second surface; power buses, power pins, signal pins, and ground pins are located in the surface conductive patterns;

[0013] The inner conductive pattern has power traces, which are electrically connected to the power bus through the first conductive via.

[0014] In the same power supply pin, the power pad that is relatively close to the power bus in the first direction is directly connected to the power bus or electrically connected to the power trace through the first conductive via, and the remaining power pads are electrically connected to the power trace through the first conductive via.

[0015] In some embodiments, each power pin includes two power pads, and also includes a reserved power pad located between the two power pads.

[0016] Furthermore, the front end of the reserved power pad of at least one power pin is directly connected to the power pad located on that side to form a long power pad, and the rear end of the reserved power pad of at least another power pin is directly connected to the power pad located on that side to form a long power pad, so that the first gaps of at least two different power pins are completely staggered.

[0017] In some embodiments, the grounding trace is disposed in an inner conductive pattern located on a different layer than the power trace, and the grounding pads are electrically connected to the grounding trace through a second conductive via.

[0018] In some embodiments, each grounding pin includes two grounding pads, and also includes a reserved grounding pad located between the two grounding pads.

[0019] Furthermore, the front end of the reserved grounding pad of at least one grounding pin is directly connected to the grounding pad located on that side to form a long grounding pad, and the rear end of the reserved grounding pad of at least another grounding pin is directly connected to the grounding pad located on that side to form a long grounding pad, so that the second gaps of at least two different grounding pins are completely staggered.

[0020] In some embodiments, multiple power supply pins are distributed on the first and second surfaces of the circuit board, respectively.

[0021] Multiple signal pins are distributed on the first and second surfaces of the circuit board, respectively.

[0022] Multiple grounding pins are distributed on the first and second surfaces of the circuit board, respectively.

[0023] In some embodiments, multiple signal pins are divided into multiple groups, and the second gaps of the ground pins located on both sides of the same group of signal pins coincide on the projection of the first side.

[0024] In some embodiments, on the first and / or second surfaces of the circuit board, the power supply pin is located at the middle position of the gold finger tip, and a set of signal pins is arranged on each side of the power supply pin;

[0025] On the same surface, the ground pin of a group of signal pins located on one side of the power supply pin is the first ground pin, and the ground pin of a group of signal pins located on the other side of the power supply pin is the second ground pin;

[0026] The second gap of the first grounding pin and the second gap of the second grounding pin are completely offset in the first direction.

[0027] Secondly, this application also provides a circuit board having a first surface and a second surface opposite to each other. The first surface has a first side and a second side that are perpendicular to each other. The extension direction along the first side is a first direction, and the extension direction along the second side is a second direction. The circuit board is provided with:

[0028] The gold finger tip includes multiple power pins, multiple signal pins, and multiple ground pins. The power pins, signal pins, and ground pins all extend along a first direction, and the power pins, signal pins, and ground pins are arranged side by side and spaced apart along a second direction.

[0029] The power bus is electrically connected to the power pins.

[0030] Signal traces, signal traces electrically connected to signal pins; and

[0031] Grounding trace, which is electrically connected to the grounding pin;

[0032] Each power pin includes at least two power pads arranged along a first direction, with a first gap between two adjacent power pads in the first direction, each power pad of the at least two power pins being electrically connected to a power bus, and the first gap between the two power pins being completely offset in the first direction.

[0033] Each grounding pin includes at least two grounding pads arranged along a first direction, wherein a second gap exists between two adjacent grounding pads in the first direction, each grounding pad of the at least two grounding pins is electrically connected to a grounding trace, and the second gaps between the two grounding pins are completely offset in the first direction.

[0034] In some embodiments, both power pins include two power pads and a reserved power pad located between the two power pads. The front end of the reserved power pad of one power pin is directly connected to the power pad located on that side to form a long power pad, and the rear end of the reserved power pad of the other power pin is directly connected to the power pad located on that side to form a long power pad, so that the first gap between the two power pins is completely staggered.

[0035] Both grounding pins include two grounding pads and a reserved grounding pad located between the two grounding pads. The front end of the reserved grounding pad of one grounding pin is directly connected to the grounding pad on that side to form a long grounding pad, and the rear end of the reserved grounding pad of the other grounding pin is directly connected to the grounding pad on that side to form a long grounding pad, so that the second gaps of the two grounding pins are completely staggered.

[0036] Thirdly, this application also provides an optical module, including: the aforementioned circuit board; and a power chip, the power chip being disposed on a first surface or a second surface of the circuit board and respectively connected to the power bus and ground trace of the circuit board.

[0037] The technical advantage of this invention lies in providing a circuit board and an optical module. The gold finger end of the circuit board is configured such that the first gap of any power pin is completely offset from the first gap of at least one of the other power pins in a first direction, and the second gap of any ground pin is completely offset from the second gap of at least one of the other ground pins in a first direction. Therefore, during the insertion and removal of the optical module from external devices, the power contacts of the external socket will not all slide to the first gap of the power pins, preventing momentary power loss and re-energization. This ensures that at any given moment during the insertion and removal process, at least one power pin's power pad is in contact with the power contacts of the external socket, thus keeping the power bus powered on throughout the process. Similarly, the ground trace, through the aforementioned design of the ground pin, is also kept powered on, avoiding repeated power-on and power-off cycles between the optical module and external devices during insertion and removal, thereby preventing inrush currents during insertion and removal. Attached Figure Description

[0038] The technical solution and other beneficial effects of this application will become apparent from the following detailed description of specific embodiments in conjunction with the accompanying drawings.

[0039] Figure 1This is a schematic diagram of the structure of an optical module provided in an embodiment of this application.

[0040] Figure 2 This is a schematic diagram of the cross-section of the optical cage in the external device.

[0041] Figure 3 This is a schematic diagram of a conventional circuit board.

[0042] Figure 4 This is a schematic diagram of the circuit board structure provided in an embodiment of this application.

[0043] Figure 5 A schematic longitudinal section of the circuit board with respect to the power supply pins, provided for an embodiment of this application;

[0044] Figure 6 This is a schematic diagram of the longitudinal section of the circuit board with respect to the ground pin, provided in an embodiment of this application.

[0045] The components in the attached diagram are labeled as follows:

[0046] 100 - Optical module; 10 - Upper housing; 20 - Lower housing; 30 - Circuit board; 40 - Power chip; 200 - External device;

[0047] 101 - Optical interface; 102 - Electrical interface; 103 - Cavity;

[0048] 50 - Slot; 60 - Conductive spring;

[0049] 301 - First surface; 302 - Second surface; 3011 - First edge; 3012 - Second edge;

[0050] 1-Gold finger tip;

[0051] 11-Power pin; 111-Power pad; 112-Pre-installed power pad; 113-Long power pad;

[0052] 12 - Signal pin; 121 - Signal pad;

[0053] 13-Grounding pin; 131-Grounding pad; 132-Reserved grounding pad; 133-Long grounding pad; 1301-First grounding pin; 1302-Second grounding pin;

[0054] 2-Power bus; 3-Ground trace;

[0055] 41 - First gap; 42 - Second gap;

[0056] 31-Dielectric layer; 311-Inner conductive pattern; 21-Power trace; 312-Surface conductive pattern;

[0057] 51 - First conductive via; 52 - Second conductive via. Detailed Implementation

[0058] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0059] In the description of this application, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.

[0060] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication between two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0061] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature being directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature being directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0062] The following disclosure provides many different embodiments or examples for implementing different structures of this application. To simplify the disclosure, specific examples of components and arrangements are described below. Of course, these are merely examples and are not intended to limit the scope of this application. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, various specific examples of processes and materials are provided in this application, but those skilled in the art will recognize the application of other processes and / or the use of other materials.

[0063] like Figure 1 and Figure 2 As shown, the optical module 100 includes an upper housing 10, a lower housing 20, an optical component (not shown in the figure), and a circuit board 30. The optical component is electrically connected to the circuit board 30. The upper housing 10 and the lower housing 20 form a cavity that encloses the optical component and the circuit board 30. One end of the optical component is located at the optical interface 101 of the optical module 100 for connecting to an external optical fiber. One end of the circuit board 30 is a gold finger electrical connection end, extending to the electrical interface 102 of the optical module 100 for electrically connecting to an external device 200, such as a switch or server.

[0064] Specifically, the circuit board surface has gold fingers, a power bus, a power chip / soft-start chip, a processor, an optical chip, etc. The pins of the processor and the optical chip are connected to the pins of the gold fingers and the power chip, respectively, through conductive traces on the circuit board. The gold fingers contain multiple pins, including ground pins, power pins, and signal pins.

[0065] The connector slot 50 of the external device 200 has contact springs 60 that correspond one-to-one with each pin of the gold fingers, enabling a pluggable connection between the optical module 100 and the external device 200. When the optical module 100 is inserted into the cavity 103 of the external device 200, the gold fingers of the circuit board 30 are inserted into the slot 50, and the contact springs 60 of the slot 50 hold the circuit board 30 and make electrical contact with the corresponding pins of the gold fingers. Specifically, the power spring contacts the power pin 11, the signal spring contacts the signal pin 12, and the ground spring contacts the ground pin 13, thereby electrically connecting the optical module 100 and the external device 200. The external device 200 supplies power to the processor and optical chip through the power pin 11 of the gold fingers, performs data interaction with the processor and optical chip through the signal pin 12, and grounds the processor and optical chip through the ground pin 13.

[0066] The industry standard for optical modules specifies the functions of the gold finger pins one by one, so that they can meet the power supply and communication requirements of the processor and optical chip on the optical module, forming a matching relationship between the gold finger pins, the processor and the optical chip.

[0067] As optical module speeds increase and the number of channels doubles, the number of gold finger pins also needs to double or more pins need to be arranged accordingly. Because the size of optical modules is limited by standards, the circuit board size is also restricted, preventing the addition of more gold finger pins horizontally. Therefore, one or more rows of similarly arranged pins are added vertically to accommodate the increased number of channels. For example, the QSFP-DD800 / QSFP-DD1600 Hardware Specification of the QSFP-DD MSA standard specifies that along the longitudinal direction of the optical module circuit board, i.e., along the first direction X, which is also the insertion and removal direction of the optical module into the external device 200, the power pins of the gold fingers have three rows of power pads, meaning each power pin includes three power pads. Taking the front of the circuit board as an example, as shown... Figure 3 As shown, the two power pads 111 at the front and back of each power pin are electrically connected to the power bus and are used to contact the contact spring 60 of the external device 200 to turn on the power of the external device 200. The middle power pad 111 is a reserved power pad 112, that is... Figure 3 A rectangular dashed box is positioned between the two power pads 111. This reserved power pad is suspended and not connected to any circuit. Ground pin 13 has the same configuration.

[0068] The connector slot of the external device 200 is provided with a first row of contact springs and a second row of contact springs, and each row of contact springs 60 has a power spring and a ground spring, which match the front and rear rows of power pads and ground pads of the gold fingers of the optical module.

[0069] However, during the insertion of the gold finger pins into the corresponding contact springs 60 along the first direction X, the power pad at the front end of the power pins first contacts the first row of power springs, powering the power bus. Then, the middle power pad contacts the first row of power springs. At this point, the front power pad is between the first and second rows of power springs, disconnected from the power springs, and the rear power pad is also not in contact with the power springs. Only the middle, suspended power pad is in contact with the power springs, and the power bus is de-energized. Afterward, the front power pad contacts the second row of power springs, and the rear power pad contacts the first row of power springs, powering the power bus. The middle power pad is between the two rows of power springs. At this point, the gold finger is fully inserted into the slot, completing the power-on of the optical module. During the above insertion and removal process, the front power pad experiences power-on, power-off, and power-on transitions, causing the optical module to experience a power-on, power-off, and power-on process. Similarly, when the optical module is removed, a power-off, power-on, and power-off process will occur. During the above process, the current can easily resonate with capacitors, inductors, etc. in the circuit, generating surge current. This can affect the power supply of the optical module and external devices 200, causing the processor to be in a power-on-reset state and unable to start normally, or causing program loss. The front end and back end are relative terms. Along the first direction X, the front end is the side with the gold fingers facing the second side 3012, and the back end is the side with the gold fingers facing away from the second side 3012.

[0070] To solve the above problems, such as Figures 4 to 6 As shown, this application embodiment provides a circuit board 30 and an optical module 100 including the circuit board 30. When the optical module 100 is plugged in and out of the external device 200, the power bus 2 is always powered on through the power pin 11, and the ground trace 3 is always powered on through the ground pin 13. This avoids repeated power-on and power-off cycles between the optical module 100 and the external device 200 during plugging and unplugging, thereby preventing inrush current during plugging and unplugging. A detailed description will follow with reference to the accompanying drawings.

[0071] Specifically, such as Figure 4 In the embodiment shown, the circuit board 30 provided in this application has a first surface 301 and a second surface 302 opposite to each other. The first surface 301 has a first side 3011 and a second side 3012 that are perpendicular to each other. The extension direction along the first side 3011 is the first direction X, and the extension direction along the second side 3012 is the second direction Y.

[0072] The circuit board 30 includes a gold finger tip 1, a power bus 2, a signal trace 4, and a ground trace 3. The gold finger tip 1 includes a power pin 11, a signal pin 12, and a ground pin 13. The power pin 11, signal pin 12, and ground pin 13 all extend along a first direction X and are arranged side-by-side at intervals along a second direction Y. The power bus 2 is electrically connected to the power pin 11, the signal trace is electrically connected to the signal pin 12, and the ground trace 3 is electrically connected to the ground pin 13. Figure 4 The ground trace 3 and signal trace 4 are schematically shown on the surface of the circuit board 30 to illustrate the connection relationship. It can be understood that ground trace 3 and signal trace 4 can be connected as follows: Figure 5 and Figure 6 As shown, it is located in the inner conductive pattern 311.

[0073] like Figure 4 As shown, in this embodiment, power pin 11 includes at least two power pads 111 arranged along a first direction X, and each power pad 111 of all power pins 11 is electrically connected to the power bus 2. Ground pin 13 includes at least two ground pads 131 arranged along the first direction X, and each ground pad 131 of all ground pins 13 is electrically connected to the ground trace 3. Moreover, in the first direction X, there is a first gap 41 between two adjacent power pads 111, and any first gap 41 of any power pin 11 is completely offset from the first gap 41 of at least one of the other power pins 11 in the first direction X. There is a second gap 42 between two adjacent ground pads 131, and any second gap 42 of any ground pin 13 is completely offset from the second gap 42 of at least one of the other ground pins 13 in the first direction X.

[0074] by Figure 4 Taking the schematic circuit board 30 as an example, on the first surface of the circuit board 30, the gold finger end 1 has two power pins 11. Each of these two power pins 11 includes two power pads and has a first gap. The first gaps 41 of these two power pins 11 are completely offset in the first direction X. That is, the first gaps 41 of these two power pins 11 have a certain distance in the first direction X.

[0075] Figure 4On the first surface of the example circuit board 30, the two power supply pins 11 are located in the middle of the gold finger end 1. Multiple ground pins 13 and multiple signal pins 12 are located on both sides of each power supply pin 11. All ground pins 13 include two ground pads 131 and each has a second gap 42. The second gaps 42 of the multiple ground pins 13 on one side of the power supply pin 11 are aligned, and the second gaps 42 of the multiple ground pins 13 on the other side are also aligned, but the second gaps 42 of the ground pins 13 on these two sides are completely staggered in the first direction X. That is, the second gaps 42 of the ground pins 13 on different sides of the power supply pin 11 have a certain spacing in the first direction X.

[0076] Thus, during the insertion and removal of the optical module 100 and the external device 200, the power contacts of the external socket will not all slide to the first gap 41 of the power pin 11, preventing a momentary power outage and subsequent power-on. This ensures that at any given moment during the insertion and removal process, at least one power pin 11's power pad 111 is in contact with the power contacts of the external socket, thereby keeping the power bus 2 powered on throughout the process. Similarly, the grounding trace 3, through the aforementioned design of the grounding pin, is also kept powered on, preventing repeated power-on and power-off cycles between the optical module and the external device during insertion and removal, thus avoiding inrush currents during insertion and removal.

[0077] Please refer to the reference. Figure 3 and 4 In this embodiment, each power pin 11 includes two power pads 111 and a reserved power pad 112 located between the two power pads 111. The front end of the reserved power pad 112 of at least one power pin 11 is directly connected to the power pad 111 on that side to form a long power pad 113, and the rear end of the reserved power pad 112 of at least another power pin 11 is directly connected to the power pad 111 on that side to form a long power pad 113, so that the first gap 41 of at least two different power pins 11 is completely staggered. Similarly, each ground pin 13 includes two ground pads 131 and a reserved ground pad 132 located between the two ground pads 131. In this configuration, the front end of the reserved grounding pad 132 of at least one grounding pin 13 is directly connected to the grounding pad 131 located on that side to form a long grounding pad 133, and the rear end of the reserved grounding pad 132 of at least another grounding pin 13 is directly connected to the grounding pad 131 located on that side to form a long grounding pad 133, so that the second gap 42 of at least two different grounding pins 13 is completely staggered.

[0078] More specifically, with Figure 4Taking the circuit board shown as an example, in the second direction Y, the left side of the reserved power pad 112 of the power pin 11 in the first row connects with the power pad 111 located to the left of the reserved power pad 112 to form a long power pad 113 (left long power pad 113), and there is a first gap between the long power pad 113 and the power pad 111 on the right. The right side of the reserved power pad 112 of the power pin 11 in the second row connects with the power pad 111 located to the right of the reserved power pad 112 to form a long power pad 113 (left long power pad 113), and there is a first gap 41 between the long power pad 113 and the power pad 112 on the left. This arrangement ensures that the first gap 41 of at least two different power pins 11 is completely staggered.

[0079] Similarly, in the second direction Y, the left side of the reserved grounding pad 132 of the grounding pin 13 in the first row connects with the grounding pad 131 located to the left of the reserved grounding pad 132 to form a long grounding pad 133 (left long grounding pad 133), and there is a second gap 42 between the long grounding pad 133 and the grounding pad 131 on the right. The right side of the reserved grounding pad 132 of the grounding pin 13 in the last row connects with the grounding pad 131 located to the right of the reserved grounding pad 132 to form a long grounding pad 133 (left long grounding pad 133), and there is a second gap 42 between the long grounding pad 133 and the grounding pad 131 on the left. This arrangement ensures that the second gaps 42 of at least two different power supply pins 11 are completely staggered.

[0080] In other words, with Figure 3 Compared to the conventional circuit board 30 shown, Figure 4 The illustrated embodiment is equivalent to... Figure 3 In the circuit board 30 shown, one reserved power pad 112 is directly connected to the power pad 111 on its left to form a long power pad 113, thereby electrically connecting to the power bus 2. Similarly, another reserved power pad 112 is directly connected to the power pad 111 on its right to form a long power pad 113, also electrically connecting to the power bus 2, ensuring that the first gaps 41 of the two different power pins 11 are completely staggered. Likewise, one reserved ground pad 132 is directly connected to the ground pad 131 on its left to form a long ground pad 133, thereby electrically connecting to the ground trace 3. Another reserved ground pad 132 is directly connected to the ground pad 131 on its right to form a long ground pad 133, also electrically connecting to the ground trace 3, ensuring that the second gaps 42 of the two different ground pins 13 are completely staggered.

[0081] Therefore, during the insertion and removal of the optical module 100 and the external device 200, when the power contact of the external device 200 contacts any segment of the long power pad 113, it can be electrically connected to the power bus 2, ensuring that the power bus 2 is always powered on. Similarly, when the ground contact of the external device 200 contacts any segment of the long ground pad 133, it can be electrically connected to the ground trace 3, ensuring that the ground trace 3 is always powered on. This avoids repeated power-on and power-off cycles between the optical module 100 and the external device during insertion and removal, thus preventing inrush currents during these processes.

[0082] In some embodiments, only two power pads 111 of the two power pins 11 in the circuit board 30 may be electrically connected to the power bus 2, and the first gaps 41 of the two power pins 11 may be completely staggered. During the insertion and removal of the optical module 100, the power bus 2 can remain powered on through these two power pins 11. Similarly, only two ground pads 131 of the two ground pins 13 may be electrically connected to the ground trace 3, and the second gaps 42 of the two ground pins 13 may be completely staggered. During the insertion and removal of the optical module 100, the ground trace 3 can remain powered on through these two ground pins 13.

[0083] In some embodiments, each power pin 11 may also include two or more power pads 111 arranged along a first direction X, each power pin having one or two or more first gaps 42. Each power pad 111 of at least two power pins 11 is electrically connected to the power bus 2, and the first gaps 41 of the two power pins 11 are completely staggered. Similarly, each ground pin 13 may also include two or more ground pads 131 arranged along a first direction X, each ground pin 13 having one or two or more second gaps 42. Each ground pad 131 of at least two ground pins 13 is electrically connected to the ground trace 3, and the second gaps 42 of the two ground pins 13 are completely staggered.

[0084] Thus, during the insertion and removal of the optical module 100 and the external device 200, because the first gaps 41 of the two power pins 11 are completely staggered, the power contacts of the external socket will not all slide to the first gaps 41 of the power pins 11, thus preventing the problem of momentary power loss and re-energization. This ensures that at any given moment during the insertion and removal process, the power pad 111 of one power pin 11 is in contact with the power contacts of the external socket, thereby keeping the power bus 2 powered on throughout the process. Similarly, because the second gaps 42 of the two grounding pins 13 are completely staggered, this ensures that at any given moment during the insertion and removal process, the grounding pad 131 of one grounding pin 13 is in contact with the grounding contacts of the external socket, thus keeping the grounding trace 3 powered on throughout the process. Therefore, this avoids the repeated power-on and power-off of the optical module 100 and the external device 200 during insertion and removal, thereby preventing inrush current during insertion and removal.

[0085] In this embodiment, the signal pin 12 includes at least two signal pads 121 arranged along the first direction X.

[0086] Specifically, Figure 4 The schematic circuit board 30 has a gold finger tip 1 including a plurality of signal pins 12, and each signal pin 12 has four signal pads 121 spaced apart along a first direction X. In this embodiment, two of the four signal pads 121 are respectively connected to two signal traces, and the other two signal pads are set to be floating and not connected to any circuit. In some embodiments, the four signal pads 121 may also be respectively connected to four different signal traces.

[0087] like Figure 5 and Figure 6 As shown, in this embodiment, the circuit board 30 includes multiple layers of dielectric layers 31, inner conductive patterns 311 located between the dielectric layers 31, and surface conductive patterns 312 located on the first surface 301 and the second surface 302. The power bus 2, power pin 11, signal pin 12, and ground pin 13 are located in the surface conductive pattern 312.

[0088] like Figure 5 As shown, one of the inner conductive patterns 311 has a power trace 21, which is electrically connected to the power bus 2 through the first conductive via 51. It can be understood that the power trace 21 can also be distributed in multiple inner conductive patterns 311 of different layers.

[0089] In the aforementioned power pin 11, the power pad 111 adjacent to the power bus 2 in the first direction X is directly connected to the power bus 2 or electrically connected to the power trace 21 through the first conductive via 51. The remaining power pads 111 are all electrically connected to the aforementioned power trace 21 through the first via. This optimizes the wiring of the circuit board 30. In some embodiments, each power pad 111 may also be electrically connected to the power trace 21 through the first conductive via 51, and then electrically connected to the power bus 2 through the power trace 21.

[0090] like Figure 6 As shown, the ground trace 3 is located in an inner conductive pattern 311 on a different layer than the power trace 21. This avoids the problem of short circuits that can easily occur when the ground trace 3 and the power trace 21 are on the same layer, and also facilitates the fabrication of both the ground trace 3 and the power trace 21. The ground pads 131 are all electrically connected to the ground trace 3 through the second conductive via 52. It can be understood that the ground trace 3 here can be distributed in the same inner conductive pattern 311 as the signal trace 4 to form electromagnetic shielding for the signal trace 4. Alternatively, the ground trace 3 can also be a reference ground layer, located in a different inner conductive pattern 311 than the signal trace 4.

[0091] like Figures 4 to 6 As shown, multiple power supply pins 11 are distributed on the first surface 301 and the second surface 302 of the circuit board 30, multiple signal pins 12 are distributed on the first surface 301 and the second surface 302 of the circuit board 30, and multiple ground pins 13 are distributed on the first surface 301 and the second surface 302 of the circuit board 30.

[0092] Multiple signal pins 12 are divided into multiple groups, and the second gaps 42 of the ground pins 13 located on both sides of the same group of signal pins 12 coincide on the projection of the ground pins 13 on the first side 3011 of the circuit board. In other words, among the ground pins 13 located on both sides of the same group of signal pins 12, the second gaps 42 of the ground pins 13 on one side are aligned with the second gaps 42 of the ground pins 13 on the other side.

[0093] like Figures 4 to 6As shown, on the first surface 301, the second surface 302, or both of these surfaces of the circuit board 30, the power supply pin 11 is located in the middle of the gold finger end 1. A set of signal pins is arranged on each side of the power supply pin 11. Each set of signal pins includes multiple pairs of differential pins, with a ground pin between two adjacent pairs of differential pins. A ground pin is also arranged on each of the two opposite outer sides of the signal pin set. On the same surface, the ground pin 13 in the set of signal pins located on one side (upper side) of the power supply pin 11 is the first ground pin 1301, and the ground pin 13 in the set of signal pins located on the other side (lower side) of the power supply pin 11 is the second ground pin 1302. The second gap 42 of the first ground pin 1301 and the second gap 42 of the second ground pin 1302 are completely offset in the first direction X. Therefore, at any moment during the insertion and removal process, the grounding pad 131 of at least one grounding pin 13 of the optical module 100 and the external device 200 is in contact with the grounding spring of the external socket, and is always powered on. This avoids the repeated power-on and power-off of the optical module 100 and the external device during the insertion and removal process, thereby eliminating the generation of inrush current during insertion and removal.

[0094] In some other embodiments, please refer to Figure 5 and 6 The gold finger tip 1 can also be configured such that power pins 11 are arranged on both surfaces of the circuit board 30, with the first gaps of the power pins 11 on the same surface aligned with each other, and the first gaps 41 of the power pins 11 on the first surface 301 and the first gaps 41 of the power pins 11 on the second surface 302 completely offset in the first direction X. Similarly, ground pins 13 can be arranged on both surfaces of the circuit board 30, with the second gaps 42 of the ground pins 13 on the same surface aligned with each other, and the second gaps 42 of the ground pins 13 on the first surface 301 and the second gaps 42 of the ground pins 13 on the second surface 302 completely offset in the first direction X. As long as the first gaps 41 of at least two different power pins 11 and the second gaps 42 of at least two different ground pins 13 are completely offset, the power pads 111 of the power pins 11 and the ground pads 131 of the ground pins 13 are always in contact with the ground springs during the insertion and removal of the optical module 100 from the external device 200.

[0095] like Figure 5As shown, the optical module 100 provided in this application includes a power chip 40 and a circuit board 30 of any of the above embodiments. The power chip 40 is disposed on the first surface 301 or the second surface 302 of the circuit board 30 and is electrically connected to the power bus 2 and the ground trace 3 of the circuit board 30, respectively, for providing power to the circuit board 30. In some embodiments, the optical module 100 may further include a soft-start circuit, or a soft-start chip, or the power chip may include a soft-start circuit unit.

[0096] The aforementioned optical module 100 may also include electronic components (such as capacitors, resistors, transistors, and MOSFETs) and chips (such as MCUs, laser driver chips, limiting amplifier chips, clock data recovery (CDR) chips, and data processing chips (DSPs). These components and chips are mounted on a circuit board, and are connected together according to the circuit design through the conductive patterns on the surface or inner layers of the circuit board 30 to achieve functions such as power supply, electrical signal transmission, and grounding.

[0097] In this embodiment, the circuit board 30 is a rigid circuit board. Due to its relatively hard material, the rigid circuit board can also perform a load-bearing function, such as supporting the chip stably. The rigid circuit board can also be inserted into the electrical connector in the host computer cage.

[0098] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0099] The circuit board and optical module provided in the embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the technical solutions and core ideas of this application. Those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A circuit board, characterized in that, The circuit board has a first surface and a second surface opposite to each other. The first surface has a first side and a second side that are perpendicular to each other. The direction extending along the first side is a first direction, and the direction extending along the second side is a second direction. The circuit board is provided with: The gold finger tip includes multiple power pins, multiple signal pins, and multiple ground pins. The power pins, signal pins, and ground pins all extend along the first direction, and the power pins, signal pins, and ground pins are arranged side by side at intervals along the second direction. A power bus, which is electrically connected to the power pin; A signal trace, which is electrically connected to the signal pin; as well as A grounding trace, which is electrically connected to the grounding pin; Each power pin includes at least two power pads arranged along the first direction, each power pad being electrically connected to the power bus. In the first direction, there is a first gap between two adjacent power pads, and any first gap of any power pin is completely offset from the first gap of at least one of the other power pins in the first direction. Each grounding pin includes at least two grounding pads arranged along the first direction, each grounding pad being electrically connected to the grounding trace, wherein there is a second gap between two adjacent grounding pads in the first direction, and any second gap of any grounding pin is completely offset from the second gap of at least one of the other grounding pins in the first direction.

2. The circuit board according to claim 1, characterized in that, The circuit board includes multiple layers of dielectric layers, inner conductive patterns between the dielectric layers, and surface conductive patterns on a first surface and a second surface; the power bus, the power pin, the signal pin, and the ground pin are located in the surface conductive patterns. The inner conductive pattern is provided with power traces, and the power traces are electrically connected to the power bus through a first conductive via. In the same power pin, the power pad that is relatively close to the power bus in the first direction is directly connected to the power bus or electrically connected to the power trace through the first conductive via, and the remaining power pads are all electrically connected to the power trace through the first conductive via.

3. The circuit board according to claim 2, characterized in that, Each of the power pins includes two power pads and a reserved power pad located between the two power pads. Furthermore, the front end of the reserved power pad of at least one of the power pins is directly connected to the power pad located on that side to form a long power pad, and the rear end of the reserved power pad of at least another power pin is directly connected to the power pad located on that side to form a long power pad, so that the first gap of at least two different power pins is completely staggered.

4. The circuit board according to claim 2, characterized in that, The grounding trace is located in the inner conductive pattern on a different layer than the power trace, and the grounding pads are all electrically connected to the grounding trace through the second conductive via.

5. The circuit board according to claim 4, characterized in that, Each of the grounding pins includes two grounding pads, and also includes a reserved grounding pad located between the two grounding pads. Furthermore, the front end of the reserved grounding pad of at least one of the grounding pins is directly connected to the grounding pad located on that side to form a long grounding pad, and the rear end of the reserved grounding pad of at least another grounding pin is directly connected to the grounding pad located on that side to form a long grounding pad, so that the second gaps of at least two different grounding pins are completely staggered.

6. The circuit board according to claim 1, characterized in that, The power supply pins are respectively distributed on the first surface and the second surface of the circuit board; The signal pins are respectively distributed on the first surface and the second surface of the circuit board; The multiple grounding pins are respectively distributed on the first surface and the second surface of the circuit board.

7. The circuit board according to claim 1, characterized in that, The multiple signal pins are divided into multiple groups, and the second gap of the ground pins located on both sides of the same group of signal pins coincides with the projection of the first side.

8. The circuit board according to claim 7, characterized in that, On the first and / or second surface of the circuit board, the power supply pin is located at the middle position of the gold finger end, and a set of signal pins is arranged on each side of the power supply pin; On the same surface, the ground pin of a group of signal pins located on one side of the power supply pin is the first ground pin, and the ground pin of a group of signal pins located on the other side of the power supply pin is the second ground pin; The second gap of the first grounding pin and the second gap of the second grounding pin are completely offset in the first direction.

9. A circuit board, characterized in that, The circuit board has a first surface and a second surface opposite to each other. The first surface has a first side and a second side that are perpendicular to each other. The direction extending along the first side is a first direction, and the direction extending along the second side is a second direction. The circuit board is provided with: The gold finger tip includes multiple power pins, multiple signal pins, and multiple ground pins. The power pins, signal pins, and ground pins all extend along the first direction, and the power pins, signal pins, and ground pins are arranged side by side at intervals along the second direction. A power bus, which is electrically connected to the power pin; A signal trace, which is electrically connected to the signal pin; as well as A grounding trace, which is electrically connected to the grounding pin; Each power pin includes at least two power pads arranged along the first direction, with a first gap between two adjacent power pads in the first direction, each power pad of at least two power pins being electrically connected to the power bus, and the first gaps between the two power pins being completely offset in the first direction. Each grounding pin includes at least two grounding pads arranged along the first direction, with a second gap between two adjacent grounding pads in the first direction, each grounding pad of at least two grounding pins being electrically connected to the grounding trace, and the second gaps between the two grounding pins being completely offset in the first direction.

10. The circuit board according to claim 9, characterized in that, Both power pins include two power pads and a reserved power pad located between the two power pads. The front end of the reserved power pad of one power pin is directly connected to the power pad located on that side to form a long power pad, and the rear end of the reserved power pad of the other power pin is directly connected to the power pad located on that side to form a long power pad, so that the first gap of the two power pins is completely staggered. Both grounding pins include two grounding pads and a reserved grounding pad located between the two grounding pads. The front end of the reserved grounding pad of one of the grounding pins is directly connected to the grounding pad located on that side to form a long grounding pad, and the rear end of the reserved grounding pad of the other grounding pin is directly connected to the grounding pad located on that side to form a long grounding pad, so that the second gap of the two grounding pins is completely staggered.

11. An optical module, characterized in that, include: The circuit board as described in any one of claims 1 to 10; A power chip is disposed on a first surface or a second surface of the circuit board and is electrically connected to the power bus and the ground trace of the circuit board, respectively.