Semiconductor refrigeration sheet

Abstract

This invention provides a semiconductor refrigeration chip, comprising a cold surface and a hot surface, with a semiconductor grain array disposed between the cold and hot surfaces. The chip is characterized by a supporting mesh structure between the cold and hot surfaces, the semiconductor grain array being embedded within the supporting mesh structure and welded to the cold and hot surfaces on both sides; and the addition of a high-strength supporting mesh structure material between the semiconductor grains in the middle of the refrigeration chip, making the cold and hot surfaces of the entire semiconductor refrigeration chip a unified whole, thereby enhancing the mechanical strength of the semiconductor refrigeration chip.

Description

Technical Field

[0001] This utility model relates to the technical field of optical communication, and specifically to a semiconductor cooling chip. Background Technology

[0002] Optical devices, as a crucial component of optical modules, convert electrical signals into optical signals at the transmitting end and vice versa at the receiving end. The thermoelectric cooler, acting as a temperature control element within the optical device, is vital for controlling the emitted wavelength and maintaining the laser's temperature. The cold side of the thermoelectric cooler reduces the heat emitted by the laser, lowering its temperature and ensuring stable diode characteristics. Simultaneously, the hot side dissipates heat, preventing heat buildup and temperature increases. In temperature-controlled optical devices, the thermoelectric cooler often serves as a substrate to support the laser and other chips. However, its low compressive strength and unstable mechanical structure frequently lead to damage during wire bonding and surface mount processes, resulting in the entire optical device being scrapped. Therefore, strengthening the thermoelectric cooler is necessary to improve the yield rate of the manufacturing process. Utility Model Content

[0003] In order to overcome the defects and shortcomings of the existing technology, this utility model provides a semiconductor cooling chip.

[0004] The technical solution provided by this utility model is as follows:

[0005] A semiconductor refrigeration chip, comprising a cold surface and a hot surface, wherein a semiconductor die array is disposed between the cold surface and the hot surface, characterized in that: a supporting mesh structure is further disposed between the cold surface and the hot surface, wherein the semiconductor die array is embedded inside the supporting mesh structure and welded and fixed to the cold surface and the hot surface on both sides.

[0006] As a further preferred embodiment of the present invention, the outer edge of the grain in the semiconductor grain array matches the aperture of the internal mesh of the supporting mesh structure.

[0007] In a further preferred embodiment of this invention, the thickness of the semiconductor grain array is greater than the thickness of the supporting mesh structure.

[0008] As a further preferred embodiment of this utility model, the semiconductor grain array is made of a conductive material, and the embedded support mesh structure is made of an insulating material.

[0009] As a further preferred embodiment of this utility model, the area of ​​the cold surface of the cooling chip is smaller than the area of ​​the hot surface of the cooling chip.

[0010] As a further preferred embodiment of the present invention, the entire cold surface of the cooling chip coincides with the top of the hot surface of the cooling chip, and the bottom of the hot surface of the cooling chip protrudes from the cold surface of the cooling chip.

[0011] As a further preferred embodiment of the present invention, a plurality of hot-side gold-plated conductive areas are provided on the inner side of the hot side of the cooling chip, and a plurality of cold-side gold-plated conductive areas are provided on the inner side of the cold side of the cooling chip. The hot-side gold-plated conductive areas and the cold-side gold-plated conductive areas are electrically connected through corresponding semiconductor grains in the semiconductor grain array.

[0012] As a further preferred embodiment of this utility model, the gold-plated conductive areas on different hot surfaces of the cooling chip are respectively connected to different positive and negative voltages.

[0013] As a further preferred embodiment of this utility model, the expansion coefficient of the supporting mesh structure is equal to that of the semiconductor grain array.

[0014] As a further preferred embodiment of this utility model, the supporting mesh structure is made of styrene board or quartz glass.

[0015] Compared with the prior art, the beneficial effects achieved by this utility model include:

[0016] 1) This utility model provides a semiconductor refrigeration chip. A high-strength supporting mesh structure material is added between the semiconductor grains in the middle of the refrigeration chip, making the cold and hot surfaces of the entire semiconductor refrigeration chip a unified whole, thereby enhancing the mechanical strength of the refrigeration chip. Simultaneously, because this high-strength material also has a low thermal conductivity coefficient, it optimizes the cooling performance of the semiconductor refrigeration chip compared to air gaps. The gaps in the refrigeration chip are completely filled with high-strength, heat-insulating, and insulating supporting mesh structure material to enhance the strength of the semiconductor refrigeration chip. In terms of manufacturing process, the semiconductor grains are first inserted into the internal mesh of the supporting mesh structure, which improves stability and reduces manufacturing difficulty.

[0017] 2) This utility model provides a semiconductor cooling chip with a supporting mesh structure made of a high mechanical strength material, which ensures that when the semiconductor cooling chip is used as a carrier substrate, it can be normally subjected to chip mounting and wire bonding processes without affecting the structural stability.

[0018] 3) This utility model provides a semiconductor cooling chip. Since the thermal conductivity of the supporting mesh structure material is equal to or lower than that of air, it can better isolate the cold and hot surfaces, thereby improving the performance of the semiconductor cooling chip.

[0019] 4) This utility model provides a semiconductor cooling chip in which the expansion coefficients of the semiconductor grains and the supporting mesh structure material are similar, so that they can be kept at the same expansion range as the semiconductor grains during high and low temperature changes, so as not to break or other phenomena.

[0020] 5) This utility model provides a semiconductor cooling chip with a high compressive strength of the supporting mesh structure material, which makes the overall structure of the semiconductor cooling chip have higher compressive strength, can bear more loads, can be matched with more application scenarios, is not prone to semiconductor cracking and has a longer service life. Attached Figure Description

[0021] Figure 1 An exploded view of the structure of a semiconductor refrigeration chip provided by this utility model.

[0022] Figure 2 This is a schematic diagram of a semiconductor refrigeration chip without a cooling surface, which is provided by this utility model.

[0023] Figure 3 A schematic diagram of the gold-plated structure on the inner side of the hot surface of a semiconductor refrigeration chip provided by this utility model.

[0024] Figure 4 A schematic diagram of the gold-plated structure on the inner side of the cold surface of a semiconductor refrigeration chip provided by this utility model. Detailed Implementation

[0025] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0026] In the description of this utility model, it should be noted that the terms "upper," "lower," "inner," "outer," "front end," "rear end," "both ends," "one end," and "the other end," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model. In addition, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0027] In the description of this utility model, it should be noted that, unless otherwise explicitly specified and limited, the terms "installed," "equipped with," and "connected," etc., should be interpreted broadly. For example, "connected" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be a connection within two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances.

[0028] [First Embodiment]

[0029] like Figure 1-4 The image shown is a semiconductor cooling chip provided in the first embodiment of this utility model, such as... Figure 1 As shown, the thermoelectric cooler includes a cold surface 101 and a hot surface 104. A semiconductor die array 103 is disposed between the cold surface 101 and the hot surface 104. A support mesh structure 102 is also disposed between the cold surface 101 and the hot surface 104. The semiconductor die array 103 is embedded inside the support mesh structure 102 and welded and fixed to the cold surface 101 and the hot surface 104 on both sides. By adding a high-strength support mesh structure material between the semiconductor dies in the middle of the thermoelectric cooler, the cold and hot surfaces of the entire thermoelectric cooler are made into a whole, thereby enhancing the mechanical strength of the thermoelectric cooler.

[0030] In this embodiment, the outer edge of the die in the semiconductor die array 103 matches the aperture of the internal mesh of the support mesh structure 102. The strength of the semiconductor cooling chip is enhanced by filling all the gaps in the cooling chip with high-strength heat-insulating and insulating support mesh structure material. In terms of process, the semiconductor die is inserted into the internal mesh of the support mesh structure first, which improves stability and reduces process difficulty.

[0031] In this embodiment, the semiconductor die array 103 is made of a conductive material to achieve conductivity in the electroplated areas of the cold side 101 and the hot side 104 of the cooling chip. The embedded support mesh structure 102 is made of an insulating material to achieve insulation. Preferably, the support mesh structure 102 is made of a high-strength, low-thermal-conductivity insulating material to enhance the mechanical strength of the semiconductor cooling chip and ensure that the semiconductor cooling chip can be properly mounted and wire-bonded without affecting structural stability when used as a carrier substrate. This includes, but is not limited to, materials such as styrene board or quartz glass. Furthermore, since the thermal conductivity of the support mesh structure material is equal to or lower than that of air, it can better isolate the cold and hot sides, thereby improving the performance of the semiconductor cooling chip. Also, the expansion coefficients of the support mesh structure 102 and the semiconductor die array 103 are equal, ensuring that they expand at the same rate during high and low temperature changes, preventing breakage.

[0032] The manufacturing process is as follows: In the production process of the semiconductor cooling chip, the semiconductor die array 103 is first embedded into the corresponding grid inside the support mesh structure 102, so that the relative positions of the overall array are fixed to form a combined structure. Then, the combined structure is fixed together with the cooling surface 101 and the cooling chip hot surface 104 by gold soldering to complete the fabrication of the semiconductor cooling chip.

[0033] like Figure 2 As shown, the strength of the thermoelectric cooler is enhanced by filling all the gaps in the cooler with a high-strength, heat-insulating, and insulating support mesh structure material. The area of ​​the cold surface 101 of the cooler is smaller than the area of ​​the hot surface 104 of the cooler, and the entire cold surface 101 coincides with the top of the hot surface 104 of the cooler. The bottom of the hot surface 104 protrudes from the cold surface 101. This arrangement facilitates the connection of different positive and negative voltages to the gold-plated conductive areas on different hot surfaces of the hot surface 104, thereby controlling the cold and hot surface areas of the entire thermoelectric cooler.

[0034] Preferably, the thickness of the semiconductor die array 103 is greater than the thickness of the supporting mesh structure 102. This is to ensure that the gold solder has enough space to overflow, and to leave enough space during high-temperature expansion to prevent the semiconductor die array 103 from separating from the cold side 101 and the hot side 104 of the cooling chip unexpectedly.

[0035] like Figure 3-4 As shown, the inner side of the hot surface 104 of the cooling chip has a plurality of hot-surface gold-plated conductive regions, and the inner side of the cold surface 101 of the cooling chip has a plurality of cold-surface gold-plated conductive regions. The hot-surface gold-plated conductive regions and the cold-surface gold-plated conductive regions are electrically connected through corresponding semiconductor chips in the semiconductor chip array 103. For example, Figure 3 Area 302A and Figure 4The 401A region is symmetrically connected via conductive semiconductor grains. Figure 3 Area 301A and Figure 4 The 402A region is connected via conductive semiconductor chips. To achieve the function of a semiconductor cooling chip, the gold-plated areas connect each semiconductor chip in series, achieving either cooling or heating. For example... Figure 3 As shown, current is introduced from region 302, connected to one end of the semiconductor die through region 302A, and simultaneously connected to the other end of the semiconductor die. Figure 4 Area 401A Figure 4 The 401B region is then connected to one end of another semiconductor die, and then connected to... Figure 3 The 303 region. And so on, all the semiconductors are connected in series through gold plating.

[0036] By connecting different positive and negative voltages to the gold-plated conductive areas 301 and 302 on the hot side of the thermoelectric cooler 104, the cold and hot sides of the entire thermoelectric cooler can be controlled. Generally, the top of the thermoelectric cooler is used as the cooling area.

[0037] It will be apparent to those skilled in the art that this invention is not limited to the details of the exemplary embodiments described above, and that it can be implemented in other specific forms without departing from the spirit or essential characteristics of this invention. Therefore, the embodiments should be considered illustrative and non-limiting in all respects, and the scope of this invention is defined by the appended claims rather than the foregoing description. Thus, it is intended that all variations falling within the meaning and scope of equivalents of the claims be included within this invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

Claims

1. A semiconductor cooling chip, the cooling chip comprising a cold surface (101) and a hot surface (104), wherein a semiconductor die array (103) is disposed between the cold surface (101) and the hot surface (104), characterized in that: A support mesh structure (102) is provided between the cold surface (101) and the hot surface (104) of the cooling chip. The semiconductor chip array (103) is embedded inside the support mesh structure (102) and welded and fixed to the cold surface (101) and the hot surface (104) of the cooling chip on both sides.

2. The semiconductor cooling chip according to claim 1, characterized in that: The outer edge of the grains in the semiconductor grain array (103) matches the aperture of the internal grid of the supporting mesh structure (102).

3. A semiconductor cooling chip according to claim 1, characterized in that: The thickness of the semiconductor grain array (103) is greater than the thickness of the supporting mesh structure (102).

4. A semiconductor cooling chip according to claim 1, characterized in that: The semiconductor grain array (103) is made of conductive material, and the embedded support mesh structure (102) is made of insulating material.

5. A semiconductor cooling chip according to claim 1, characterized in that: The area of ​​the cold side (101) of the cooling chip is smaller than the area of ​​the hot side (104) of the cooling chip.

6. A semiconductor cooling chip according to claim 5, characterized in that: The entire cold surface (101) of the cooling chip overlaps with the top of the hot surface (104) of the cooling chip, and the bottom of the hot surface (104) of the cooling chip protrudes from the cold surface (101) of the cooling chip.

7. A semiconductor cooling chip according to claim 1, characterized in that: The inner side of the hot surface (104) of the cooling chip is provided with a plurality of hot surface gold-plated conductive areas, and the inner side of the cold surface (101) of the cooling chip is provided with a plurality of cold surface gold-plated conductive areas. The hot surface gold-plated conductive areas and the cold surface gold-plated conductive areas are electrically connected through corresponding semiconductor grains in the semiconductor grain array (103).

8. A semiconductor cooling chip according to claim 7, characterized in that: The gold-plated conductive areas on different hot surfaces of the cooling chip (104) are respectively connected to different positive and negative voltages.

9. A semiconductor cooling chip according to claim 1, characterized in that: The expansion coefficient of the supporting mesh structure (102) is equal to that of the semiconductor grain array (103).

10. A semiconductor cooling chip according to claim 1, characterized in that: The supporting mesh structure (102) is made of styrene board or quartz glass.

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