An offset-compensated programmable gain amplifier, microprocessing chip and sensor
By introducing a compensation voltage source and resistor network into the variable gain amplifier, and controlling the compensation voltage based on the input signal difference feedback, the offset problem caused by process errors and environmental influences is solved, and higher precision signal amplification is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- GEEHY SEMICON CO LTD
- Filing Date
- 2025-07-28
- Publication Date
- 2026-06-19
AI Technical Summary
Existing variable gain amplifiers have offsets due to process errors or environmental influences, resulting in inaccurate signal amplification.
An offset-compensated variable gain amplifier is used. Through a first compensation voltage source and a resistor network, the compensation voltage is controlled by feedback based on the difference in the input signal to achieve accurate compensation for the offset.
It improves the precision of programmable gain amplifiers and the accuracy of signal amplification, and has a simple structure and flexible processing.
Smart Images

Figure CN224385468U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of signal processing, and more particularly to an offset-compensated programmable gain amplifier, a microprocessor chip, and a sensor. Background Technology
[0002] A variable gain amplifier (VGA) is a type of amplifier whose gain can be dynamically adjusted according to changes in external conditions. It typically uses symmetrical circuits to differentially amplify the input signal.
[0003] However, due to process errors or environmental influences, existing variable gain amplifiers have offsets, resulting in inaccuracies and affecting their use. Utility Model Content
[0004] The purpose of this invention is to overcome the shortcomings of the prior art and propose an offset-compensated variable gain amplifier, microprocessor chip and sensor to compensate for offset errors and improve accuracy.
[0005] In a first aspect, this application provides an offset-compensated variable gain amplifier, comprising:
[0006] A first amplifier, a second amplifier, a first resistor, a second resistor, a third resistor, and a first compensation voltage source;
[0007] The first amplifier receives the first input signal at its non-inverting input terminal, and its output terminal is connected to the first terminal of the first resistor.
[0008] The second amplifier receives the second input signal at its non-inverting input terminal, and its output terminal is connected to the first terminal of the second resistor.
[0009] The second end of the first resistor is connected to the first end of the third resistor, and the second end of the second resistor is connected to the second end of the third resistor;
[0010] The inverting input terminal of the first amplifier is connected to the first terminal of the third resistor via a first compensation voltage source;
[0011] The inverting input of the second amplifier is connected to the second terminal of the third resistor;
[0012] The first compensation voltage source is connected to the first terminal of the first resistor and the first terminal of the second resistor respectively, and is used for negative feedback control of the compensation voltage of the first compensation voltage source.
[0013] In one possible implementation, the first compensation voltage source includes: a fourth resistor and a first current source;
[0014] The inverting input terminal of the first amplifier is connected to the first terminal of the third resistor via a first compensation voltage source, including:
[0015] The first terminal of the fourth resistor is connected to the inverting input terminal of the first amplifier, and the second terminal of the fourth resistor is connected to the second terminal of the first resistor.
[0016] The first current source is connected to the first terminal of the fourth resistor.
[0017] In one possible implementation, it further includes a second current source connected to the inverting input of the second amplifier.
[0018] In one possible implementation, the product of the magnitude of the first current output by the first current source and the first resistance is equal to the product of the magnitude of the second current output by the second current source and the second resistance.
[0019] In one possible implementation, the first compensation voltage source includes: a first current source, a third current source, a first switch, a second switch, and a fourth resistor;
[0020] The inverting input terminal of the first amplifier is connected to the first terminal of the third resistor via a first compensation voltage source, including:
[0021] The first end of the fourth resistor is connected to the inverting input terminal of the first amplifier, and the second end of the fourth resistor is connected to the second end of the first resistor;
[0022] The first current source is connected to the common terminal of the first switch, and the switching terminal of the first switch is connected to the first terminal and the second terminal of the fourth resistor, respectively.
[0023] The third current source is connected to the common terminal of the second switch, and the switching terminal of the second switch is connected to the first terminal and the second terminal of the fourth resistor, respectively.
[0024] The magnitude of the first current source outputting the first current is the same as the magnitude of the third current source outputting the third current.
[0025] In one possible implementation, the gain amplifier further includes: a second compensation voltage source;
[0026] The second compensation voltage source includes a fourth current source, a fifth current source, a third switch, a fourth switch, and a fifth resistor;
[0027] The first end of the fifth resistor is connected to the inverting input terminal of the second amplifier, and the second end of the fifth resistor is connected to the second end of the second resistor;
[0028] The fourth current source is connected to the common terminal of the third switch, and the switching terminal of the third switch is connected to the first and second terminals of the fifth resistor respectively.
[0029] The fifth current source is connected to the common terminal of the fourth switch, and the switching terminal of the fourth switch is connected to the first and second terminals of the fifth resistor, respectively.
[0030] In one possible implementation, the magnitude of the fourth current source outputting the fourth current is the same as the magnitude of the fifth current source outputting the fifth current.
[0031] One possible implementation also includes:
[0032] A differential amplifier, wherein the first input terminal of the differential amplifier is connected to the first terminal of the first resistor, and the second input terminal of the differential amplifier is connected to the first terminal of the second resistor.
[0033] Secondly, this application also provides a microprocessor chip including the offset-compensated variable gain amplifier described in the first aspect.
[0034] Thirdly, this application also provides a sensor including the offset-compensated variable gain amplifier described in the first aspect.
[0035] Beneficial effects: This application compensates for possible deviations in the programmable gain amplifier by using a first compensation voltage source. The first compensation voltage source is also connected to the first end of the first resistor and the first end of the second resistor. The compensation direction and compensation magnitude are adjusted by the output result. The structure is simple and can improve the accuracy of the programmable gain amplifier. Attached Figure Description
[0036] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings are incorporated in and constitute a part of this specification, showing embodiments consistent with this application, and together with the specification are used to explain the principles of this application. The drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0037] Figure 1 This is a schematic diagram of an existing variable gain amplifier structure;
[0038] Figure 2A This is a possible structural diagram of a variable gain amplifier provided in an embodiment of this application;
[0039] Figure 2B Another structural diagram of the variable gain amplifier provided in the embodiments of this application;
[0040] Figure 2C Another structural diagram of the variable gain amplifier provided in the embodiments of this application;
[0041] Figure 3Another structural diagram of the variable gain amplifier provided in the embodiments of this application;
[0042] Figure 4 Another structural diagram of the variable gain amplifier provided in the embodiments of this application. Detailed Implementation
[0043] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application.
[0044] It should be understood that the described embodiments are merely some, not all, of the embodiments in this application. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort are within the scope of protection of this application.
[0045] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.
[0046] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. The singular forms “a,” “the,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.
[0047] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.
[0048] like Figure 1 The present invention is a conventional variable gain amplifier, which includes a first amplifier U1, a second amplifier U2, a first resistor R1, a second resistor R2, and a third resistor R3.
[0049] The non-inverting input of the first amplifier U1 receives the first input signal Vip, and its output is connected to the first terminal of the first resistor R1. The inverting input is connected to the second terminal of the first resistor R1. The non-inverting input of the second amplifier U2 receives the second input signal Vim, and its output is connected to the first terminal of the second resistor R2. The inverting input is connected to the second terminal of the second resistor R2. The second terminal of the first resistor R1 is also connected to the first terminal of the third resistor R3. The second terminal of the second resistor R2 is also connected to the second terminal of the third resistor R3. The first terminal of the first resistor R1 serves as the first output terminal of the variable gain amplifier, outputting the first output signal Vop. The first terminal of the second resistor R2 serves as the second output terminal of the variable gain amplifier, outputting the second output signal Vom.
[0050] Ideally, the first input signal Vip is the same as the second input signal Vim. According to the negative feedback principle of integrated operation, the voltage signal Vip1 at the inverting input terminal of the first amplifier U1 is the same as the voltage signal Vim1 at the inverting input terminal of the second amplifier U2. That is, the voltage at the first and second terminals of the third resistor R3 is the same, and the current generated by the third resistor R3 is 0. Therefore, the output voltage at the first terminal of the first resistor R1 and the first terminal of the second resistor R2 is 0.
[0051] In reality, due to factors such as process deviations or environmental influences, there may be deviations between the first amplifier U1 and the second amplifier U2. That is, the voltage signal Vip1 at the inverting input terminal of the first amplifier U1 is different from the first input signal Vip, or the voltage signal Vim1 at the inverting input terminal of the second amplifier U2 is different from the second input signal Vim2. This causes the third resistor R3 to generate a non-zero current, and the first output signal Vop is the same as the second output signal Vom.
[0052] Understandably, when the first input signal Vip and the second input signal Vim are not the same, the above deviation will still affect the amplification result, resulting in an inaccurate difference between the output voltage at the first end of the first resistor R1 and the first end of the second resistor R2.
[0053] To address the aforementioned issues, this application provides the following: Figure 1 The variable gain amplifier shown also includes a first compensation voltage source.
[0054] The non-inverting input terminal of the first amplifier U1 receives the first input signal Vip, the output terminal is connected to the first terminal of the first resistor R1, and the inverting input terminal is connected to the second terminal of the first resistor R1 through the first compensation voltage source.
[0055] Wherein, the first end of the first resistor R1 serves as the first output terminal of the variable gain amplifier, outputting the first output signal Vop; the first end of the second resistor R1 serves as the first output terminal of the variable gain amplifier, outputting the second output signal Vom; the first compensation voltage source is connected to the first end of the first resistor R1 and the first end of the second resistor R2 respectively, and is used to control the compensation voltage of the first compensation voltage source based on the difference between the first output signal Vop and the second output signal Vom.
[0056] The control of the compensation voltage of the first compensation voltage source includes: controlling the first input signal Vip to be the same as the second input signal Vim, and the first compensation voltage source controlling the magnitude and direction of the compensation voltage based on the difference between the first output signal Vop and the second output signal Vom.
[0057] like Figure 2A The variable gain amplifier shown in this embodiment, compared with the prior art, provides a first compensation voltage source including a first current source I1 and a fourth resistor R4. The first end of the fourth resistor R4 is connected to the inverting input terminal of the first amplifier U1, the second end of the fourth resistor R4 is connected to the second end of the first resistor R1 and the first end of the third resistor R3 respectively, and the first current source I1 is connected to the first end of the fourth resistor R4.
[0058] In this embodiment, the direction of the first current source I1 outputting the first current includes flowing from the first end of the fourth resistor R4 to the second end of the fourth resistor R4, or flowing from the second end of the fourth resistor R4 to the first end of the fourth resistor R4 (only one scenario is shown in Figure 2). The direction and magnitude of the first current output by the first current source I1 are specifically determined by the difference between the first output signal Vop and the second output signal Vom.
[0059] For example, when the first input signal Vip and the second input signal Vim are the same, assuming that the difference between the first output signal Vop and the second output signal Vom is ΔV, when ΔV>0, the first current source I1 outputs the first current in the direction of flowing from the first end of the fourth resistor R4 to the second end of the fourth resistor R4, and vice versa.
[0060] The magnitude of the first current output by the first current source I1 can be obtained by direct calculation, binary search, or iterative traversal based on the difference between the first output signal Vop and the second output signal Vom.
[0061] In this embodiment, the deviation can be corrected by the first current source I1 and the fourth resistor R4. The structure is simple and the processing is flexible.
[0062] like Figure 2B Another variable gain amplifier shown is in Figure 2ABased on this, the first compensation voltage source also includes a second current source I2, which is connected to the inverting input terminal of the second amplifier U2.
[0063] In this embodiment, the direction of the second current output by the second current source I2 is the same as the direction of the first current output by the first current source I1, and the product of the magnitude of the first current output by the first current source I1 and the first resistor R1 is equal to the product of the magnitude of the second current output by the second current source I2 and the second resistor R2.
[0064] Specifically, this embodiment and Figure 2A Compared to the corresponding embodiment, the voltage drop that the current output by the first current source I1 may cause on the first resistor R1 is offset by the voltage drop caused by the second current output by the second current source I2 on the second resistor R2. This allows the variable gain amplifier to maintain good linearity for different first input signals Vip and second input signals Vim, and reduces the parameter requirements of the device. It is only necessary to maintain the mathematical relationship that the product of the first current output by the first current source I1 and the first resistor R1 is equal to the product of the second current output by the second current source I2 and the second resistor R2.
[0065] like Figure 2C Another variable gain amplifier shown is in Figure 2A Based on this, the first compensation voltage source also includes a third current source I3, a first switch S1, and a second switch S2. The first current source I1 is connected to the common terminal of the first switch S1, and the switching terminals of the first switch S1 are connected to the first terminal and the second terminal of the fourth resistor R4, respectively. The third current source I3 is connected to the common terminal of the second switch S2, and the switching terminals of the second switch S2 are connected to the first terminal and the second terminal of the fourth resistor R4, respectively. The magnitude of the first current output by the first current source I1 is the same as the magnitude of the third current output by the third current source I3.
[0066] In this embodiment, the connection position of the first switch S1 and the connection position of the second switch S2 are not on the same end of the fourth resistor R4. For the specific connection method, please refer to [link / reference needed]. Figure 2A In this embodiment, the current direction is controlled based on the difference between the first output signal Vop and the second output signal Vom, which will not be elaborated further here.
[0067] Specifically, in this embodiment, the magnitude of the first current output by the first current source I1 is the same as the magnitude of the current output by the third current source I3. Furthermore, the first current output by the first current source I1 and the third current output by the third current source I3 are mutually canceled by the first switch S1 and the second switch S2, so that no additional voltage drop is generated in the first resistor R1, thereby improving the linearity of the variable gain amplifier.
[0068] like Figure 3 Another variable gain amplifier shown is in Figure 2A , Figure 2B , Figure 2C The embodiment also includes a second compensation voltage source, which specifically includes: a fourth current source I4, a fifth current source I5, a third switch S3, a fourth switch S4, and a fifth resistor R5. The first end of the fifth resistor R5 is connected to the inverting input of the second amplifier U2, and the second end of the fifth resistor R5 is connected to the second end of the second resistor R2 and the second end of the third resistor R3. The fourth current source I4 is connected to the common terminal of the third switch S3, and the switching terminals of the third switch S3 are connected to the first and second terminals of the fifth resistor R5. The fifth current source I5 is connected to the common terminal of the fourth switch S4, and the switching terminals of the fourth switch S4 are connected to the first and second terminals of the fifth resistor R5. The magnitude of the fourth current output by the fourth current source I4 is the same as the magnitude of the fifth current output by the fifth current source I5.
[0069] In this embodiment, the first compensation voltage source and the second compensation voltage source work together to compensate for the deviation in the prior art, which can avoid the excessive requirements on the current source and resistor caused by only one compensation voltage source.
[0070] like Figure 4 Another variable gain amplifier is shown, in which a differential amplifier U3 is spaced between the first terminal of the first resistor R1, the first terminal of the second resistor R2, the first output terminal and the second output terminal of the variable gain amplifier. The non-inverting input terminal of the differential amplifier U3 is connected to the first terminal of the first resistor R1 through the sixth resistor R6. The inverting input terminal of the differential amplifier U3 is connected to the first terminal of the second resistor R2 through the seventh resistor R7. The inverting output terminal of the differential amplifier U3 is connected to the non-inverting input terminal of the differential amplifier U3 through the eighth resistor R8. The non-inverting output terminal of the differential amplifier U3 is connected to the inverting input terminal of the differential amplifier U3 through the ninth resistor R9. The inverting output terminal of the differential amplifier U3 serves as the first output terminal of the variable gain amplifier circuit, and the non-inverting output terminal of the differential amplifier U3 serves as the second output terminal of the variable gain amplifier circuit.
[0071] In this embodiment, the differential amplifier U3 can further amplify the differential signal output from the first terminal of the first resistor R1 and the first terminal of the second resistor R2 in the aforementioned embodiment.
[0072] This application also discloses a microprocessor chip, including a variable gain amplifier corresponding to any of the above embodiments. The microprocessor chip can be a micro central control chip, system-on-a-chip, etc., which can process digital signals, analog signals, or perform signal control, instruction processing and calculation functions, and is not limited thereto.
[0073] This application also discloses a sensor, including a variable gain amplifier corresponding to any of the above embodiments. The sensor amplifies the sensing signal through the variable gain amplifier. The sensor may include a light sensor, a pressure sensor, etc., and is not limited thereto.
[0074] Corresponding to the above embodiments, this application also provides a computer program product containing executable instructions that, when executed on a computer, cause the computer to perform some or all of the steps in the above method embodiments.
[0075] In this application embodiment, "at least one" refers to one or more, and "more than one" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent the existence of A alone, the simultaneous existence of A and B, or the existence of B alone. A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one of the following" and similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, and c can represent: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple.
[0076] Those skilled in the art will recognize that the units and algorithm steps described in the embodiments disclosed herein can be implemented using electronic hardware, computer software, or a combination of electronic hardware and software. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0077] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.
[0078] In the several embodiments provided in this application, any function, if implemented as a software functional unit and sold or used as an independent product, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.
[0079] The above description is merely a specific embodiment of this application. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the protection scope of this application. The protection scope of this application should be determined by the protection scope of the claims.
[0080] Other embodiments of this application will readily conceive of by those skilled in the art upon consideration of the specification and practice of this application. This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed in this application. The specification and embodiments are to be considered exemplary only, and the true scope and spirit of this application are indicated by the following claims.
[0081] It should be understood that this application is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this application is limited only by the appended claims.
Claims
1. An offset-compensated programmable gain amplifier characterized by, include: A first amplifier, a second amplifier, a first resistor, a second resistor, a third resistor, and a first compensation voltage source; The first amplifier receives the first input signal at its non-inverting input terminal, and its output terminal is connected to the first terminal of the first resistor. The second amplifier receives the second input signal at its non-inverting input terminal, and its output terminal is connected to the first terminal of the second resistor. The second end of the first resistor is connected to the first end of the third resistor, and the second end of the second resistor is connected to the second end of the third resistor; The inverting input terminal of the first amplifier is connected to the first terminal of the third resistor via a first compensation voltage source; The inverting input of the second amplifier is connected to the second terminal of the third resistor; The first compensation voltage source is connected to the first terminal of the first resistor and the first terminal of the second resistor respectively, and is used for negative feedback control of the compensation voltage of the first compensation voltage source.
2. The gain amplifier of claim 1, wherein, The first compensation voltage source includes: a fourth resistor and a first current source; The inverting input terminal of the first amplifier is connected to the first terminal of the third resistor via a first compensation voltage source, including: The first terminal of the fourth resistor is connected to the inverting input terminal of the first amplifier, and the second terminal of the fourth resistor is connected to the second terminal of the first resistor. The first current source is connected to the first terminal of the fourth resistor.
3. The gain amplifier of claim 2, wherein, Also includes: The second current source is connected to the inverting input of the second amplifier.
4. The gain amplifier of claim 3, wherein, The product of the magnitude of the first current output by the first current source and the first resistance is equal to the product of the magnitude of the second current output by the second current source and the second resistance.
5. The gain amplifier of claim 1, wherein, The first compensation voltage source includes: a first current source, a third current source, a first switch, a second switch, and a fourth resistor; The inverting input terminal of the first amplifier is connected to the first terminal of the third resistor via a first compensation voltage source, including: The first end of the fourth resistor is connected to the inverting input terminal of the first amplifier, and the second end of the fourth resistor is connected to the second end of the first resistor; The first current source is connected to the common terminal of the first switch, and the switching terminal of the first switch is connected to the first terminal and the second terminal of the fourth resistor, respectively. The third current source is connected to the common terminal of the second switch, and the switching terminal of the second switch is connected to the first terminal and the second terminal of the fourth resistor, respectively. The magnitude of the first current source outputting the first current is the same as the magnitude of the third current source outputting the third current.
6. The gain amplifier of claim 1, wherein, The gain amplifier further includes: a second compensation voltage source; The second compensation voltage source includes a fourth current source, a fifth current source, a third switch, a fourth switch, and a fifth resistor; The first end of the fifth resistor is connected to the inverting input terminal of the second amplifier, and the second end of the fifth resistor is connected to the second end of the second resistor; The fourth current source is connected to the common terminal of the third switch, and the switching terminal of the third switch is connected to the first and second terminals of the fifth resistor respectively. The fifth current source is connected to the common terminal of the fourth switch, and the switching terminal of the fourth switch is connected to the first and second terminals of the fifth resistor, respectively.
7. The gain amplifier of claim 6, wherein, The magnitude of the fourth current source outputting the fourth current is the same as the magnitude of the fifth current source outputting the fifth current.
8. The gain amplifier of claim 1, wherein, Also includes: A differential amplifier, wherein the first input terminal of the differential amplifier is connected to the first terminal of the first resistor, and the second input terminal of the differential amplifier is connected to the first terminal of the second resistor.
9. A microprocessing chip, characterized by Includes the gain amplifier described in any one of claims 1-8.
10. A sensor, characterized by Includes the gain amplifier described in any one of claims 1-8.