A multifunction adapter plate suitable for dual-side pin chips

By designing a multi-functional adapter board suitable for dual-pin chips, the problems of circuit board damage and resource waste during chip verification were solved, achieving multi-chip adaptation and cost savings.

CN224419010UActive Publication Date: 2026-06-26SHANGHAI HANGJIA ELECTRONICS TECH

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
SHANGHAI HANGJIA ELECTRONICS TECH
Filing Date
2025-06-24
Publication Date
2026-06-26

AI Technical Summary

Technical Problem

Existing technologies require frequent soldering and disassembly of components when verifying chip functionality, resulting in circuit board damage and waste. Furthermore, a single circuit board can only accommodate one type of chip, leading to resource waste and high costs.

Method used

Design a multi-functional adapter board with adapter lines and lead-out holes, suitable for dual-pin chips, and compatible with chips of various pin types and sizes. Testing is achieved through copper trace connections, avoiding frequent soldering that could damage the circuit board.

Benefits of technology

This invention enables testing of a single adapter board that can adapt to multiple chips, reducing resource waste, lowering costs, and improving work efficiency.

✦ Generated by Eureka AI based on patent content.

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    Figure CN224419010U_ABST
Patent Text Reader

Abstract

The utility model discloses a kind of multifunctional adapter plate suitable for bilateral pin chip, adapter circuit includes at least 4 lead-out holes and central chip welding area, lead-out hole is respectively connected to a pair of vertical edges in chip welding area by copper trace, copper trace is insulated in the part outside chip welding area, and it is bare in the part inside chip welding area, and the number of copper trace connected to a pair of vertical edges of chip welding area is same;Chip welding area central is provided with welding basic area, and the vertical edge of welding basic area corresponds to matching copper trace inner end;The spacing between the copper trace inner end of two groups is matched with the minimum target chip pin pitch, and the distance between a pair of vertical edges of chip welding area connected to copper trace corresponds to matching the maximum target chip pin pitch.The multifunctional adapter plate only needs an adapter plate to be able to adapt to weld various pin types of bilateral pin chip, and one adapter plate can be applied to the test of multiple types of pin chip, greatly save cost, improve work efficiency.
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Description

Technical Field

[0001] This utility model relates to an electrical device, and more particularly to a PCB adapter board. Background Technology

[0002] When developing and designing circuit boards, researchers need to verify the performance of the chips, such as... Figure 1 As shown, the conventional approach is to solder the chip onto the PCB board for debugging. The existing technical solution is to draw a full-function circuit board, solder all the components onto it, and then repeatedly verify the various functions on the circuit board until each function achieves the design purpose.

[0003] While existing technologies can verify chip functionality, the verification process requires frequent soldering and removal of components and solder lines. This inevitably damages copper traces or pads, leading to circuit board failure. Localized damage can render an entire circuit board unusable, resulting in significant waste. Furthermore, a single circuit board can only accommodate one specific chip size, further contributing to waste. Different chip sizes require different circuit boards for debugging, increasing costs considerably. Utility Model Content

[0004] The technical problem to be solved by this utility model is to provide a novel multi-functional adapter board suitable for double-sided pin chips. Only one adapter board is needed to adapt and solder double-sided pin chips with various pin types. One adapter board can be used for testing multiple types of pin chips, which greatly saves costs and improves work efficiency.

[0005] To solve this technical problem, the technical solution adopted by this utility model is as follows:

[0006] A multi-functional adapter board for dual-pin chips has an adapter circuit on at least one plane of the adapter board. The adapter circuit includes at least four lead-out holes on the edge of the adapter board and a square chip soldering area in the center of the adapter board. Each lead-out hole is connected to a pair of vertical sides of the chip soldering area by copper traces fixedly arranged on the surface of the adapter board. The copper traces are insulated outside the chip soldering area and exposed inside the chip soldering area.

[0007] The copper traces connected to the chip soldering area are arranged in parallel. The spacing between adjacent copper traces in each group of parallel copper traces is the same. The number of copper traces in the two groups of copper traces connected to a pair of vertical sides of the chip soldering area is the same, and the copper traces are matched and aligned in pairs. The copper traces in the chip soldering area can be matched and connected to the pins of chips with different pin types.

[0008] A square soldering base area is provided in the middle position between a pair of vertical sides of the chip soldering area connected to the copper trace. The vertical sides of the soldering base area correspond to the inner ends of the copper trace. The spacing between the two sets of inner ends of the copper trace connected to the vertical sides of the chip soldering area matches the minimum target chip pin spacing, and the distance between a pair of vertical sides of the chip soldering area connected to the copper trace matches the maximum target chip pin spacing.

[0009] Furthermore, the adapter circuit includes 56 lead-out holes disposed on the edge of the adapter plate.

[0010] Furthermore, the minimum spacing between the inner ends of the two sets of copper traces connected to a pair of vertical sides of the chip soldering area is 2.54mm, and the maximum width of the chip soldering area along the extension direction of the copper traces inside it is 36mm.

[0011] Furthermore, the adapter board has adapter lines on both its front and back sides.

[0012] Furthermore, in the adapter circuits on both sides, on one side, the spacing between the parallel copper traces connected to the chip soldering area is 0.5mm, the spacing between the inner ends of the two sets of copper traces connected to the vertical side of the chip soldering area is 2.54mm, and the width of the chip soldering area along the extension direction of the copper traces inside is 30mm; on the other side, the spacing between the parallel copper traces connected to the chip soldering area is 0.65mm, the spacing between the inner ends of the two sets of copper traces connected to the vertical side of the chip soldering area is 2.54mm, and the width of the chip soldering area along the extension direction of the copper traces inside is 36mm.

[0013] Using the adapter board of this invention, multiple lead-out holes are set on the edge and copper traces are configured. Two sets of long exposed copper traces are cleverly arranged in the chip soldering area to accommodate various types of two-pin chips. This allows a single adapter board to accommodate chips with multiple pin counts. After the chip is matched and soldered onto the chip soldering area of ​​the adapter board, the corresponding lead-out holes of the adapter board are connected to the full-function circuit board for testing and verification. Frequent soldering and desoldering during repeated verification will only damage the adapter board and not the full-function circuit board. This not only facilitates operation and saves costs, but also allows a single adapter board to accommodate chips of various sizes and types, greatly saving costs and improving work efficiency.

[0014] When both sides of the adapter board are equipped with the above two types of adapter lines, the adapter board can also support debugging and verification of multiple chips of two major categories with different pin parallel spacing. Attached Figure Description

[0015] To make the above-mentioned objectives, features and advantages of this utility model more apparent and understandable, the specific embodiments of this utility model will be described in detail below with reference to the accompanying drawings, wherein:

[0016] Figure 1 This is a schematic diagram of the structure for testing chip-on-circuit board bonding in existing technology.

[0017] Figure 2 This is a schematic diagram of the structure of the multifunctional PCB adapter board of this utility model.

[0018] In the picture:

[0019] 1. Lead-out hole 2. Chip soldering area

[0020] 201. Basic Welding Area 3. Copper Tracing Detailed Implementation

[0021] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments:

[0022] Figure 2 A multi-functional adapter board suitable for dual-pin chips has a square main body (or can be designed in other shapes), and an adapter line is provided on each of the two planes of the adapter board.

[0023] The adapter circuit includes 56 lead-out holes 1 located on the edge of the adapter board and a square chip soldering area 2 located in the center of the adapter board. Each lead-out hole 1 is connected to a pair of vertical sides (i.e., opposite left and right sides) of the chip soldering area 2 via copper traces 3 fixedly arranged on the surface of the adapter board. Figure 2 The description in this article takes the horizontal connection of copper trace 3 as an example. In this example, the copper trace 3 is connected in a set of opposite sides (which is a set of vertical sides). The copper trace 3 is in an insulated state outside the chip soldering area 2 and in an exposed state inside the chip soldering area 2.

[0024] The copper traces 3 connected to the chip soldering area 2 are arranged in parallel. The spacing between adjacent copper traces 3 in each group of parallel copper traces 3 is the same. The number of copper traces 3 connected to a pair of vertical sides (left and right sides) of the chip soldering area 2 is the same (28 traces each), and the copper traces are matched and aligned in pairs. The copper traces 3 in the chip soldering area 2 can be matched and connected to the pins of chips with different pin types (such as 8-pin, 14-pin, 16-pin, 20-pin, 28-pin, 40-pin double-sided pin chips, and chips with different pin spacing).

[0025] A square welding base area 201 is provided in the middle position between a pair of vertical sides of the chip welding area 2 connected to the copper trace 3. The vertical sides of the welding base area 201 correspond to the inner ends of the copper trace 3. The spacing between the inner ends of the two sets of copper traces 3 connected to the vertical sides of the chip welding area 2 matches the smallest target chip (chip that needs to be welded) pin spacing (i.e., the spacing between the pins on both sides of a double-sided pin chip). The distance between a pair of vertical sides of the chip welding area 2 connected to the copper trace 3 corresponds to the largest target chip pin spacing.

[0026] In order to accommodate the soldering of dual-sided pin chips with different pin pitches, the minimum spacing between the inner ends of the two sets of copper traces 3 connected to the pair of vertical sides of the chip soldering area 2 is usually 2.54mm, and the maximum width of the chip soldering area 2 along the extension direction of the copper traces 3 inside it is usually 36mm.

[0027] In the adapter circuitry on both sides of the adapter board, on one side, the spacing between the parallel copper traces 3 connected to the chip soldering area 2 is 0.5mm, the spacing between the inner ends of the two sets of copper traces 3 connected to a pair of vertical sides of the chip soldering area 2 is 2.54mm, and the width of the chip soldering area 2 along the extension direction of the copper traces 3 inside it is 30mm; on the other side, the spacing between the parallel copper traces 3 connected to the chip soldering area 2 is 0.65mm, the spacing between the inner ends of the two sets of copper traces 3 connected to the vertical sides of the chip soldering area 2 is 2.54mm, and the width of the chip soldering area 2 along the extension direction of the copper traces 3 inside it is 36mm. This allows the adapter board to accommodate two main types of chips: those with parallel pin spacing of 0.5mm or 0.65mm. Furthermore, this adapter board is compatible with all pin pitch types within each major chip category, ranging from 2.54mm to 36mm. The most commonly used chips have pin pitches of 5.08mm, 7.62mm, and 8.90mm. Additionally, this adapter board is compatible with various pin count types of dual-sided pin chips within each chip category, ranging from 2 to 56 pins. The most commonly used pin counts are 8, 14, 16, 20, 28, and 40 pins.

[0028] Depending on the specific requirements of the range of chip pin counts to be adapted, the edge of the adapter board may also be provided with 40, 28, 20, 16, 14, 8 lead holes 1, etc., as long as the chip soldering area 2 can be adapted to chips of various specifications.

[0029] The above description is merely a specific embodiment of this utility model, but the protection scope of this utility model is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this utility model should be included within the protection scope of this utility model. Therefore, the protection scope of this utility model should be determined by the scope of the claims.

Claims

1. A multi-functional adapter board suitable for dual-pin chips, characterized in that: A connection circuit is provided on at least one plane of the adapter board. The connection circuit includes at least four lead-out holes provided on the edge of the adapter board and a square chip soldering area provided in the center of the adapter board. Each lead-out hole is connected to a pair of vertical sides of the chip soldering area by copper traces fixedly arranged on the surface of the adapter board. The copper traces are insulated outside the chip soldering area and exposed inside the chip soldering area. The copper traces connected to the chip soldering area are arranged in parallel. The spacing between adjacent copper traces in each group of parallel copper traces is the same. The number of copper traces in the two groups of copper traces connected to a pair of vertical sides of the chip soldering area is the same, and the copper traces are matched and aligned in pairs. The copper traces in the chip soldering area can be matched and connected to the pins of chips with different pin types. A square soldering base area is provided in the middle position between a pair of vertical sides of the chip soldering area connected to the copper trace. The vertical sides of the soldering base area correspond to the inner ends of the copper trace. The spacing between the two sets of inner ends of the copper trace connected to the vertical sides of the chip soldering area matches the minimum target chip pin spacing, and the distance between a pair of vertical sides of the chip soldering area connected to the copper trace matches the maximum target chip pin spacing.

2. The adapter board according to claim 1, characterized in that: The adapter circuit includes 56 lead-out holes located on the edge of the adapter plate.

3. The adapter board according to claim 1, characterized in that: The minimum spacing between the inner ends of the two sets of copper traces connected to a pair of vertical sides of the chip soldering area is 2.54 mm, and the maximum width of the chip soldering area along the extension direction of the copper traces inside it is 36 mm.

4. The adapter plate according to any one of claims 1 to 3, characterized in that: The adapter board has adapter lines on both sides.

5. The adapter board according to claim 4, characterized in that: In the adapter circuits on both sides, on one side, the spacing between parallel copper traces connected to the chip soldering area is 0.5mm, the spacing between the inner ends of the two sets of copper traces connected to the vertical side of the chip soldering area is 2.54mm, and the width of the chip soldering area along the extension direction of the copper traces inside is 30mm; on the other side, the spacing between parallel copper traces connected to the chip soldering area is 0.65mm, the spacing between the inner ends of the two sets of copper traces connected to the vertical side of the chip soldering area is 2.54mm, and the width of the chip soldering area along the extension direction of the copper traces inside is 36mm.