Connector assemblies and their pin structures and electronic devices

Abstract

This disclosure relates to a connector assembly, its pin structure, and an electronic device. The pin structure includes: a ground pin group comprising a plurality of ground pins spaced apart along a first direction and adjacent to each other along a second direction; a first signal pin group comprising a first signal pin and a second signal pin spaced apart along the first direction between two adjacent ground pins; and a second signal pin group comprising a third signal pin and a fourth signal pin, one of which is disposed between the first and second signal pins of one first signal pin group, and the other between the first and second signal pins of another first signal pin group, with the third and fourth signal pins arranged adjacent to each other in the second direction. This pin structure can increase the signal pin density without sacrificing impedance and isolation.

Description

Technical Field

[0001] This disclosure relates to the field of connector assembly technology, and more specifically, to a connector assembly, its pin structure, and electronic devices. Background Technology

[0002] In existing high-speed array connector assemblies, one or more GND (Ground) pins are allocated between adjacent pairs of differential pins in each row. The GND pins serve as signal return and isolation for interference between differential pairs. This allocation scheme can accommodate a maximum of (M-1) / 3 pairs of differential lines per row, where M is the number of pins in each row (with one GND pin allocated to each side of adjacent differential pins). The density of high-speed differential pairs is relatively low. Utility Model Content

[0003] The purpose of this disclosure is to provide a connector assembly, its pin structure, and an electronic device thereof, which can increase the signal pin density without sacrificing impedance and isolation.

[0004] To achieve the above objectives, according to a first aspect of this disclosure, a pin structure for a connector assembly is provided, the pin structure comprising:

[0005] A grounding pin group includes a plurality of grounding pins arranged at intervals along a first direction and adjacent to each other along a second direction;

[0006] The first signal pin group includes a first signal pin and a second signal pin arranged at intervals between two adjacent ground pins along the first direction; wherein the signal amplitudes of the first signal pin and the second signal pin are the same, and their phases differ by 180 degrees; and

[0007] The second signal pin group includes a third signal pin and a fourth signal pin. One of the third signal pin and the fourth signal pin is located between the first signal pin and the second signal pin of one of the first signal pin groups; the other is located between the first signal pin and the second signal pin of another first signal pin group. The third signal pin and the fourth signal pin are arranged adjacent to each other in the second direction. The signal amplitudes of the third signal pin and the fourth signal pin are the same, and their phases differ by 180 degrees.

[0008] Optionally, at least two groups of the second signal pins arranged adjacent to each other in the second direction are staggered in the first direction.

[0009] Optionally, the dimensions of the third signal pin and the fourth signal pin are larger than the dimensions of the first signal pin and the second signal pin.

[0010] Optionally, within the same first signal pin group, the spacing between the first signal pin and its nearest ground pin along the first direction is equal to the spacing between the second signal pin and its nearest ground pin.

[0011] Optionally, within the same second signal pin group, along the first direction, the spacing between the third signal pin and the first signal pin is equal to the spacing between the third signal pin and the second signal pin;

[0012] Along the first direction, the distance between the fourth signal pin and the first signal pin is equal to the distance between the fourth signal pin and the second signal pin.

[0013] Optionally, along the first direction, the spacing between the third signal pin and the first signal pin, the spacing between the fourth signal pin and the first signal pin, and the spacing between the ground pin and the first signal pin are all equal.

[0014] According to a second aspect of this disclosure, a connector assembly is provided, the connector assembly including the pin structure described above.

[0015] Optionally, the connector assembly further includes a connector body, and the pin structure is disposed on the connector body.

[0016] Optionally, the connector is always a male connector or a female connector.

[0017] According to a third aspect of this disclosure, an electronic device is also provided, the electronic device including the connector assembly described above.

[0018] The connector assembly pin structure disclosed herein, based on the above technical solution, includes a ground pin group, a first signal pin group, and a second signal pin group. The ground pins of the ground pin group are spaced apart along a first direction and arranged adjacently along a second direction. The first signal pins and second signal pins of the first signal pin group are spaced apart along the first direction between adjacent ground pins. One of the third and fourth signal pins of the second signal pin group is located between the first and second signal pins of one first signal pin group, and the other is located between the first and second signal pins of another first signal pin group. The third and fourth signal pins are arranged adjacently in the second direction. Since the signal amplitudes of the first and second signal pins, and the third and fourth signal pins, are the same and their phases differ by 180 degrees, the pin structure of the connector assembly disclosed herein can increase the signal pin density without sacrificing impedance and isolation.

[0019] Other features and advantages of this disclosure will be described in detail in the following detailed description section. Attached Figure Description

[0020] The accompanying drawings are provided to further illustrate the present disclosure and form part of the specification. They are used together with the following detailed description to explain the present disclosure, but do not constitute a limitation thereof. In the drawings:

[0021] Figure 1 This is a schematic diagram of the pin arrangement of a connector assembly in related technologies;

[0022] Figure 2 This is a schematic diagram of the pin structure of a connector assembly provided in some embodiments of this disclosure;

[0023] Figure 3 This is a schematic diagram of the pin structure of a connector assembly provided in other embodiments of this disclosure;

[0024] Figure 4 This is a schematic diagram of the structure of some connector assemblies disclosed herein.

[0025] Explanation of reference numerals in the attached figures

[0026] 10 - Pin structure; 110 - Ground pin; 210 - First signal pin; 220 - Second signal pin; 310 - Third signal pin; 320 - Fourth signal pin; 20 - Connector body. Detailed Implementation

[0027] The specific embodiments of this disclosure will be described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are for illustration and explanation only and are not intended to limit this disclosure.

[0028] In this disclosure, unless otherwise stated, directional terms such as "inner" and "outer" refer to the inner and outer contours of the corresponding components; "far" and "near" refer to the corresponding structure or component being away from or near another structure or component. Furthermore, the terms "first," "second," etc., used in this disclosure are for distinguishing one element from another and do not have sequential or importance implications. Additionally, in the following description, when referring to the accompanying drawings, unless otherwise explained, the same reference numerals in different drawings denote the same or similar elements. The above definitions are for explanation and illustration only and should not be construed as limiting this disclosure.

[0029] In related technologies, the structure of a high-speed array connector assembly is as follows: Figure 1As shown, taking the first row as an example, one or more ground pins 110 (e.g., GND pins) are allocated between two adjacent pairs of differential pins. A first signal pin 210 and a second signal pin 220 (a differential pair) are arranged between the two ground pins 110. The function of the ground pins 110 (GND pins) is to serve as signal return and to isolate interference between differential pairs. This allocation scheme can arrange a maximum of (M-1) / 3 pairs of differential pins in a row, where M is the number of pins in each row (where a GND pin is allocated on both sides of two adjacent differential pins). That is, the high-speed differential pair arrangement density is (M-1) / (3M), which is low and cannot meet the needs of connector assemblies becoming smaller and the number of pins increasing.

[0030] The purpose of this disclosure is to provide a pin structure 10 for a connector assembly, a connector assembly including the pin structure 10, and an electronic device including the connector assembly, wherein the pin structure 10 can increase the signal pin density without sacrificing impedance and isolation.

[0031] To achieve the above objectives, such as Figures 2 to 4 As shown, according to a first aspect of the present disclosure, a pin structure 10 for a connector assembly is provided, the pin structure 10 including a ground pin group, a first signal pin group, and a second signal pin group. The grounding pin group includes a plurality of grounding pins 110 spaced apart along a first direction X and adjacent along a second direction Y; the first signal pin group includes a first signal pin 210 and a second signal pin 220 spaced apart along the first direction X between two adjacent grounding pins 110; wherein the signal amplitudes of the first signal pin 210 and the second signal pin 220 are the same and their phases differ by 180 degrees; the second signal pin group includes a third signal pin 310 and a fourth signal pin 320, one of which is located between the first signal pins 210 and the second signal pin 220 of one first signal pin group; the other is located between the first signal pins 210 and the second signal pin 220 of another first signal pin group, and the third signal pin 310 and the fourth signal pin 320 are adjacent along the second direction Y; wherein the signal amplitudes of the third signal pin 310 and the fourth signal pin 320 are the same and their phases differ by 180 degrees.

[0032] It should be noted that the first direction X and the second direction Y are perpendicular to each other. For ease of description, the pins arranged along the first direction X are defined as being in the same row; the pins arranged along the second direction Y are defined as being in the same column. In this disclosure, the ground pins are arranged at intervals in the row direction and adjacent to each other in the column direction.

[0033] Through the above technical solution, namely the pin structure 10 of the connector assembly of this disclosure, there are ground pin groups, a first signal pin group, and a second signal pin group. The ground pins 110 of the ground pin group are spaced apart along a first direction X and arranged adjacently along a second direction Y. The first signal pins 210 and 220 of the first signal pin group are spaced apart along the first direction X between adjacent ground pins 110. One of the third signal pin 310 and the fourth signal pin 320 of the second signal pin group is located between the first signal pins 210 and 220 of one first signal pin group, and the other is located between the first signal pins 210 and 220 of another first signal pin group. Since the signal amplitudes of the first signal pins 210 and 220, and the third signal pins 310 and 320, are the same and their phases differ by 180 degrees, the pin structure 10 of the connector assembly of this disclosure can increase the signal pin density without sacrificing impedance and isolation.

[0034] It should be noted that both the first and second signal pin groups are differential signals. The first signal pin group includes the first signal pin 210 and the second signal pin 220, and the second signal pin group includes the third signal pin 310 and the fourth signal pin 320. The signals of the first signal pin 210 and the second signal pin 220 have the same amplitude and are 180 degrees out of phase. The signals of the third signal pin 310 and the fourth signal pin 320 have the same amplitude and are 180 degrees out of phase. The amplitudes of the first signal pin 210 (or the second signal pin 220) and the third signal pin 310 (or the fourth signal pin 320) can be the same or different.

[0035] Understandably, the pins can be pins for male connectors and positioned on the connector body of the connector assembly. Alternatively, the pins can be recessed structures for female connectors and positioned on the base of the connector assembly. The connector body can be made of any suitable material, such as non-conductive composite materials or ceramics; please refer to relevant technical specifications for details.

[0036] The following explanation defines the arrangement of pins along the first direction X as rows and the arrangement of pins along the second direction Y as columns. For example... Figure 2 and Figure 3As shown, taking rows 1 and 2 as examples, a third signal pin 310 (2p) is inserted between the first signal pin 210 and the second signal pin 220 (1p and 1n) in the first row. Simultaneously, a fourth signal pin 320 (2n) is inserted between the first signal pin 210 and the second signal pin 220 (i.e., 3p and 3n) in the second row. Other pins are arranged similarly. This arrangement can increase the differential pair density to 3(M-1) / (8M), relative to... Figure 1 The pin structure 10 of the conventional connector assembly in the middle improves the high-speed differential pair arrangement density by 12.5%.

[0037] Regarding interference between differential pairs, although there is no ground pin 110 (GND pin) for isolation between 2p / 2n and 1p / 1n, and 3p / 3n, it does not lead to increased interference. The reason is as follows:

[0038] Let Xtalk_i_j represent the interference from j to i pin. For example, Xtalk_2p_1p represents the interference from 1p to 2p pin. Then the total interference experienced by pin 2p is:

[0039] Xtalk_2p_total=Xtalk_2p_1p+Xtalk_2p_1n+Xtalk_2p_3p+Xtalk_2p_3n

[0040] Since 2p / 2n and 3p / 3n are differential pairs, the p and n signals are 180 degrees out of phase, therefore:

[0041] Xtalk_2p_1p=-Xtalk_2p_1n, Xtalk_2p_3p=-Xtalk_2p_3n

[0042] This leads to the conclusion that:

[0043] Xtalk_2p_total=0

[0044] Similarly, it can be deduced that: Xtalk_2n_total=0

[0045] Therefore, for a 2p / 2n differential pair, although there is no isolation grounding pin nearby, the interference from 1p / 1n and 3p / 3n is theoretically 0 (of course, since the phase of the differential pair is not strictly 180 degrees in engineering, there will still be a slight interference in reality, which can be ignored here).

[0046] For 1p / 1n or 3p / 3n, the interference from 2p / 2n can also be theoretically deduced to be 0.

[0047] It should be noted that in actual use, there will also be interference between 1p / 1n and 3p / 3n. However, since 1p / 1n and 3p / 3n belong to different rows, the interference between them can be significantly reduced by adjusting the row spacing or by making adjacent rows staggered by a certain distance in the horizontal direction.

[0048] In some embodiments, the row spacing (i.e., the distance in the second direction Y) between the same second signal pin group or between two adjacent second signal pin groups can be appropriately increased to reduce crosstalk between 1p / 1n and 3p / 3n, or to reduce crosstalk between 2p / 2n groups, and between 3p / 3n and 1p / 1n.

[0049] In some embodiments, in two adjacent second signal pin groups, the distance L2 (i.e., the distance in the second direction Y) between the row containing the third signal pin 310 of one second signal pin group and the row containing the fourth signal pin 320 of the other second signal pin group is greater than or equal to the distance L1 (i.e., the distance in the second direction Y) between the row containing the third signal pin 310 and the row containing the fourth signal pin 320 of the same second signal pin group. Figure 3 As shown, the third signal pin 310 and the fourth signal pin 320 of the second signal pin group are arranged in the first and second rows, respectively. Therefore, the spacing between two adjacent second signal pin groups is made slightly larger, that is, the spacing L2 between the second and third rows is increased to be greater than the spacing L1 between the first and second rows, in order to reduce the interference of the first signal pin 210 (3p) in the second row to the first signal pin 210 (1p) in the third row, and the second signal pin 220 (3n) in the second row to the second signal pin 220 (1n) in the third row. Of course, the spacing between the first and second rows and the second and third rows can also be increased at the same time, that is, the row spacing can be increased to reduce inter-row crosstalk.

[0050] In other embodiments, at least two adjacent second signal pin groups arranged in the second direction Y are staggered in the first direction X. That is, among the multiple second signal pin groups located between two adjacent rows of ground pins 110, adjacent two second signal pin groups are staggered in the column direction. Specifically, the first signal pins 210 and 220 of the row containing the third signal pin 310 of one second signal pin group and the first signal pins 210 and 220 of the row containing the fourth signal pin 320 of another second signal pin group can be staggered in the column direction. For example, by staggering the first signal pin 210 (3p) of the second row of the second column and the first signal pin 210 (1p) of the third row in column 2, and staggering the second signal pin 220 (3n) of the second row of the fourth column and the second signal pin 220 (1n) of the third row in column 4, the interference of the first signal pin 210 (3p) of the second row to the first signal pin 210 (1p) of the third row, and the interference of the second signal pin 220 (3n) of the second row to the second signal pin 220 (1n) of the third row, can also be reduced.

[0051] In some other embodiments, a combination of the two methods described above (i.e., staggered arrangement in columns and increased distance between rows) can be used to achieve interference between the first signal pin 210 and the second signal pin 220 between different rows.

[0052] It should be noted that the interference between the third signal pin 310 and the fourth signal pin 320 between different second signal pin groups can also be adjusted in the manner described above.

[0053] In some embodiments, the amplitudes of the first signal pin group and the second signal pin group can be the same. Specifically, the first signal pin 210 and the second signal pin 220 of the first signal pin group are differential signal pin groups, and the second signal pin group includes the third signal pin 310 and the fourth signal pin 320, which are also differential signal pins. The signals of the first signal pin 210, the second signal pin 220, the third signal pin 310, and the fourth signal pin 320 have the same amplitude, and the signals of the first signal pin 210, the second signal pin 220, the third signal pin 310, and the fourth signal pin 320 have opposite phases (i.e., a phase difference of 180 degrees). Therefore, by utilizing the characteristics of the same amplitude and opposite phase, the arrangement described above can better improve the density of high-speed differential pairs without sacrificing impedance and isolation.

[0054] It should be noted that the signal amplitudes of the third signal pin 310 and the fourth signal pin 320 may also be different from the signal amplitudes of the first signal pin 210 and the second signal pin 220. For example, they may be smaller than the signal amplitudes of the first signal pin 210 and the second signal pin 220. Since both the first signal pin group and the second signal pin group are differential signal groups, the two signal pins in the same pair of signal pin groups can cancel each other out to ensure that crosstalk is not increased.

[0055] Regarding differential pair impedance control, the characteristic impedance of the differential pair needs to be controlled to Z0. The characteristic impedance of the differential pair is related to the distance L from the signal pin to the GND pin; the larger L is, the larger the characteristic impedance. It is also related to the distance S between the p and n pins (pins) within the differential pair; the larger S is, the larger the characteristic impedance. In addition, it is also related to the pin size; the larger the pin size, the smaller the characteristic impedance.

[0056] From the above three points, we can deduce that: for the same pin size, the differential characteristic impedance of 2p / 2n will be greater than that of 1p / 1n and 3p / 3n; for the same pin size, the differential characteristic impedance of 1p / 1n and 3p / 3n is the same. Therefore, in order to ensure that the characteristic impedance of all differential pairs is Z0, the pin size of 2p / 2n must be larger than the size between 1p / 1n and 3p / 3n.

[0057] In some embodiments of this disclosure, the dimensions of the third signal pin 310 and the fourth signal pin 320 are larger than the dimensions of the first signal pin 210 and the second signal pin 220. Here, the pin size refers to the cross-sectional area of ​​the pin, which can also be understood as the area through which current or signals flow. For example, the third signal pin 310 and the fourth signal pin 320 may have the same dimensions, as may the first signal pin 210 and the second signal pin 220. Furthermore, the dimensions of the third signal pin 310 and the fourth signal pin 320 must be larger than those of the first signal pin 210 and the second signal pin 220 to reduce the characteristic impedance between 2p / 2n pairs. This ensures that the differential characteristic impedance of 2p / 2n is equal to the differential characteristic impedance of 1p / 1n and 3p / 3n pairs, guaranteeing that the characteristic impedance of all differential pairs is Z0.

[0058] Optionally, in the two rows containing the same second signal pin group, the row spacing between the ground pins 110 is equal; for example... Figure 2 As shown, in rows 1 and 2, the column spacing (i.e., the spacing between two adjacent ground pins 110 in the same column) between corresponding two ground pins 110 in columns 1, 5, and M is the same. Similarly, in rows 3 and 4, the column spacing (i.e., the spacing between two adjacent ground pins 110 in the same column) between corresponding two ground pins 110 in columns 1, 5, and M is also the same.

[0059] It should be noted that in adjacent rows containing two second signal pin groups, for example, in rows 2 and 3, and columns 1, 5, ... M, the column spacing between corresponding ground pins 110 (i.e., the spacing between two adjacent ground pins 110 in the same column) can also be the same. However, the column spacing between two ground pins 110 between rows 2 and 3 can be greater than or equal to the spacing between two ground pins 110 between rows 1 and 2, or between rows 3 and 4. This is mainly to cooperate with the signal pins in rows 2 and 3, isolating the signal pins while reducing or avoiding crosstalk between signal pins in rows 2 and 3.

[0060] In some embodiments, the row spacing between the first signal pin groups is equal in two adjacent rows containing two adjacent second signal pin groups. For example... Figure 2 As shown, in rows 1 and 2, and columns 2, 4, ..., M-1, the column spacing (i.e., the spacing between two adjacent non-differential signal pin pairs in the same column) between corresponding first signal pins 210 and corresponding second signal pins 220 is the same. Similarly, in rows 3 and 4, and columns 2, 4, ..., M, the column spacing between corresponding first signal pins 210 and second signal pins 220 is also the same. This design facilitates the arrangement and manufacturing of the first signal pin group.

[0061] In some embodiments, in adjacent rows containing two adjacent second signal pin groups, the row spacing between the third signal pin 310 and the fourth signal pin is equal. For example... Figure 2 As shown, in rows 1 and 2, and columns 3, 7, ... M-2, the column spacing between the corresponding third signal pin 310 and fourth signal pin 320 (i.e., the spacing between the third signal pin 310 and fourth signal pin 320 of the second signal pin group within the same column) is the same. Similarly, in rows 3 and 4, and columns 3, 7, ... M-2, the column spacing between the third signal pin 310 and fourth signal pin 320 is also the same. This design facilitates the arrangement and manufacturing of the second signal pin group.

[0062] like Figure 2 and Figure 3As shown, in some embodiments, the column spacing between ground pins 110 is equal. Here, column spacing refers to the distance between each column, i.e., the distance in the second direction Y. Specifically, in all rows, the column spacing between the ground pins 110 in the first column and the ground pins 110 in the fifth column is the same, and the column spacing between the ground pins 110 in the fifth column and the ground pins 110 in the ninth column is the same. This arrangement makes it easier to arrange the ground pins 110.

[0063] In some embodiments, within the same first signal pin group, along the first direction X, the spacing between the first signal pin 210 and its nearest ground pin 110 is equal to the spacing between the second signal pin 220 and its nearest ground pin 110. That is, the column spacing between the first signal pin 210 and its nearest ground pin 110 is equal to the column spacing between the second signal pin 220 and its nearest ground pin 110. Figure 3 As shown, the spacing between the first signal pin 210 in the first row and second column and the ground pin 110 in the first column is equal to the spacing between the second signal pin 220 in the fourth column and the ground pin 110 in the fifth column of the first row, so that the differential signal impedances of the first signal pin 210 and the second signal pin 220 are the same. It should be noted that in the second row, third row, and all subsequent rows, the spacing between the first signal pin 210 in the second column and the ground pin 110 in the first column is equal to the spacing between the second signal pin 220 in the fourth column and the ground pin 110 in the fifth column of the second row, third row, and all subsequent rows, so that the characteristic impedances of multiple first signal pin groups are the same, improving the stability of the connector assembly.

[0064] Because a third signal pin 310 or a fourth signal pin 320 is inserted between the first signal pin 210 and the second signal pin 220 in the same row, to avoid signal interference caused by the different spacing between the inserted signal pin and the first signal pin 210 and the second signal pin 220, in some embodiments, in the same second signal pin group, along the first direction X, the spacing between the third signal pin 310 and the first signal pin 210 is equal to the spacing between the third signal pin 310 and the second signal pin 220; along the first direction X, the spacing between the fourth signal pin 320 and the first signal pin 210 is equal to the spacing between the fourth signal pin 320 and the second signal pin 220.

[0065] Specifically, the column spacing between the third signal pin 310 and the first signal pin 210 and the second signal pin 220 is equal to the column spacing between the fourth signal pin 320 and the first signal pin 210 and the second signal pin 220. In the first and second rows, the column spacing between the third signal pin 310 and the first signal pin 210 and the second signal pin 220 in the third column is the same, and the column spacing between the fourth signal pin 320 and the first signal pin 210 and the second signal pin 220 in the third column is also the same, further reducing or avoiding interference from the inserted third signal pin 310 and fourth signal pin 320 to other signal pins. This also simplifies the design and manufacturing process, thereby reducing costs.

[0066] In some embodiments, the distance between the third signal pin 310 and the fourth signal pin 320 in the two rows forming the differential pair is the same, also for ease of manufacturing. In addition, it should be noted that in order to ensure that the characteristic impedance of all differential pairs is Z0, the size (cross-sectional area) of the third signal pin 310 and the fourth signal pin 320 needs to be larger than the size of the first signal pin 210 and the second signal pin 220. The specific size parameters can be determined after testing in actual use, and will not be elaborated here.

[0067] like Figure 3As shown, in some embodiments, along the first direction X, the spacing between the third signal pin 310 and the first signal pin 210, the spacing between the fourth signal pin 320 and the first signal pin 210, and the spacing between the ground pin 110 and the first signal pin 210 are all equal. That is, a column of first signal pins 210 and a column of second signal pins 220 are arranged between two adjacent columns of ground pins 110. The first signal pins 210 and the second signal pins 220 in the same row form a differential pair (first signal pin group). To further increase the density of signal pairs, a column is inserted between the column of the first signal pins 210 and the column of the second signal pins 220. This column includes a second signal pin group formed by the third signal pins 310 and the fourth signal pins 220. The third signal pins 310 and the fourth signal pins 320 between two adjacent rows form a differential pair. The third signal pin 310 is located in one of the rows and is positioned between the first signal pins 210 and the second signal pin 220. Between the second signal pin 220, the fourth signal pin 320 is located in an adjacent row and between the first signal pin 210 and the second signal pin 220. The two can correspond one-to-one in this column, that is, the distance between the third signal pin and its adjacent first signal pin 210 and second signal pin 220 is equal. Similarly, the distance between the fourth signal pin 320 and its adjacent first signal pin 210 and second signal pin 220 is also equal, which can further facilitate manufacturing. Similarly, when the amplitudes of the differential signals formed by the first signal pin group and the second signal pin group are the same or different, because the phases are opposite (i.e., the phase difference is 180 degrees), mutual interference can be avoided.

[0068] It should be noted that differential pairs formed by some second signal pin groups located in the same column (i.e., third signal pin 310 and fourth signal pin 320) can be staggered. Correspondingly, in the two rows where the staggered differential pairs are located, the corresponding first signal pins 210 and second signal pins 220 in the column direction can also be staggered. However, it is necessary to ensure that the column spacing between the first signal pins 210 and second signal pins 220 corresponding to each second signal pin group and the ground pin 110 is the same, and the column spacing between the third signal pin 310 and fourth signal pin 320 and the first signal pins 210 and second signal pins 220 are also the same, respectively. This can also increase the layout density and reduce interference. For interference or impedance differences between the two or between the third signal pins 310 and fourth signal pins 220 and adjacent first signal pins 210 or second signal pins 220, adjustments can be made by changing the dimensions of the third signal pins 310 and fourth signal pins 320.

[0069] like Figure 4As shown, according to a second aspect of this disclosure, a connector assembly is provided, which includes the pin structure 10 described above. Since this connector assembly employs the pin structure 10, a second signal pin group is inserted between two corresponding first signal pin groups on adjacent rows (i.e., between the first signal pin 210 and the second signal pin 220), and the third signal pin 310 of the second signal pin group is located between the first signal pin 210 and the second signal pin 220 in the previous row, and the fourth signal pin 320 of the second signal pin group is located between the first signal pin 210 and the second signal pin 220 in the next row, this connector assembly also possesses all the advantages of the pin structure 10 described above, which will not be elaborated upon here.

[0070] To ensure that the characteristic impedance of all differential pairs is Z0, the dimensions of the third signal pin 310 and the fourth signal pin 320 can optionally be larger than the dimensions of the first signal pin 210 and the second signal pin 220. Since the characteristic impedance is smaller with larger pin sizes, the dimensions of the third signal pin 310 and the fourth signal pin 320 are increased to make them the same as the differential characteristic impedance of 1p / 1n and 3p / 3n.

[0071] Optionally, the connector assembly further includes a connector body 20, with pin structures 10 disposed on the connector body 20. The connector assembly can be a high-speed array connector assembly, which may include the connector body 20, with the pin structures 10 arranged in a matrix on the connector body 20.

[0072] Optionally, the connector assembly can be either a male connector or a female connector. When the connector assembly is a male connector, the pin structure 10 can be pins on the connector body 20, forming a raised structure for mating with the female connector. When the connector assembly is a female connector, the pin structure 10 can be a groove (or recess) arranged on the connector body 20 (or base) for connecting the male connector pins.

[0073] According to a third aspect of this disclosure, an electronic device is also provided, which includes the connector assembly described above, and therefore also possesses all the advantages of the connector assembly described above. The connector can be a male connector and / or a female connector; that is, the pin structure 10 of the male connector assembly can be pin-shaped, and the female connector can be groove-shaped, and the two can be mated together to achieve signal transmission.

[0074] The connector assembly pin structure 10, connector assembly, and electronic device disclosed herein may include a ground pin group, a first signal pin group, and a second signal pin group. The ground pin group comprises multiple ground pins 110 arranged in a matrix along rows and columns. The first signal pins 210 and 220 of the first signal pin group are spaced apart between adjacent ground pins 110 in each row. One of the third signal pins 310 and the fourth signal pin 320 of the second signal pin group is located between the first signal pins 210 and 220 in one of two adjacent rows, and the other is located between the first signal pins 210 and 220 in another of two adjacent rows. Since the signal phase difference between the first signal pins 210 and 220, and between the third signal pins 310 and the fourth signal pins 320, is 180 degrees, the connector assembly pin structure 10, connector assembly, and electronic device disclosed herein can increase the signal pin density without sacrificing impedance and isolation.

[0075] The preferred embodiments of the present disclosure have been described in detail above with reference to the accompanying drawings. However, the present disclosure is not limited to the specific details of the above embodiments. Within the scope of the technical concept of the present disclosure, various simple modifications can be made to the technical solutions of the present disclosure, and these simple modifications all fall within the protection scope of the present disclosure.

[0076] It should also be noted that the various specific technical features described in the above specific embodiments can be combined in any suitable manner without contradiction. In order to avoid unnecessary repetition, this disclosure will not describe the various possible combinations separately.

[0077] Furthermore, various different embodiments of this disclosure can be combined in any way, as long as they do not violate the spirit of this disclosure, they should also be regarded as the content disclosed in this disclosure.

Claims

1. A pin structure of a connector assembly, characterized by, The pin structure includes: A grounding pin group includes a plurality of grounding pins arranged at intervals along a first direction and adjacent to each other along a second direction; The first signal pin group includes a first signal pin and a second signal pin arranged at intervals between two adjacent ground pins along the first direction; wherein the signal amplitudes of the first signal pin and the second signal pin are the same, and their phases differ by 180 degrees; and The second signal pin group includes a third signal pin and a fourth signal pin. One of the third signal pin and the fourth signal pin is located between the first signal pin and the second signal pin of one of the first signal pin groups; the other is located between the first signal pin and the second signal pin of another first signal pin group. The third signal pin and the fourth signal pin are arranged adjacent to each other in the second direction. The signal amplitudes of the third signal pin and the fourth signal pin are the same, and their phases differ by 180 degrees.

2. The pin structure according to claim 1, characterized in that, At least two groups of the second signal pins arranged adjacent to each other in the second direction are staggered in the first direction.

3. The pin structure according to claim 1, characterized in that, The dimensions of the third signal pin and the fourth signal pin are larger than the dimensions of the first signal pin and the second signal pin.

4. The pin structure according to any one of claims 1-3, characterized in that, In the same first signal pin group, along the first direction, the spacing between the first signal pin and its nearest ground pin is equal to the spacing between the second signal pin and its nearest ground pin.

5. The pin structure according to claim 4, characterized in that, In the same second signal pin group, along the first direction, the spacing between the third signal pin and the first signal pin is equal to the spacing between the third signal pin and the second signal pin; Along the first direction, the distance between the fourth signal pin and the first signal pin is equal to the distance between the fourth signal pin and the second signal pin.

6. The pin structure according to claim 5, characterized in that, Along the first direction, the spacing between the third signal pin and the first signal pin, the spacing between the fourth signal pin and the first signal pin, and the spacing between the ground pin and the first signal pin are all equal.

7. A connector assembly, characterized in that, The connector assembly includes the pin structure as described in any one of claims 1-6.

8. The connector assembly according to claim 7, characterized in that, The connector assembly also includes a connector body, and the pin structure is disposed on the connector body.

9. The connector assembly according to claim 7, characterized in that, The connector assembly is either a male connector or a female connector.

10. An electronic device, characterized in that, The electronic device includes the connector assembly as described in any one of claims 7-9.

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