A sleep current detection circuit with overcurrent protection function
By designing a dormant current detection circuit with overcurrent protection, and utilizing a switch control module, an overcurrent protection module, and a current detection chip, the problem of component damage during dormant current testing was solved, achieving fast and accurate current detection and protection.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- JHETECH
- Filing Date
- 2025-05-29
- Publication Date
- 2026-07-03
AI Technical Summary
During the mass production stage, the dormant current test is complex and can easily damage precision components. Existing test fixtures cannot provide fast and accurate overcurrent protection.
Design a dormant current detection circuit with overcurrent protection function, including a switch control module, an overcurrent protection module and a dormant current detection module. The overcurrent protection module is composed of components such as PMOS transistors, transistors and capacitors, and the current detection chip realizes current detection and protection.
It enables accurate detection and timely protection of dormant current, avoiding damage to precision components from high current and ensuring the accuracy and stability of testing.
Smart Images
Figure CN224456883U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the technical field of current detection, and in particular to a dormant current detection circuit with overcurrent protection function. Background Technology
[0002] In the electronics manufacturing industry, as the overall process progresses and products reach the mass production stage (i.e., batch manufacturing), functional testing is often conducted after production is complete. Due to time constraints, product testing on the production line needs to be completed quickly and accurately. However, given the large number of products and their complex functions, manual testing by production line personnel alone cannot meet the time and accuracy requirements. To address this issue, a test fixture is often developed concurrently with the product during the mass production stage for product testing.
[0003] The test fixture allows for different functional tests via keyboard input. Some lighting fixtures require sleep current testing, a relatively complex requirement for ordinary fixtures. To meet sleep current testing needs, the fixture requires meticulous current detection. However, abnormal conditions or lamp startup may cause an increase in the current output of the test power supply, potentially damaging delicate components in the circuit. It is crucial to shut down the fixture promptly after excessive current is detected to avoid further damage to these components. Utility Model Content
[0004] To minimize the impact of excessive current on precision components, this application provides a dormant current detection circuit with overcurrent protection function.
[0005] The dormant current detection circuit with overcurrent protection function provided in this application adopts the following technical solution:
[0006] A quiescent current detection circuit with overcurrent protection function, based on a controller, includes a switch control module, an overcurrent protection module, and a quiescent current detection module. The output terminal of the controller is electrically connected to the control terminal of the switch control module, the voltage output terminal of the test power supply is electrically connected to the input terminal of the overcurrent protection module, the control terminal of the overcurrent protection module is electrically connected to the input terminal of the switch control module, and the output terminal of the switch control module is grounded. The output terminal of the overcurrent protection module is electrically connected to the input terminal of the quiescent current detection module, and the output terminal of the quiescent current detection module is electrically connected to the input terminal of the controller.
[0007] By adopting the above technical solution, when sleep detection is required, the controller activates the control switch module, thereby starting the overcurrent protection module. At this time, the output current of the test power supply can be input to the sleep current detection module through the overcurrent protection module, allowing the controller to receive the specific value of the sleep current. When an overcurrent occurs, the overcurrent protection module can promptly cut off the current output, preventing damage to the precision components within the sleep current detection module from a large current.
[0008] Preferably, the overcurrent protection module includes PMOS transistors Q1, Q2, and Q3; the voltage output terminal of the test power supply is electrically connected to the drain of PMOS transistor Q1, the source of PMOS transistor Q1 is electrically connected to the source of PMOS transistor Q2 through resistor R1, and the drain of PMOS transistor Q2 is set as the output terminal of the overcurrent protection module; the gate of PMOS transistor Q1 is electrically connected to the gate of PMOS transistor Q2, and the gate of PMOS transistor Q2 is electrically connected to the source of PMOS transistor Q2 through resistor R2, and the gate of PMOS transistor Q2 is also electrically connected to the input terminal of the switch control module through resistor R3; the base of transistor Q3 is electrically connected to the source of PMOS transistor Q2, the emitter of transistor Q3 is electrically connected to the source of PMOS transistor Q1, and the collector of transistor Q3 is electrically connected to the input terminal of the switch control module through resistor R3.
[0009] By adopting the above technical solution, under normal circumstances, PMOS transistors Q1 and Q2 are turned on, while transistor Q3 is turned off. At this time, the current from the test power supply can be input to the sleep current detection module sequentially through PMOS transistor Q1, resistor R1, and PMOS transistor Q2. As the current from the test power supply increases, the voltage across resistor R1 gradually increases. When the conduction condition of transistor Q3 is met, transistor Q3 turns on, thereby turning off PMOS transistors Q1 and Q2, thus cutting off the path for large current to flow into the sleep current detection module.
[0010] Preferably, the overcurrent protection module further includes a capacitor C1, one end of which is electrically connected to the source of the PMOS transistor Q2, and the other end of which is electrically connected to the gate of the PMOS transistor Q2.
[0011] By adopting the above technical solution, capacitor C1 plays the role of filtering and stabilizing voltage.
[0012] Preferably, the switch control module includes an NMOS transistor Q4, a resistor R4, and a resistor R5. The output terminal of the controller is grounded sequentially through the resistor R4 and the resistor R5, and the connection point between the resistor R4 and the resistor R5 is electrically connected to the gate of the NMOS transistor Q4. The source of the NMOS transistor Q4 is grounded, and the drain of the NMOS transistor Q4 is electrically connected to the control terminal of the overcurrent protection module.
[0013] By adopting the above technical solution, the voltage division effect of resistors R4 and R5 ensures that the gate voltage of NOMS transistor Q4 is precisely controlled; and when the controller outputs a high level, NOMS transistor Q4 is turned on, thus enabling the overcurrent protection module.
[0014] Preferably, the switch control module further includes a capacitor C2, one end of which is electrically connected to the gate of the NMOS transistor Q4, and the other end of which is grounded.
[0015] By adopting the above technical solution, capacitor C2 can play the role of filtering and stabilizing the gate voltage, which helps to eliminate noise interference and makes the gate signal of NMOS transistor Q4 more stable.
[0016] Preferably, the sleep current detection module includes a current detection chip U1, the output terminal of the overcurrent protection module is electrically connected to pin 7 of the current detection chip U1, and the output terminal of the overcurrent protection module is also electrically connected to pin 8 of the current detection chip U1 through a resistor R6. Pin 8 of the current detection chip U1 is electrically connected to the lamp terminal; pin 5 of the current detection chip U1 is electrically connected to the input terminal of the controller.
[0017] By adopting the above technical solution, the current detection chip U1 is used to accurately detect the dormant current and feed the detection result back to the controller, so that the controller can understand the dormant current status of the circuit in real time.
[0018] Preferably, the sleep current detection module further includes a diode D1, with pin 8 of the current detection chip U1 electrically connected to the positive terminal of the diode D1, and the negative terminal of the diode D1 electrically connected to the lamp terminal.
[0019] By adopting the above technical solution, diode D1 plays a unidirectional conduction role, thereby preventing the current from the lamp terminal from flowing back into the current detection chip U1 and protecting the current detection chip U1 from damage by reverse current.
[0020] Preferably, pin 5 of the current detection chip U1 is grounded through capacitor C4.
[0021] By adopting the above technical solution, the output signal of the current detection chip U1 can be filtered by setting capacitor C4, reducing noise and interference components in the signal, making the signal fed back to the controller more stable and clear.
[0022] In summary, this application includes at least one of the following beneficial technical effects:
[0023] 1. Through the precise design of the overcurrent protection module, when an overcurrent occurs in the circuit, the protection mechanism can be quickly triggered, turning on transistor Q3 and turning off PMOS transistors Q1 and Q2, thereby cutting off the input to the sleep detection module and effectively avoiding component damage caused by overcurrent.
[0024] 2. The sleep current detection module uses a current detection chip U1, and by setting diode D1 and capacitor C4, the accuracy and stability of the detection can be ensured. This allows for real-time and accurate detection of the current in the circuit during sleep mode, and the detection results are fed back to the controller to realize sleep current detection. Attached Figure Description
[0025] Figure 1 This is a schematic block diagram of an embodiment of this application;
[0026] Figure 2 This is a circuit diagram of the overcurrent protection module and the switch control module in the embodiments of this application;
[0027] Figure 3 This is a circuit diagram of the sleep current detection module in an embodiment of this application.
[0028] Reference numerals: 100, controller; 1, switch control module; 2, overcurrent protection module; 3, sleep current detection module. Detailed Implementation
[0029] The following is in conjunction with the appendix Figure 1-3 This application will be described in further detail.
[0030] This application discloses a dormant current detection circuit with overcurrent protection function.
[0031] Reference Figure 1A quiescent current detection circuit with overcurrent protection is based on a controller 100, including a switch control module 1, an overcurrent protection module 2, and a quiescent current detection module 3. The output of the controller 100 is electrically connected to the control terminal of the switch control module 1, the voltage output of the test power supply is electrically connected to the input terminal of the overcurrent protection module 2, the control terminal of the overcurrent protection module 2 is electrically connected to the input terminal of the switch control module 1, and the output terminal of the switch control module 1 is grounded. The output terminal of the overcurrent protection module 2 is electrically connected to the input terminal of the quiescent current detection module 3, and the output terminal of the quiescent current detection module 3 is electrically connected to the input terminal of the controller 100. The controller 100 can control the switch control module 1 to start or stop the overcurrent protection module 2, thereby affecting the operating state of the quiescent current detection module 3. When the quiescent current abnormally increases, the overcurrent protection module 2 can act promptly to prevent damage to the quiescent current detection module 3 from the large current.
[0032] refer to Figure 2 The switch control module 1 includes an NMOS transistor Q4, resistors R4 and R5. The output terminal SLEEP_C of the controller 100 is grounded through resistors R4 and R5, and the connection point between resistors R4 and R5 is electrically connected to the gate of the NMOS transistor Q4. The source of the NMOS transistor Q4 is grounded, and the drain of the NMOS transistor Q4 is electrically connected to the control terminal of the overcurrent protection module 2. Preferably, the switch control module 1 also includes a capacitor C2. One end of the capacitor C2 is electrically connected to the gate of the NMOS transistor Q4, and the other end of the capacitor C2 is grounded. By setting capacitor C2, the stability of the output signal of the SLEEP_C terminal of the controller 100 can be improved.
[0033] When current detection is required, the controller 100 outputs a start signal at its SLEEP_C terminal. This start signal is divided by resistors R4 and R5 and then reaches the gate of the NMOS transistor Q4, turning on Q4. At this time, the control terminal of the overcurrent protection module 2 is grounded and the overcurrent protection function is activated. By adjusting the resistance ratio of resistors R4 and R5, the voltage input to the gate of the NMOS transistor Q4 can meet the turn-on condition of Q4.
[0034] refer to Figure 2The overcurrent protection module 2 includes PMOS transistors Q1, Q2, and Q3. The voltage output terminal of the test power supply V1 is electrically connected to the drain of PMOS transistor Q1. The source of PMOS transistor Q1 is electrically connected to the source of PMOS transistor Q2 via resistor R1. The drain of PMOS transistor Q2 is set as the output terminal SLEEP_P of the overcurrent protection module 2. The gate of PMOS transistor Q1 is electrically connected to the gate of PMOS transistor Q2, and the gate of PMOS transistor Q2 is electrically connected to the source of PMOS transistor Q2 via resistor R2. The gate of PMOS transistor Q2 is also electrically connected to the input terminal of the switch control module 1 via resistor R3. The base of transistor Q3 is electrically connected to the source of PMOS transistor Q2, the emitter of transistor Q3 is electrically connected to the source of PMOS transistor Q1, and the collector of transistor Q3 is electrically connected to the input terminal of the switch control module 1 via resistor R3. Preferably, the overcurrent protection module 2 further includes a capacitor C1, one end of which is electrically connected to the source of the PMOS transistor Q2, and the other end of which is electrically connected to the gate of the PMOS transistor Q2.
[0035] When the SLEEP_C output of the controller 100 is high, turning on the NMOS transistor Q4, the gates of PMOS transistors Q1 and Q2 are grounded through resistor R3, thus turning on PMOS transistors Q1 and Q2. At this time, the output current of the test power supply V1 is output to the input of the sleep current detection module 3 through PMOS transistor Q1, resistor R1 and PMOS transistor Q2 in sequence.
[0036] When the output current of the test power supply V1 increases, the current flowing through resistor R1 also increases. Using U=I*R, we can deduce that the voltage across resistor R1 also gradually increases. If the voltage across resistor R1 increases to the point that the transistor Q3 turns on, the source and gate of PMOS transistors Q1 and Q2 are pulled to the same level, thus turning off PMOS transistors Q1 and Q2. This prevents the increased current from being input to the sleep current detection module 3, thereby protecting the sleep current detection module 3.
[0037] refer to Figure 3 The sleep current detection module 3 includes a current detection chip U1, a diode D1, and a resistor R6. Pin 4 of the current detection chip U1 is grounded. The signal output terminal HIGH1 of the controller 100 is electrically connected to pin 2 of the current detection chip U1, and the signal output terminal HIGH1 of the controller 100 is also electrically connected to pin 1 of the current detection chip U1 through resistor R7. Pin 1 of the current detection chip U1 is also grounded through capacitor C3. When the signal output terminal HIGH1 of the controller 100 outputs a high level, the current detection chip U1 can operate normally and perform current detection. By setting capacitor C3, the power supply stability of the current detection chip U1 can be improved.
[0038] The output terminal SLEEP_P of the overcurrent protection module 2 is electrically connected to pin 7 of the current detection chip U1, and is also electrically connected to pin 8 of the current detection chip U1 through resistor R6. Pin 8 of the current detection chip U1 is electrically connected to the positive terminal of diode D1, and the negative terminal of diode D1 is electrically connected to the lamp terminal P_OUT. By setting diode D1, reverse current can be prevented from flowing back, thus providing isolation protection. Pin 3 of the current detection chip U1 is grounded, and pin 5 of the current detection chip U1 is grounded through capacitor C4. Pin 5 of the current detection chip U1 is set as the detection output terminal of the sleep current detection module 3, and is electrically connected to the input terminal of the controller 100. By setting capacitor C4, noise can be filtered and reduced, improving the quality of the signal input to the controller 100.
[0039] The current detection chip U1 is used to detect the voltage difference between pins 7 and 8 of the current detection chip U1, and outputs the detected voltage difference to the controller 100 through pin 5, that is, converting the analog signal into a digital signal for voltage output. The controller 100 then calculates the received voltage value and outputs the current value. Preferably, the controller 100 can be electrically connected to a display screen, which can display the current value on the display screen, so that the specific value of the dormant current can be observed on the display screen.
[0040] The implementation principle of a dormant current detection circuit with overcurrent protection in this application embodiment is as follows: the controller 100 precisely controls the switch control module 1 to realize the circuit's on / off operation. During normal operation, the dormant current detection module 3 uses a current detection chip to monitor the circuit's dormant current in real time and feeds the detection result back to the controller 100. When an abnormal increase in current is detected, the overcurrent protection module 2 responds quickly, turning on transistor Q3 and turning off PMOS transistors Q1 and Q2, thereby cutting off the current path and effectively protecting the circuit from overcurrent damage.
[0041] The above are all preferred embodiments of this application, and are not intended to limit the scope of protection of this application. Therefore, all equivalent changes made in accordance with the structure, shape and principle of this application should be covered within the scope of protection of this application.
Claims
1. A hibernation current detection circuit with overcurrent protection function based on a controller (100), characterized in that: It includes a switch control module (1), an overcurrent protection module (2), and a sleep current detection module (3); the output terminal of the controller (100) is electrically connected to the control terminal of the switch control module (1), the voltage output terminal of the test power supply is electrically connected to the input terminal of the overcurrent protection module (2), the control terminal of the overcurrent protection module (2) is electrically connected to the input terminal of the switch control module (1), and the output terminal of the switch control module (1) is grounded; the output terminal of the overcurrent protection module (2) is electrically connected to the input terminal of the sleep current detection module (3), and the output terminal of the sleep current detection module (3) is electrically connected to the input terminal of the controller (100).
2. The hibernation current detection circuit with overcurrent protection function according to claim 1, characterized in that: The overcurrent protection module (2) includes a PMOS transistor Q1, a PMOS transistor Q2, and a transistor Q3; the voltage output terminal of the test power supply is electrically connected to the drain of the PMOS transistor Q1, the source of the PMOS transistor Q1 is electrically connected to the source of the PMOS transistor Q2 through a resistor R1, and the drain of the PMOS transistor Q2 is set as the output terminal of the overcurrent protection module (2); the gate of the PMOS transistor Q1 is electrically connected to the gate of the PMOS transistor Q2, and the gate of the PMOS transistor Q2 is electrically connected to the source of the PMOS transistor Q2 through a resistor R2, and the gate of the PMOS transistor Q2 is also electrically connected to the input terminal of the switch control module (1) through a resistor R3; the base of the transistor Q3 is electrically connected to the source of the PMOS transistor Q2, the emitter of the transistor Q3 is electrically connected to the source of the PMOS transistor Q1, and the collector of the transistor is electrically connected to the input terminal of the switch control module (1) through a resistor R3.
3. The hibernation current detection circuit with overcurrent protection function according to claim 2, characterized in that: The overcurrent protection module (2) also includes a capacitor C1, one end of which is electrically connected to the source of the PMOS transistor Q2, and the other end of which is electrically connected to the gate of the PMOS transistor Q2.
4. The hibernation current detection circuit with overcurrent protection function according to claim 1, characterized in that: The switch control module (1) includes an NMOS transistor Q4, a resistor R4 and a resistor R5. The output terminal of the controller (100) is grounded through the resistor R4 and the resistor R5 in sequence, and the connection point between the resistor R4 and the resistor R5 is electrically connected to the gate of the NMOS transistor Q4. The source of the NMOS transistor Q4 is grounded, and the drain of the NMOS transistor Q4 is electrically connected to the control terminal of the overcurrent protection module (2).
5. The hibernation current detection circuit with overcurrent protection function according to claim 4, characterized in that: The switch control module (1) also includes a capacitor C2, one end of which is electrically connected to the gate of the NMOS transistor Q4, and the other end of which is grounded.
6. The hibernation current detection circuit with overcurrent protection function according to claim 1, characterized in that: The dormant current detection module (3) includes a current detection chip U1. The output terminal of the overcurrent protection module (2) is electrically connected to pin 7 of the current detection chip U1. The output terminal of the overcurrent protection module (2) is also electrically connected to pin 8 of the current detection chip U1 through resistor R6. Pin 8 of the current detection chip U1 is electrically connected to the lamp end. Pin 5 of the current detection chip U1 is electrically connected to the input terminal of the controller (100).
7. The hibernation current detection circuit with overcurrent protection function according to claim 6, characterized in that: The sleep current detection module (3) further comprises a diode D1, the 8-pin of the current detection chip U1 is electrically connected to the anode of the diode D1, and the cathode of the diode D1 is electrically connected to the lamp end.
8. A dormant current detection circuit with overcurrent protection function according to claim 6, characterized in that: The 5-pin of the current detection chip U1 is grounded through a capacitor C4.