A timer switch with classification timing function

Through innovative design of the main control chip and memory, the system enables categorized storage and one-click switching of timer switches, solving the adaptation problem of existing timer switches when the load or scenario changes, and improving the flexibility and ease of use of the product.

CN224457254UActive Publication Date: 2026-07-03陈勇
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
陈勇
Filing Date
2025-09-26
Publication Date
2026-07-03

AI Technical Summary

Technical Problem

When the load device is replaced or the application scenario is changed, the original timer configuration of the existing timer switch cannot be quickly adapted. Users need to manually delete the old configuration and re-enter it, which is cumbersome and prone to errors.

Method used

It adopts an innovative design of main control chip and memory to realize the classified storage and one-click switching of timing configuration. Through the classified data register and memory partition structure, it supports the management and fast switching of multiple independent timing schemes.

Benefits of technology

It achieves flexibility and ease of use for timer switches under multiple loads or scenarios. Users can quickly switch the entire timer scheme through simple operations without repeatedly modifying specific parameters, thus improving product adaptability and user experience.

✦ Generated by Eureka AI based on patent content.

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Abstract

This utility model relates to a timer switch with categorized timing functionality, aiming to solve the technical shortcomings of existing single timer switches, which suffer from cumbersome user operations and inability to quickly switch between different timing schemes due to rigid timing configuration management when adapting to different loads or application scenarios. This utility model's timer switch features innovative improvements in hardware structure. Through the coordinated operation of its internal data management mechanism and user command response mechanism, it achieves categorized storage and one-click overall switching of multiple independent timing schemes. Users only need a simple selection operation to quickly switch the timer switch between different preset working modes, greatly improving its adaptability to multiple loads and application scenarios, enhancing user experience, and avoiding the hassle of repeatedly modifying specific timing parameters.
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Description

[Technical Field]

[0001] This utility model relates to the field of smart home technology, and in particular to a timer switch. Specifically, this utility model relates to a hardware device for a timer switch capable of storing multiple timer schemes and quickly switching between them. [Background Technology]

[0002] Existing timer switches typically allow users to set multiple timer configurations, but these configurations all operate on the same load. When users change the load device connected to the timer switch (e.g., from a patio light to a humidifier) ​​or change the application scenario of the same load (e.g., moving a heater from the bedroom to the study), the original timer configurations often become inapplicable. Users must manually delete all old configurations and then enter the new configurations one by one, which is cumbersome, error-prone, and cannot achieve rapid adaptation. Therefore, there is an urgent need in the field for a timer switch hardware product that can store multiple independent timer schemes and quickly and easily switch between them with a single click based on changes in the connected load or application scenario.

[0003] It should be noted that the "timer configuration data for multiple timing categories stored in the memory" mentioned in this utility model includes, but is not limited to, data pre-set before leaving the factory. More importantly, it also includes multiple independent timing schemes created, set, and saved by the user during product use, based on different load devices or application scenarios, through the human-machine interface module. The core improvement in the hardware structure of this utility model lies in its ability to classify, manage, and switch between these multiple timing schemes in the memory with a single click, regardless of when or by whom the data was stored. [Utility Model Content]

[0004] The technical problem this invention aims to solve is to overcome the shortcomings of existing timer switches, such as rigid timer configuration management and inability to adapt to rapid switching under multiple loads or scenarios. To address this, this invention provides a timer switch with improved hardware structure. Through innovative design of the memory and main control chip configuration, it achieves categorized storage and one-click switching of timer configurations.

[0005] To solve the above-mentioned technical problems, this utility model adopts the following technical solution: a timer switch with classified timing function, comprising a power supply circuit, a main control chip, a human-machine interface module, user interface elements, and a load control module, characterized in that:

[0006] The main control chip is equipped with a memory for storing data, which contains timing configuration data for multiple timing categories. The main control chip has a classification data register inside. The main control chip is configured to update the value of the classification data register to switch the target timing category in response to the category selection instruction received by the human-machine interface module, and determine the currently effective timing category based on the value of the register, and generate timing control signals only based on the timing configuration under the currently effective timing category.

[0007] The load control module is electrically connected to the output port of the main control chip and is used to control the on / off state of the load power supply according to the timing control signal.

[0008] Preferably, the configuration for the main control chip to access the timing configuration data is any one of the following:

[0009] (a) First configuration: The main control chip is configured to directly access the storage area in the memory corresponding to the target timing category to read data when a timing judgment program needs to be executed;

[0010] (b) Second configuration: The memory is divided into a working data area and a cache data area; the working data area is dedicated to storing the currently effective timing category data; the cache data area is used to store complete timing configuration data for all timing categories; the main control chip is configured to: when switching timing categories, load the new currently effective timing category data from the cache data area into the working data area; and when executing the timing judgment program, access the working data area.

[0011] Preferably, the storage structure for the timing configuration data in the memory is any one of the following:

[0012] (a) Partitioned storage structure: The storage space of the memory is divided into multiple independent logical blocks, and each logical block is used to store all timing configuration data of a timing category;

[0013] (b) Identifier storage structure: all timing configuration data for all timing categories are stored together, and each piece of timing configuration data is associated with an identifier.

[0014] Preferably, the address space of the memory is pre-divided into multiple physical storage blocks of fixed size, each physical storage block uniquely corresponding to and used to store all timing configuration data of a timing category.

[0015] Preferably, the memory also pre-stores a mapping table, which records the actual starting address and data length information of each timing category and / or timing configuration data in the memory.

[0016] Preferably, the memory is a non-volatile memory.

[0017] Preferably, the non-volatile memory is an EEPROM or FLASH ROM built into the main control chip, or an external storage chip connected to the I / O port of the main control chip.

[0018] Preferably, the memory is a volatile memory; the power supply circuit further includes an energy storage element for supplying power to the volatile memory to maintain data when the mains power is interrupted.

[0019] Preferably, the energy storage element is any one of a rechargeable battery, a disposable battery, a high-capacity capacitor, or a supercapacitor.

[0020] Preferably, the main control chip is configured to update the content of the working data area to the currently effective timing category data when switching timing categories.

[0021] Preferably, the human-computer interaction interface module includes at least one of the following hardware units:

[0022] (a) Physical buttons located on the device panel;

[0023] (b) Encoded switch or rotary switch;

[0024] (c) Touch-sensing layer or touch buttons;

[0025] (d) A wireless signal receiving module for receiving control commands from a wireless remote controller;

[0026] (e) A microphone for acquiring audio signals and a voice recognition processing module that communicates with the main control chip.

[0027] Preferably, the wireless signal receiving module is an RF receiving module, a Bluetooth module, or an infrared receiver.

[0028] Preferably, the user interface element includes at least one of the following hardware units:

[0029] (a) LCD screen;

[0030] (b) Digital tube display;

[0031] (c) OLED display;

[0032] (d) LED indicator array;

[0033] (e) Panel backlight element.

[0034] Preferably, the user interface element displays or indicates a visual feedback identifier corresponding to the timing category; the visual feedback identifier is at least one of graphics, icons, numbers, letters, text, arrows, and color changes, or is displayed in conjunction with category icons printed on the device housing.

[0035] Preferably, the load control module includes a load drive circuit and a switching device, wherein the switching device is a relay, a silicon controlled rectifier, a solid-state relay, or a power MOSFET.

[0036] Preferably, the timer switch has a multi-output structure;

[0037] The memory independently stores timing configuration data for each output channel, corresponding to multiple timing categories.

[0038] The main control chip independently determines the target timing category for each output and generates an independent timing control signal.

[0039] The load control module has a multi-output structure, including multiple independent load drive circuits and switching devices to independently control the on / off state of each load power supply.

[0040] The beneficial effects of this invention are as follows: Through improvements in hardware structure, particularly the classification data registers and memory partitioning structure within the main control chip, the timer switch can classify and store multiple timing schemes. Users can switch between the currently active schemes through simple human-computer interaction, without repeatedly modifying specific timing parameters, greatly improving the product's flexibility, ease of use, and user experience under multiple loads and scenarios. This invention has a clear structure, is easy to implement, and has high reliability. [Attached Image Description]

[0041] Figure 1 This is a circuit structure block diagram of the timer switch of this utility model;

[0042] Figure 2 This is the circuit diagram of the timer switch of this utility model;

[0043] Figure 3 This is a schematic diagram of the system architecture of the timer switch of this utility model;

[0044] Figure 4 This is a schematic diagram of the classification data register and independent storage structure of this utility model (Scheme 1);

[0045] Figure 5 This is a schematic diagram of the identification data and storage structure of this utility model (Scheme 2);

[0046] Figure 6 This is a schematic diagram of the dual-storage area structure of this utility model;

[0047] Figure 7 This is a schematic diagram of the hardware data exchange operation of the main control chip of this utility model performing timed category switching;

[0048] Figure 8 This is a schematic diagram of the hardware function interaction of the main control chip of this utility model in processing remote category selection instructions;

[0049] Figure 9 This is a schematic diagram illustrating the implementation of the user interface elements and human-computer interaction interface module of this utility model;

[0050] Figure 9 A demonstrates an implementation method that uses a single category selection key for category selection;

[0051] Figure 9 B demonstrates an implementation method that uses a combination key for category selection;

[0052] Figure 9 C demonstrates an implementation method that uses multiple buttons in combination for category selection;

[0053] Figure 9 D demonstrates an implementation method that uses a combination of rotary switches and buttons for category selection;

[0054] Figure 9 E illustrates an implementation method that uses a coded switch for category selection;

[0055] Figure 9 F demonstrates an implementation method that uses a combination of buttons and indicator lights to select the timing category;

[0056] Figure 10 This is a schematic diagram of the wireless remote control interactive system of this utility model;

[0057] Figure 11 This is a schematic diagram of the voice control module of this utility model;

[0058] Figure 12 This is a schematic diagram of the application environment of the timer switch terminal of this utility model in an intelligent terminal control system;

[0059] Figure 13 This is a schematic diagram of the hardware storage structure of the mapping table used in one embodiment of this utility model.

[0060] The specific embodiments of this utility model will now be described in detail with reference to the accompanying drawings. All drawings are intended to clearly illustrate the hardware structure, workflow, and technical principles of this utility model.

[0061] Figure 1 This is a circuit structure block diagram of the timer switch of this utility model.

[0062] As shown in the figure, the core hardware components of this utility model include:

[0063] The power supply circuit is used to convert the input AC mains power (AC Input) into a stable DC voltage to power the chips and modules in the system;

[0064] The main control chip, as the control core of the system, integrates a processing control module and a storage module.

[0065] The human-machine interface module is connected to the input port of the main control chip and is used to receive various operation commands from the user. Specifically, it may include physical buttons, rotary encoder switches, touch sensing units, wireless signal receiving modules (such as RF, Bluetooth, infrared receivers) or voice recognition modules.

[0066] User interface elements are connected to the output port of the main control chip and driven by the main control chip. They are used to provide visual feedback information to the user, such as liquid crystal displays (LCDs), digital tubes, OLED screens, or LED indicator arrays.

[0067] The load control module is connected to the output port of the main control chip and receives control signals. It contains a load drive circuit and relays, thyristors or power MOSFETs as switching devices, which are used to directly control the on / off of the load power supply connected to the AC output terminal.

[0068] This block diagram clearly illustrates the electrical connections and signal flow relationships between the various hardware modules.

[0069] Figure 2 This is the circuit diagram of the timer switch of this utility model.

[0070] The diagram shows further details. Figure 1The specific electronic components and electrical connections of each module are described. For example, the power supply circuit may consist of a resistor-capacitor step-down converter, a rectifier bridge, a filter capacitor, and a voltage regulator. The SRAM inside the main control chip serves as a data storage device, pre-storing multiple timing categories, each associated with at least one timing configuration. A rechargeable battery in the power supply circuit acts as an energy storage device, supplying power to the main control chip during mains power outages, ensuring the timing configuration data stored in the main control chip's SRAM is not lost. The main control chip's SRAM also includes a classification data register, the value of which is used to determine the target timing category. The human-machine interface module connects to the main control chip's I / O port via buttons. Users input category selection commands via buttons, and the main control chip detects these commands and updates the value of the classification data register to switch the currently active timing category. The user interface components are connected to the main control chip using an LCD screen, LED indicators, and LED backlighting. The LCD screen displays visual feedback indicators (e.g., at least one of graphics, icons, numbers, letters, text, and arrows) corresponding to the timing category; or the current timing category is indicated by changes in LED backlight color. For example: a "sun" icon displayed on the LCD screen or a red backlight indicates that the external load is a heater, and the current timer setting is configured for the heater; a "snowflake" icon displayed on the LCD screen or a blue backlight indicates that the external load is a fan, and the current timer setting is configured for the fan. In the load control module, the load drive circuit uses a transistor amplification to drive the switching device (relay) output, thus energizing or de-energizing the load device. Those skilled in the art can directly implement the hardware circuit of this invention based on this schematic diagram.

[0071] It should be noted that the circuit schematic provided in this solution is for understanding the circuit structure of this utility model and does not constitute a limitation. Those skilled in the art will understand that each circuit module in the diagram can be modified. For example, in the power supply module, an AC-DC step-down chip or transformer can be used instead of a resistor-capacitor step-down method; in the load control module, a thyristor relay output can be used to control the on / off state of the load power supply; in the button module, a rotary switch or encoder switch can be used to select the timing category; and the user interface element can be replaced with a digital tube or OLED screen, or other devices. This schematic diagram is only provided as an example and should not be considered a limitation on the implementation of this utility model.

[0072] In this utility model, the "timing category" and "timing configuration" are defined as follows:

[0073] 1. Timing Category:

[0074] The "timing category" is the highest-level logical concept introduced in this invention to achieve timed classification management. It is a logical container or group that represents a complete set of timed control schemes set for a specific load device (such as a "garden light", "humidifier", or "heater") or a specific application environment (such as a "bedroom" or "study"). Each timed category manages an independent timed control scheme, which includes all the timed configurations required to implement that scheme.

[0075] Application Example: Users can create a timer category named "Heater," in which all timer configurations are only active when the heater is in use; and simultaneously create another timer category named "Humidifier," which contains a completely separate set of timer configurations applicable to the humidifier. By switching timer categories, the entire timer control scheme can be switched.

[0076] 2. Scheduled Configuration:

[0077] A "timer configuration" is the basic unit that constitutes a "timer category". A timer category is associated with at least one timer configuration. Each timer configuration defines a complete on / off cycle logic for the load power supply, or a single on / off action instruction. A timer configuration can be a dual-instruction set consisting of a "power on" timer and a "power off" timer (e.g., "Power on at 6 PM Monday through Friday, power off at 7 AM Monday through Friday"), or a single instruction with only one "power on" or only one "power off" timer (e.g., "Power off Monday at 8 AM").

[0078] Figure 3 This is a schematic diagram of the system architecture of the timer switch of this utility model.

[0079] This diagram divides the hardware architecture of this utility model into three layers from a functional logic perspective:

[0080] The response layer is responsible for receiving and distributing input signals from various human-machine interface modules (such as local buttons, remote controls, voice, and smart terminals). Local physical operation signals are from buttons, knobs, or coded switches on the device panel. The operation of a category selection button is recognized as a category selection command. Wireless remote control signals are from radio frequency (RF), Bluetooth, or infrared signals from the wireless remote control. These signals are received and converted into commands by the device's built-in wireless receiving module (RF, Bluetooth, or infrared receiving module). Voice command signals are received by the user's voice commands, which are processed by the voice recognition module, which then outputs the corresponding control commands. The response layer performs preliminary parsing and distribution of commands from these various input channels. Category selection commands are used to update the category data register, while other commands (such as modifying the time or manually switching on / off) are sent to the corresponding processing units in the execution layer.

[0081] Storage layer: Stores multiple independent timing category data (such as "Timing Category 1 Settings" and "Timing Category 2 Settings") in a logically or physically isolated manner; the storage layer maintains and provides access interfaces for the execution layer to read timing data.

[0082] Execution layer: Includes timing judgment program and comprehensive arbitration program. The timing judgment program is configured to read only the currently effective timing category data in the storage layer and compare it with the real-time clock to generate timing control signals. The comprehensive arbitration program integrates the timing control signals with other signals such as manual control according to priority, and finally outputs load control instructions to drive the load control module to perform on / off operations.

[0083] This diagram illustrates the paths of data flow and control flow in the hardware system of this invention.

[0084] Figure 4 This is a schematic diagram of the classification data register and independent storage structure of this utility model (Scheme 1).

[0085] This diagram illustrates a logical partitioning structure for the main control chip's memory (such as SRAM).

[0086] The memory is divided into multiple functional areas: memory area 3 is used to store user-defined variables, including a dedicated variable called the category data register, which stores category-related data (such as an integer value representing a category number); memory areas 4, 5 to m are fixedly allocated to different timing categories (timing categories 1, 2...n) to store the complete set of timing configurations for each category. By modifying the value in the category data register, the address of the target timing category can be changed, thereby achieving category switching, while the timing settings data of each timing category remain unchanged within their respective fixed storage blocks.

[0087] For example: memory range 4 is the storage area for all timing configurations associated with timing category 1; memory range 5 is the storage area for all timing configurations associated with timing category 2; and so on.

[0088] It should be noted that the specific forms of storage partitions, address definitions, variable name definitions, storage addresses for each timing category, partition size definitions, etc., described above are merely illustrative examples for ease of understanding of the method of this utility model, and are not intended to limit the utility model. All methods of selecting the corresponding timing category by defining variables (e.g., classification data registers) based on the values ​​stored in those variables fall within the protection scope of the timing switch with classification timing control function described in this utility model.

[0089] Figure 5 This is a schematic diagram of the identification data and storage structure of this utility model (Scheme 2).

[0090] This diagram reveals another hardware storage structure for timed category data.

[0091] In this scheme, the main control chip's memory pre-allocates a specific memory unit as an identifier data storage area at the starting address or a fixed offset address of the data area for each timing category (such as timing categories A, B, and C). This unit stores a status flag (e.g., a one-byte status word or a one-bit bit mask). The value of this status flag (e.g., 0x01 indicates active, 0x00 indicates inactive) is defined to identify whether the category is the currently active target timing category. When switching categories, the main control chip's hardware operation involves writing a value (e.g., "0") to the identifier data storage unit corresponding to the original active category to indicate the 'inactive' state, and writing a value (e.g., "1") to the identifier data storage unit corresponding to the new target category to indicate the 'active' state.

[0092] This scheme achieves switching by setting the identification data stored in a specific address unit in the memory, and also ensures that the timing settings of each category remain unchanged within their physical storage address range.

[0093] Figure 6 This is a schematic diagram of the dual-storage area structure of this utility model.

[0094] This diagram illustrates an optimized memory organization architecture.

[0095] The entire storage module is logically divided into a working data area and a cache data area. The working data area is typically located in high-speed static random access memory (SRAM) and is dedicated to storing currently active timing category data for the main control chip to access at high speed to perform timing decisions. The cache data area is located in non-volatile memory (such as EEPROM or FLASH ROM) or in the main control chip's SRAM, and is used to completely back up and store data for all timing categories (such as A, B, and C).

[0096] When switching categories, the main control chip performs a "data exchange" operation, as shown by the arrow: writes the current data in the working area back to the cache for backup, and then loads the target category data from the cache into the working area.

[0097] This architecture balances operating speed and data non-volatility.

[0098] Figure 7 This is a schematic diagram of the hardware data exchange operation of the main control chip of this utility model performing timed category switching.

[0099] This figure describes the basis Figure 6 The hardware operation process of a dual-storage area structure.

[0100] When the main control chip receives a user category switching command and determines the target category through its human-machine interface module, its data exchange control module is triggered: First, a "save" operation is performed on the memory, writing the data in the current working data area to the physical storage location corresponding to the original category in the cache data area (such as FLASH); then, a "load" operation is performed, reading the data of the target category from its physical storage location in the cache data area and loading it into the working data area. After the switching is completed, the timing judgment logic unit runs according to the newly loaded timing settings in the working data area.

[0101] This operation ensures the consistency and integrity of data during the switching process and demonstrates the collaboration of hardware components such as the main control chip, working data area, and cache data area.

[0102] Figure 8 This is a schematic diagram of the hardware function interaction of the main control chip of this utility model in processing remote category selection instructions.

[0103] The figure illustrates the collaborative working process of the various hardware components of this invention when a remote control is used for timed category switching and the local human-machine interface module is a wireless communication module (such as a Wi-Fi / Bluetooth module).

[0104] The wireless communication module receives commands from the remote control and transmits them to the main control chip. As the control core, the main control chip's internally programmed instructions enable it to call the decoding and verification unit to parse data packets and identify the category selection command and target timing category data. Subsequently, the main control chip executes a core operation: updating the classification data register in memory (e.g., based on the target timing category) according to the target timing category. Figure 4 Numerical or identifier data storage units (such as...) Figure 5 The timing configuration is calculated by the timing control logic unit of the main control chip, which then accesses only the memory area corresponding to the newly effective timing category. The read timing configuration is compared with the time information provided by the real-time clock circuit to generate a timing control signal. Finally, this signal is processed by the comprehensive arbitration logic unit to drive the load drive circuit to perform the switching operation of the switching devices.

[0105] This process clearly demonstrates the connection and functional collaboration of hardware components such as the wireless communication module, main control chip, memory, and load control module, and emphasizes the architectural feature that the core control logic is implemented by local hardware.

[0106] Figure 9 This is a schematic diagram illustrating the implementation of the user interface elements and human-computer interaction interface module of this utility model.

[0107] Figure 9 A demonstrates an implementation method that uses a category selection key for category selection.

[0108] The main area (903) of the display (901) is used to display the current real-time clock time (e.g., "Monday 9:30"), and the category indicator area (904) is used to display visual feedback information (e.g., graphics, icons, text, numbers, etc.) representing the currently effective timing category. A category selection command is issued by pressing the dedicated category selection key (905) in the operation button area (902). The key signal is received and parsed by the main control chip, which then modifies the value of the category data register to switch the currently effective timing category and updates the visual feedback information in the category indicator area (904).

[0109] Figure 9 B demonstrates an implementation method that uses a combination key for category selection.

[0110] The main area of ​​the display (901) is a timing configuration display interface for browsing and modifying timing configuration parameters. Its main display area (906) is used to display detailed information about the current timing configuration (such as "1 On: Monday 08:00", "1 Off: Monday 10:00"). Category information is presented as visual feedback information through a separate indicator area (907) and its associated hardware identification area (908). In this example, in the indicator area (907), the category indicator points to the icon or text indicating the timing category printed or marked on the hardware identification area (908) with an arrow, visually indicating the current timing category. A category selection command is issued by operating the combination keys in the button area (902) (e.g., pressing the "clock key (909)" and the "cancel key (910)" simultaneously). The key signal is received and parsed by the main control chip, which then modifies the value of the classification data register to switch the currently effective timing category and updates the visual feedback information in the category indicator area (907).

[0111] Figure 9 C demonstrates an implementation method that uses multiple buttons in combination for category selection.

[0112] The main display area (911) of the display (901) is used to display visual feedback information such as icons, text, and numbers corresponding to each timekeeping category (e.g., "heating", "dehumidification"). After browsing and selecting the target category by operating the "plus key (912)" or "minus key (913)", the user can issue a category selection command by pressing the "confirm key (914)".

[0113] Figure 9 D illustrates an implementation method that uses a combination of rotary switches and buttons for category selection.

[0114] The category indicator area (915) of the display (901) is used to display the currently selected category icon or text. The user rotates the knob switch (916) to browse different category options. The main control chip calculates and determines the target timing category based on the input pulse signal, updates the category data register, and updates the corresponding timing category visual feedback information according to the value of the category data register. After selecting the target category, the user can finally issue a category selection command by pressing the confirmation button (914) to complete the switching.

[0115] Figure 9 E illustrates an implementation method that uses coded switches for category selection.

[0116] The display (901) shows various mode pages (917), including: clock display page, timing configuration display page, countdown display page, etc. The user rotates the encoder switch (918), and the main control chip identifies the generated encoded value representing the absolute position. This encoded value has a one-to-one correspondence with the timing category, and generates a category selection instruction and updates the classification data register accordingly. A timing category identifier can be printed on or around the encoder switch (918) housing. This printed category identifier serves as visual feedback information, achieving a unified operation and visual feedback information based on the direction of the encoder switch knob or the position of the toggle switch.

[0117] Figure 9 F illustrates an implementation method that uses a combination of buttons and indicator lights to select the timing category.

[0118] The display (901) shows the various mode pages (917). The category selection and indication area (919) has multiple buttons for different timing categories and corresponding category indicator lights. That is, a combination of buttons and indicator lights is used to correspond to a specific timing category. When the user presses a button representing a certain category (such as button 920), the main control chip recognizes the button input signal, modifies the classification data register to the timing category corresponding to the button, and illuminates the timing category indicator light (921) paired with button (920) as visual feedback information of the currently effective timing category. All other timing category indicator lights are turned off to clearly indicate the currently effective timing category.

[0119] Figure 10 This is a schematic diagram of the wireless remote control interactive system of this utility model.

[0120] This block diagram illustrates the hardware components of a wireless control system consisting of a standalone physical device—a wireless remote controller and a timer switch. The remote controller includes: a keypad (for input), a control chip (for input processing), signal transmission circuitry (such as RF / Bluetooth / infrared transmission circuitry), and a display module. The timer switch includes: a signal receiving circuit (for pairing with the remote controller), a main control chip (for decoding commands), user interface elements, and a load drive circuit. When the user operates the category selection button on the remote controller, the command is wirelessly transmitted, received and decoded by the timer switch, and ultimately triggers the main control chip to update the category data register, completing the switching and updating the display of the user interface elements.

[0121] Figure 11 This is a schematic diagram of the voice control module of this utility model.

[0122] This block diagram illustrates the hardware module composition of voice interaction. The user issues a voice command containing target category information, which is captured, noise-reduced, and recognized by the voice recognition module (typically containing a microphone and voice recognition chip, or a voice recognition algorithm run by the main control chip), ultimately parsing out the category selection command. Based on this, the main control chip updates the classification data register and controls the user interface elements to provide visual feedback.

[0123] Figure 12 This is a schematic diagram of the application environment of the timed switch terminal of this utility model in an intelligent terminal control system.

[0124] The figure illustrates a possible application scenario where the timer switch of this invention, as an execution terminal, works collaboratively with smart terminal devices (such as mobile phones with control apps installed), networks, and cloud platforms.

[0125] As shown in the figure, the timer switch terminal of this utility model integrates a wireless communication module (such as a Wi-Fi / Bluetooth module) and a main control chip, enabling it to receive control commands from smart terminal devices, either via a cloud platform relay or a direct connection. The figure clearly depicts the two main transmission paths for category selection commands: path one involves the smart terminal communicating directly with the timer switch via a local Wi-Fi router; path two involves the command being uploaded to a cloud server via the internet before being relayed to the timer switch. This figure primarily illustrates the expandability of the hardware interface of the timer switch of this utility model and its application potential in an IoT environment.

[0126] Figure 13 This is a schematic diagram of the hardware storage structure of the mapping table used in one embodiment of this utility model.

[0127] The mapping table is physically stored in the memory in a specific data structure, forming a mapping table storage area. The main control chip is configured to maintain and access this mapping table storage area through its internally programmed instructions, thereby achieving dynamic management of the physical storage space for each timing category and its subordinate timing configurations.

[0128] The mapping table storage area establishes and maintains a mapping relationship between the "physical storage address and data length of the timing category" and the "physical storage address and data length of its corresponding timing configuration data" in hardware. When the main control chip needs to access data of a specific timing category, it can locate the actual physical storage area of ​​the timing category data in the memory by querying this mapping table storage area, without the need for fixed address calculations.

[0129] like Figure 13 As shown, in one specific embodiment, the mapping table storage area adopts a nested data storage structure, and its hardware configuration includes:

[0130] Outer mapping table storage area: Used to manage all timing categories. This storage area contains multiple key-value pair data units. The "key" data unit stores the logical identifier of the timing category; the "value" data unit stores a pointer to the starting address of the corresponding inner mapping table storage area.

[0131] Inner mapping table storage area: Each timing category corresponds to an independent inner mapping table storage area. This storage area also consists of key-value pair data units. The "key" data unit stores the logical identifier of the timing configuration; the "value" data unit stores the specific parameter data of that timing configuration or a pointer to the parameter data.

[0132] The main control chip is configured to perform dynamic update operations on the mapping table storage area, which are manifested as read and write operations on physical storage units:

[0133] When a new category is added: the main control chip allocates physical space in the memory for the new inner mapping table and writes a new key-value pair data unit into the outer mapping table storage area.

[0134] When the number of timing configurations under a certain timing category changes: the main control chip updates the corresponding key-value pair data units in the inner mapping table storage area of ​​that category.

[0135] Through the aforementioned hardware structure, the main control chip achieves flexible mapping from logical identifiers to physical addresses by querying the physically existing mapping table storage area in its memory. This hardware design upgrades the storage management method from "fixed physical block binding" to "mapped table-based addressability," thereby achieving higher storage space utilization and management flexibility at the hardware level.

Detailed Implementation Methods

[0136] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments.

[0137] It should be noted that the following embodiments are for illustrative purposes only and are not intended to limit the scope of protection of this utility model. Those skilled in the art, based on the guidance of the technical solution and accompanying drawings of this utility model, can make various combinations and modifications, all of which fall within the scope of protection of this utility model.

[0138] Example 1: Basic hardware structure and working process.

[0139] The basic hardware structure of this utility model is as follows: Figure 1 and Figure 2 As shown. In implementation, the main control chip can be a microcontroller with sufficient RAM and ROM (such as the Lingtong GPL8 series microcontroller). Memory solutions can be adopted... Figure 4 The logical partitioning method shown divides the MCU's internal FLASH ROM or SRAM into multiple fixed-size blocks to store data of various categories, and creates a variable in the SRAM as a category data register. The human-machine interface module can adopt... Figure 9 The device panel physical button scheme is shown in sub-diagram A. Each time the user presses the dedicated "Category" button, the main control chip detects a category selection instruction and then performs the following hardware operations: reads the current value of the category data register, calculates the next target category number in a preset order and writes it back to the register (e.g., cyclically incrementing: 1->2->3->1...). Subsequently, based on the new register value, the main control chip calculates the physical address of the target category data in memory using an address mapping formula (e.g., base address + category number × fixed block size), and reads timing configuration parameters only from this address range for subsequent comparison with the real-time clock, thereby generating a signal to control the load's on / off state. Throughout the process, the timing parameters for each category remain unchanged in memory. Furthermore, the identification data can also use... Figure 5 The implementation shown is achieved by pre-setting a specific storage unit in the data area of ​​each timing category to store the identification data, and switching is achieved by writing different status values ​​to the unit by the main control chip. Its hardware operation is essentially equivalent to the scheme of switching through registers.

[0140] Example 2: Fast switching implementation based on dual storage areas.

[0141] To improve response speed and ensure data security, the following can be adopted: Figure 6 and Figure 7The dual-storage architecture is shown. In this embodiment, the working data area is located in the high-speed SRAM inside the main control chip, while the cache data area is implemented using an external SPIFLASH chip (such as W25Q16). During system power-on initialization, the data of the currently active category is loaded from the SPIFLASH into the working area of ​​the SRAM. When the user uses the rotary encoder switch (… Figure 9 When subgraph D) switches categories, the data exchange control logic of the main control chip is triggered, and its hardware operation process is as follows: Figure 7 As shown: First, the main control chip determines whether there are any unsaved changes to the timing category data in the current SRAM working area. If so, it writes them back to the corresponding timing category storage block in the SPI FLASH. Then, based on the target category number determined by the knob encoding value, it calculates the physical address in the SPI FLASH and reads the data block into the SRAM working area via the SPI bus. After that, the timing judgment logic unit can access the SRAM working area at high speed.

[0142] This method ensures that time-consuming non-volatile memory accesses occur only once during switching, resulting in extremely high efficiency for routine timing checks and demonstrating the performance advantages brought by the specific hardware architecture.

[0143] Example 3: Implementation of independent control for multiple outputs.

[0144] This invention can be easily expanded to multiple outputs. For example, a two-output timer switch can be designed. In the main control chip's memory, independent storage areas (equivalent to two independent storage layers) are allocated for the first and second outputs. Each output corresponds to an independent category data register. The load control circuit includes two independent load drive circuits and switching devices (such as two relays). For example, the first output can be used to control courtyard lights, pre-stored with categories such as "daily mode" and "holiday mode"; the second output is used to control the courtyard irrigation system, pre-stored with categories such as "summer mode" and "spring / autumn mode". Users can independently switch the currently active timing category for each output; the timing control of the two outputs is completely parallel and does not interfere with each other. During hardware wiring, the high-voltage components of the two outputs should be physically isolated.

[0145] Example 4: Application example integrating multiple interfaces.

[0146] This utility model can integrate multiple human-computer interaction interface modules. For example, the timer switch body is equipped with basic buttons and a display screen. Figure 9 It can also be optionally equipped with an integrated Wi-Fi module (enabling it to access networks such as...). Figure 12 (The application environment shown) and / or the speech recognition module ( Figure 11When users are at home, they can operate the device directly via voice commands; alternatively, they can use a mobile app for remote control. Regardless of the interface from which the command originates, the core control logic is ultimately executed by the local main control chip of the timer switch and its associated memory, load control module, and other hardware resources. This demonstrates the inclusiveness of the hardware architecture of this invention towards multiple interaction methods and the reliability of local decision-making.

[0147] Example 5: Application example of a remote control system based on smart terminals and cloud platforms.

[0148] This embodiment details how the timer switch of this invention can be used as a terminal device in a complete intelligent terminal control system. The system is as follows: Figure 12 As shown, it mainly consists of three parts: hardware and network infrastructure working together.

[0149] Intelligent terminal device: This provides a remote interaction interface for users and is typically a mobile device, such as a smartphone or tablet, with a dedicated control application (APP) installed. The hardware of this intelligent terminal device includes at least a processor, memory, a touchscreen, and a wireless communication unit (such as a Wi-Fi or cellular network module). The APP runs on the intelligent terminal, and its graphical user interface (GUI) is configured to visually present all pre-stored timing categories in the timer switch (e.g., displaying "garden lights," "humidifiers," etc., as icons or lists) and their timing settings, and to receive category selection commands issued by the user via touch operation. The application logic layer of the APP converts this operation into a structured digital command (i.e., a category selection command), and this command data packet contains at least the unique identifier data of the target timing category.

[0150] Network and cloud platform: Serving as a transmission and relay hub for instructions and status data, it includes a local wireless access network (such as a Wi-Fi router), a wide area network (WAN), and a server cluster deployed in the cloud. The cloud server possesses data reception, forwarding, routing, and necessary protocol conversion functions. Category selection instructions issued by the smart terminal can reach the timer switch via two paths: Path 1 (direct connection): Within the LAN, the instruction is sent directly to the timer switch via the local router; Path 2 (cloud server relay): In a WAN environment, the instruction is first uploaded to the cloud server via the internet, authenticated and forwarded, and then distributed to the local router where the timer switch is located via the internet, ultimately reaching the timer switch. The cloud platform can also be used to store auxiliary information such as device lists and user permissions.

[0151] The timer switch terminal, as described in this invention, serves as the system's instruction execution terminal. Its integrated wireless communication module (such as a Wi-Fi module or Bluetooth module) is responsible for receiving instruction data packets from the aforementioned paths. The main control chip of the timer switch calls its internal decoding and verification program to parse the data packets, identify valid category selection instructions and target categories, and update its internal data values ​​accordingly (e.g., ...). Figure 4 The classification data register shown or Figure 5 The identification data shown indicates that the timing category has been switched. All subsequent timing control logic (such as...) Figure 8 As shown, all operations are performed entirely locally on the timer switch. The timer switch can also feed back its status (such as the currently active category and timer settings) to the smart terminal app via the original path, updating the interface display. Through this system, users can achieve remote timer management without geographical limitations.

[0152] It should be emphasized that this embodiment is only used to illustrate the remote application scenario of the timer switch of this utility model. The core protection of this utility model lies in the hardware structure of the timer switch itself and its classified timer control functions.

[0153] The embodiments of this utility model have been described in detail above with reference to the accompanying drawings, but this utility model is not limited to the specific embodiments described above. Those skilled in the art can make various modifications and changes to its details under the guidance of the principles and spirit of this utility model. For example, the specific storage location of the identification data, the specific form of the human-computer interaction interface module, and the selection of the storage medium. These simple variations and equivalent substitutions based on the core concept of this utility model all fall within the protection scope of this utility model.

Claims

1. A timer switch with a classification timing function, comprising a power supply circuit, a main control chip, a human-machine interface module, user interface elements, and a load control module, characterized in that: The main control chip is equipped with a memory for storing data, and the memory contains timing configuration data for multiple timing categories; The main control chip has a classification data register inside. The main control chip is configured to update the value of the classification data register to switch the target timing category in response to the category selection instruction received by the human-machine interface module, and determine the currently effective timing category according to the value of the register, and generate timing control signals only according to the timing configuration under the currently effective timing category. The load control module is electrically connected to the output port of the main control chip and is used to control the on / off state of the load power supply according to the timing control signal.

2. The timing switch with classification timing function according to claim 1, characterized in that: The main control chip is configured to access the timing configuration data in any of the following ways: (a) First configuration: The main control chip is configured to directly access the storage area in the memory corresponding to the target timing category to read data when a timing judgment program needs to be executed; (b) Second configuration: The memory is divided into a working data area and a cache data area; the working data area is dedicated to storing the currently effective timing category data; the cache data area is used to store complete timing configuration data for all timing categories; the main control chip is configured to: when switching timing categories, load the new currently effective timing category data from the cache data area into the working data area; and when executing the timing judgment program, access the working data area.

3. The timer switch with classification timing function according to claim 1, characterized in that: The storage structure for the timing configuration data in the memory is any one of the following: (a) Partitioned storage structure: The storage space of the memory is divided into multiple independent logical blocks, and each logical block is used to store all timing configuration data of a timing category; (b) Identifier storage structure: all timing configuration data for all timing categories are stored together, and each piece of timing configuration data is associated with an identifier.

4. The timing switch with classification timing function according to any one of claims 1, 2 or 3, characterized in that: The address space of the memory is pre-divided into multiple fixed-size physical storage blocks, each of which uniquely corresponds to and is used to store all timing configuration data for a timing category.

5. The time switch with classification timing function according to any one of claims 1, 2 or 3, characterized in that: The memory also contains a pre-stored mapping table, which records the actual starting address and data length information of each timing category and / or timing configuration data in the memory.

6. The time switch with classification timing function according to any one of claims 1, 2 or 3, characterized in that: The memory is a non-volatile memory.

7. The timing switch with classification timing function according to claim 6, characterized in that: The non-volatile memory is either an EEPROM or FLASH ROM built into the main control chip, or an external storage chip connected to the I / O port of the main control chip.

8. The timing switch with classification timing function according to any one of claims 1, 2 or 3, characterized in that: The memory is a volatile memory; the power supply circuit also includes an energy storage element for supplying power to the volatile memory to maintain data when the mains power is interrupted.

9. The timing switch with classification timing function according to claim 8, characterized in that: The energy storage element is any one of a rechargeable battery, a disposable battery, a high-capacity capacitor, or a supercapacitor.

10. The timing switch with classification timing function according to claim 2, characterized in that: The main control chip is configured to update the content of the working data area to the currently effective timing category data when switching timing categories.

11. The timing switch with classification timing function according to claim 1, characterized in that: The human-computer interaction interface module includes at least one of the following hardware units: (a) Physical buttons located on the device panel; (b) Encoded switch or rotary switch; (c) Touch-sensing layer or touch buttons; (d) A wireless signal receiving module for receiving control commands from a wireless remote controller; (e) A microphone for acquiring audio signals and a voice recognition processing module that communicates with the main control chip.

12. The timing switch with classification timing function according to claim 11, characterized in that: The wireless signal receiving module is an RF receiving module, a Bluetooth module, or an infrared receiver.

13. The timing switch with classification timing function according to claim 1, characterized in that: The user interface element includes at least one of the following hardware units: (a) LCD screen; (b) Digital tube display; (c) OLED display; (d) LED indicator array; (e) Panel backlight element.

14. The timing switch with classification timing function according to claim 13, characterized in that: The user interface element displays or indicates a visual feedback identifier corresponding to the timing category; the visual feedback identifier is at least one of graphics, icons, numbers, letters, text, arrows, and color changes, or is displayed in conjunction with category icons printed on the device housing.

15. The timing switch with classification timing function according to claim 1, characterized in that: The load control module includes a load drive circuit and a switching device, which is a relay, a silicon controlled rectifier, a solid-state relay, or a power MOSFET.

16. The timing switch with classification timing function according to claim 1, characterized in that: The timer switch has a multi-output structure; The memory independently stores timing configuration data for each output channel, corresponding to multiple timing categories. The main control chip independently determines the target timing category for each output and generates an independent timing control signal; the load control module has a multi-output structure, including multiple independent load drive circuits and switching devices to independently control the on / off state of each load power supply.