Autonomous driving domain controller network system, autonomous driving domain controller

By employing a combination of multiple Ethernet switch chips and PHY chips in the autonomous driving domain controller, rich network interfaces and high-bandwidth communication are provided, solving the problems of insufficient number and variety of interfaces, complex hardware design and low scalability in the existing technology, thereby improving system performance and reliability.

CN224459836UActive Publication Date: 2026-07-03ZHIDAO NETWORK TECH (BEIJING) CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
ZHIDAO NETWORK TECH (BEIJING) CO LTD
Filing Date
2025-06-27
Publication Date
2026-07-03

AI Technical Summary

Technical Problem

Existing network switching units in autonomous driving systems suffer from limited data processing capabilities, high transmission latency, a small number of interfaces, insufficient interface variety, complex hardware design, and low scalability, which affect system performance and reliability.

Method used

It adopts a combination of multiple Ethernet switch chips and PHY chips, providing rich network interfaces, including 1000BASE-T1, 100BASE-T1 and 10GBASE-T interfaces, and realizes 10Gbps network communication through Jetson AGX Orin module, reducing the use of PHY chip to simplify hardware design.

Benefits of technology

It increases the number and types of network interfaces for autonomous driving systems, reduces transmission latency, simplifies hardware design, meets the needs of multi-sensor access, and saves costs.

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Abstract

The application discloses an automatic driving domain controller network system and an automatic driving domain controller. The system comprises a first Ethernet switch chip connected with a first computing power unit, a second Ethernet switch chip connected with a second computing power unit, and the first Ethernet switch chip is connected with the second Ethernet switch chip, and the first Ethernet switch chip and the second Ethernet switch chip are also connected with a plurality of PHY chips respectively. The application realizes multi-interface, high-bandwidth, multi-redundancy and high-reliability network data exchange. The application also provides an automatic driving domain controller.
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Description

Technical Field

[0001] This application relates to domain controller network switching technology and autonomous driving technology, and in particular to an autonomous driving domain controller network system and an autonomous driving domain controller. Background Technology

[0002] In the development of autonomous driving technology, the network switching unit plays a crucial role. It needs to process massive amounts of data from multiple sensors (such as cameras, LiDAR, millimeter-wave radar, etc.) and enable information exchange between the vehicle and the outside world (other vehicles, infrastructure, etc.).

[0003] Existing network switching units have many problems, such as limited data processing capabilities, high transmission latency, few interfaces, insufficient interface variety, complex hardware design, and low scalability. These problems seriously affect the performance and reliability of autonomous driving systems. Utility Model Content

[0004] This application provides an autonomous driving domain controller network system and an autonomous driving domain controller to provide a network data exchange system with multiple interfaces, high bandwidth, multiple redundancies, and high reliability.

[0005] The embodiments of this application adopt the following technical solutions:

[0006] In a first aspect, embodiments of this application provide an autonomous driving domain controller network system, wherein the system includes a first Ethernet switch chip connected to a first computing unit and a second Ethernet switch chip connected to a second computing unit, the first Ethernet switch chip and the second Ethernet switch chip are connected, and the first Ethernet switch chip and the second Ethernet switch chip are also respectively connected to a plurality of PHY chips.

[0007] In some embodiments, the first computing unit and the second computing unit respectively constitute two switching networks, which are used to provide 10Gbps network communication.

[0008] The first computing unit is connected to one switch network via an XFI interface, and the second computing unit is connected to another switch network. The first Ethernet switch chip and the second Ethernet switch chip are connected via an XFI interface.

[0009] In some embodiments, both the first Ethernet switch chip and the second Ethernet switch chip are used to directly provide three 1000BASE-T1 interfaces, one 100BASE-T1 interface, and one 1000BASE-T interface;

[0010] Both the first Ethernet switch chip and the second Ethernet switch chip use two first communication switching chips as 10GBASE-T interfaces;

[0011] Both the first Ethernet switch chip and the second Ethernet switch chip use two third communication switching chips as 1000BASE-T1 interfaces.

[0012] In some embodiments, the first Ethernet switch chip and the second Ethernet switch chip each employ two second communication switching chip units;

[0013] The first computing unit and the second computing unit each use two Jetson AGX Orin module computing units;

[0014] The plurality of PHY chips include at least: four third communication switching units and two first communication switching units.

[0015] In some embodiments, the 100BASE-T1 interface is used as a 100 Mbps network interface;

[0016] The 1000BASE-T interface or the 1000BASE-T1 interface is used to provide a gigabit network interface;

[0017] The 10GBASE-T interface is used to provide a 10 Gigabit Ethernet interface.

[0018] In some embodiments, the computing unit employs a Jetson AGX Orin module and exchanges network data through the UPHY6 channel of the Jetson AGX Orin module.

[0019] In some embodiments, the Ethernet switch chip employs a second communication switching chip.

[0020] In some embodiments, the PHY chip includes a first communication switching chip, which is connected to an Ethernet switching network composed of Ethernet switch chips via an XFI interface, and the first communication switching chip also provides a 10GBASE-T network interface.

[0021] In some embodiments, the PHY chip includes a third communication switching unit, which is connected to an Ethernet switching network composed of Ethernet switch chips via an SGMII interface.

[0022] Secondly, embodiments of this application also provide an autonomous driving domain controller, which includes the autonomous driving domain controller network system described in the first aspect.

[0023] The at least one technical solution adopted in this application embodiment can achieve the following beneficial effects: the system includes a first Ethernet switch chip connected to a first computing unit and a second Ethernet switch chip connected to a second computing unit. The first Ethernet switch chip and the second Ethernet switch chip are connected, and the first Ethernet switch chip and the second Ethernet switch chip are also respectively connected to multiple PHY chips. Through the Ethernet switch chip and the PHY chip, not only is a large number of network interfaces provided, but also a wide variety of network interface types can be satisfied.

[0024] Furthermore, the aforementioned system enables internal network data exchange within the autonomous driving domain controller and provides multiple network interfaces for the autonomous driving domain controller. Attached Figure Description

[0025] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0026] Figure 1 A schematic diagram of the circuit principle of an existing autonomous driving domain controller network system;

[0027] Figure 2 This is a schematic diagram of the internal structure of the autonomous driving domain controller network system in the embodiments of this application;

[0028] Figure 3 This is a schematic diagram of the circuit principle of the autonomous driving domain controller network system in the embodiments of this application. Detailed Implementation

[0029] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions of this application will be clearly and completely described below in conjunction with specific embodiments and corresponding drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0030] like Figure 1The diagram shows the circuit schematic of an existing network switching unit. The computing unit is connected to the network interaction chip via RGMII. The network switching chip provides two additional RGMII interfaces (6 in total) for connecting 6 PHY chips. This method can expand to 6 1000BASE-T1 automotive Ethernet interfaces. However, this method requires separate design for each of the 6 PHY chip circuits, resulting in complex circuit design, large PCB area, and all provided network switching interfaces are 1000BASE-T1 interfaces, which are limited in number and cannot connect to more sensor units.

[0031] Therefore, in order to address the limitations of network switching units in terms of data processing capabilities, high transmission latency, small number of interfaces, insufficient interface types, complex hardware design, large PCB footprint, and low scalability, an autonomous driving domain controller network system is provided to improve the performance and reliability of autonomous driving systems.

[0032] The technical solutions provided by the various embodiments of this application are described in detail below with reference to the accompanying drawings.

[0033] This application provides an embodiment of an autonomous driving domain controller network system 200, such as... Figure 2 As shown, a schematic diagram of the internal structure of the autonomous driving domain controller network system in this application embodiment is provided. The system includes a first Ethernet switch chip 230 connected to a first computing unit 210 and a second Ethernet switch chip 240 connected to a second computing unit 220. The first Ethernet switch chip 230 and the second Ethernet switch chip 240 are connected, and the first Ethernet switch chip 230 and the second Ethernet switch chip 240 are also respectively connected to a plurality of PHY chips 250.

[0034] The computing power unit refers to the computing power unit of the autonomous driving domain controller. The Ethernet switch chip connects the computing power unit and the PHY chip. The PHY chip can be selected to support 10GBASE-T network PHY chip, 1000BASE-T1 network PHY chip, etc.

[0035] Specifically, the first computing unit 210 and the second computing unit 220 are divided into two paths, respectively connected to the first Ethernet switch chip 230 and the second Ethernet switch chip 240, forming two switch networks. These two switch networks can communicate at 10Gbps, effectively merging the two switch networks. The first Ethernet switch chip 230 is connected to the second Ethernet switch chip 240 and can access the switch network via an XFI interface, achieving 10Gbps network communication capability. This ensures data interaction between the two computing units 210 and 220, realizing an autonomous driving domain controller system composed of the two computing units 210 and 220.

[0036] The second Ethernet switch chip 240 is also connected to multiple PHY chips 250, providing more expansion interfaces. In each switch unit, the switch chip directly provides gigabit, 10-gigabit, and 100-megabit interfaces.

[0037] Through the above system, a first Ethernet switch chip connected to the first computing unit, a second Ethernet switch chip connected to the second computing unit, the first Ethernet switch chip connected to the second Ethernet switch chip, and the first Ethernet switch chip and the second Ethernet switch chip also connected to multiple PHY chips respectively, provide at least 16 network interfaces to the outside world.

[0038] The above system allows for the connection of Ethernet switch chips and multiple PHY chips to meet the needs of different external devices with different network interface protocols. For example, it can provide 6 1000BASE-T1 interfaces, 2 100BASE-T1 interfaces, 6 1000BASE-T1 interfaces, and 2 10GBASE-T interfaces.

[0039] By using the above system, when selecting multiple PHY chips, the use of external PHY chips is reduced by selecting a switch chip that integrates the PHY unit internally, thereby reducing the difficulty of PHY circuit design and PCB design area, and saving hardware design costs.

[0040] Unlike related technologies that suffer from a limited number and variety of network switching unit interfaces, this system employs a configuration where the first and second Ethernet switch chips are connected, and both are also connected to multiple PHY chips. This results in a rich array of network interfaces, providing a total of 16 external network interfaces to meet the needs of autonomous driving requiring access to multiple sensors. Additionally, it provides 6 1000BASE-T1 interfaces, 2 100BASE-T1 interfaces, 6 1000BASE-T1 interfaces, and 2 10GBASE-T interfaces to accommodate the diverse network interface protocols required by different external devices.

[0041] Unlike related technologies, which suffer from complex hardware design, large PCB footprint, and low scalability of network switching units, this system utilizes a switch chip with an integrated PHY unit, reducing the need for external PHY chips. This simplifies PHY circuit design, reduces PCB area requirements, and saves hardware design costs.

[0042] Unlike related technologies, which suffer from limited data processing capabilities and high transmission latency in network switching units, the above system effectively reduces transmission latency for data interaction between Ethernet switch chips and between computing units within the domain controller system by connecting the first Ethernet switch chip and the second Ethernet switch chip, and further connecting the first and second Ethernet switch chips to multiple PHY chips respectively.

[0043] In one embodiment of this application, the first computing unit and the second computing unit respectively constitute two switch networks, which are used to provide 10Gbps network communication. The first computing unit is connected to one switch network through an XFI interface, and the second computing unit is connected to the other switch network. The first Ethernet switch chip and the second Ethernet switch chip are connected through an XFI interface.

[0044] Specifically, two Jetson AGX Orin modules are also connected to the switch network via the XFI interface, achieving a 10Gbps network communication capability. This ensures data interaction between the two computing units, thus realizing an autonomous driving domain controller system composed of dual Jetson AGX Orin modules.

[0045] In one embodiment of this application, both the first Ethernet switch chip and the second Ethernet switch chip are used to directly provide three 1000BASE-T1 interfaces, one 100BASE-T1 interface, and one 1000BASE-T interface; both the first Ethernet switch chip and the second Ethernet switch chip use two first communication switching chips as 10G BASE-T interfaces; both the first Ethernet switch chip and the second Ethernet switch chip use two BCM89885 chips as second communication switching chips for the 1000BASE-T1 interfaces.

[0046] Specifically, each switch unit directly provides three 1000BASE-T1 interfaces, one 100BASE-T1 interface, and one 1000BASE-T interface via the switch chip. Each switch unit uses two BCM84891 chips to form the 10GBASE-T interface. Each switch unit uses a BCM89885 chip as the 1000BASE-T1 interface.

[0047] Preferably, the interface access method employs a combination of two BCM89581 switch chips, two Jetson AGX Orin module computing units, four BCM89885 PHY chips, and two BCM84891 PHY chips. By using switch chips with integrated PHY units, the number of external PHY chips is reduced, thereby reducing the complexity of PHY circuit design and PCB area, and saving hardware design costs.

[0048] In one embodiment of this application, the first Ethernet switch chip and the second Ethernet switch chip each employ two second communication switching chip units; the first computing unit and the second computing unit each employ two Jetson AGX Orin module computing units; the plurality of PHY chips include at least: four third communication switching units and two first communication switching units.

[0049] like Figure 3As shown, two Jetson AGX Orin modules are used to construct two switch networks, which can communicate at 10Gbps, thus merging the two switch networks. The two Jetson AGX Orin modules are also connected to the switch network via the XFI interface, achieving 10Gbps network communication capability and ensuring data interaction between the two computing units. This realizes an autonomous driving domain controller system composed of dual Jetson AGX Orin modules.

[0050] In one embodiment of this application, the 100BASE-T1 interface is used as a 100 Mbps network interface; the 1000BASE-T interface is used to provide a Gigabit network interface; and the 10GBASE-T interface is used to provide a 10 Gigabit network interface.

[0051] like Figure 3 As shown, by having a 10GBASE-T interface with high bandwidth, it can be used to cascade multiple autonomous driving domain controllers to form a multi-domain controller and multi-computing unit system.

[0052] The system in this embodiment provides the autonomous driving domain controller with 6 1000BASE-T1 interfaces, 2 100BASE-T1 interfaces, 6 1000BASE-T1 interfaces, and 2 10GBASE-T interfaces. The variety of interfaces ensures that the system can connect to more sensors, and the maximum interface bandwidth can reach 10Gbps.

[0053] By using two Jetson AGX Orin modules to form two switch networks, and with the two switch networks capable of 10Gbps network communication, the merging of the two switch networks was achieved.

[0054] The two Jetson AGX Orin modules are also connected to the switch network via the XFI interface, achieving a 10Gbps network communication capability. This ensures data interaction between the two computing units and realizes an autonomous driving domain controller system composed of dual Jetson AGX Orin modules.

[0055] 100Mbps network interfaces are suitable for connecting devices with smaller data volumes, such as RTK positioning and navigation devices. Gigabit Ethernet interfaces are suitable for devices with larger data volumes, such as LiDAR, vehicle OBU, and millimeter-wave radar. 10 Gigabit Ethernet interfaces can be used to enable cascading of autonomous driving domain controllers or to provide network routing. Gigabit and 10 Gigabit Ethernet interfaces are suitable for applications with high network latency requirements.

[0056] It boasts a large number of network interfaces. With a total of 16 network interfaces, it meets the needs of autonomous driving systems requiring access to multiple sensors. It also offers a variety of network interface types, providing 6 1000BASE-T1 interfaces, 2 100BASE-T1 interfaces, 6 1000BASE-T1 interfaces, and 2 10GBASE-T interfaces, satisfying the needs of different external devices with varying network interface protocols.

[0057] In one embodiment of this application, the computing unit uses a Jetson AGX Orin module and exchanges network data through the UPHY6 channel of the Jetson AGX Orin module.

[0058] In this embodiment, the UPHY6 channel of the Jetson AGX Orin module is used for network data exchange. The UPHY6 channel is an XFI interface, providing 10Gbps network communication capability. The domain controller uses two Jetson AGX Orin modules to form a more powerful computing unit, with each module connected to the XFI interface of a BCM89581 chip. The XFI interface adopts a 10 Gigabit per second inter-chip electrical interface specification.

[0059] Specifically, the two switch units are connected via the XFI interface, and the Jetson AGX Orin module is connected to the switch unit to achieve 10Gbps network communication capability, effectively reducing the transmission latency of data interaction in the domain controller system.

[0060] It should be noted that the Jetson AGX Orin module is a high-performance computing module developed by NVIDIA, constituting the computing unit of the autonomous driving domain controller. It is used as a preferred example in this application and is not intended to limit the scope of protection outside of this application.

[0061] In one embodiment of this application, the Ethernet switch chip employs a second communication switching chip.

[0062] Preferably, two BCM89581 chips are used in the embodiments of this application.

[0063] like Figure 3As shown, the first SWITCH chip is connected as follows: Port0, Port1, and Port3 of the chip are 1000BASE-T1 interfaces, Port5 is a 100BASE-T1 interface, and Port11 is a 100BASE-T interface. Therefore, there is no need to use a separate 4-channel PHY chip. This chip can directly provide 3 channels of 1000BASE-T1 interfaces, 1 channel of 100BASE-T1 interface, and 1 channel of 1000BASE-T interface, reducing circuit design complexity and PCB design area.

[0064] Optionally, the chip's Port4 and Port14 interfaces can be used as SGMII interfaces, forming two 1000BASE-T interfaces by connecting two PHY chips to a third communication switch.

[0065] Among them, the chip's Port12 interface can be used as an XFI interface, and a 10GBASE-T interface can be formed by connecting a PHY chip to the first communication exchange.

[0066] The chip's Port16 interface can be used as an XFI interface to connect to the Jetson AGX Orin Module 1, providing 10Gbps network communication capability.

[0067] The chip's Port8 interface can be used as an XFI interface to connect to a second switch chip, providing 10Gbps network communication capability.

[0068] like Figure 3 As shown, the second SWITCH chip is connected as follows: Port0, Port1, and Port3 of the chip are 1000BASE-T1 interfaces, Port5 is a 100BASE-T1 interface, and Port11 is a 100BASE-T interface. Therefore, there is no need to use a separate 4-channel PHY chip. This chip can directly provide 3 channels of 1000BASE-T1 interfaces, 1 channel of 100BASE-T1 interface, and 1 channel of 1000BASE-T interface.

[0069] The chip's Port4 and Port14 interfaces can be used as SGMII interfaces, forming two 1000BASE-T interfaces by connecting two PHY chips to a third communication switch.

[0070] Among them, the chip's Port12 interface can be used as an XFI interface, and a 10GBASE-T interface can be formed by connecting a PHY chip to the first communication exchange.

[0071] The chip's Port16 interface can be used as an XFI interface to connect to the Jetson AGX Orin Module 2, providing 10Gbps network communication capability.

[0072] The chip's Port8 interface can be used as an XFI interface to connect to the first switch chip.

[0073] It should be noted that the BCM89581 chip is a high-performance Ethernet switch chip developed by Broadcom. It is used as a preferred example in this application and is not intended to limit the scope of protection of other applications.

[0074] In one embodiment of this application, the PHY chip includes a first communication switching chip, which is connected to an Ethernet switching network composed of Ethernet switch chips via an XFI interface. The first communication switching chip also provides a 10GBASE-T network interface.

[0075] The BCM84891 chip supports an XFI interface, which allows it to connect to an Ethernet switching network comprised of switch chips. The BCM84891L chip provides one 10GBASE-T network interface. Preferably, in the embodiments of this application, two BCM84891 chips are used, each connected to one of two switch networks.

[0076] It should be noted that the BCM84891 chip is a PHY chip from Broadcom that supports 10GBASE-T networks. It is used as a preferred example in this application and is not intended to limit the scope of protection of items not covered in this application.

[0077] In one embodiment of this application, the PHY chip includes a third communication switching unit, which is connected to an Ethernet switching network composed of Ethernet switch chips via an SGMII interface.

[0078] The BCM89885 chip supports the SGMII interface and connects to an Ethernet switching network composed of switch chips via the SGMII interface. Preferably, in the embodiments of this application, four BCM84891 chips are used, each connected to a two-way switch network.

[0079] It should be noted that the BCM89885 chip is a PHY chip from Broadcom that supports 1000BASE-T1 networks. It is used as a preferred example in this application and is not intended to limit the scope of protection of other applications.

[0080] The above description is merely an embodiment of this application and is not intended to limit the scope of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of the claims of this application.

Claims

1. An autonomous driving domain controller network system, wherein, The system includes a first Ethernet switch chip connected to a first computing unit and a second Ethernet switch chip connected to a second computing unit. The first Ethernet switch chip is connected to the second Ethernet switch chip, and the first Ethernet switch chip and the second Ethernet switch chip are also connected to multiple PHY chips respectively.

2. The system of claim 1, wherein, The first computing unit and the second computing unit each constitute two switching networks, which are used to provide 10Gbps network communication. The first computing unit is connected to one switch network via an XFI interface, and the second computing unit is connected to another switch network. The first Ethernet switch chip and the second Ethernet switch chip are connected via an XFI interface.

3. The system as described in claim 2, wherein, Both the first Ethernet switch chip and the second Ethernet switch chip are used to directly provide three 1000BASE-T1 interfaces, one 100BASE-T1 interface, and one 1000BASE-T interface; Both the first Ethernet switch chip and the second Ethernet switch chip use a first communication switching chip as a 10GBASE-T interface; Both the first Ethernet switch chip and the second Ethernet switch chip use two second communication switching chips as 1000BASE-T1 interfaces.

4. The system as described in claim 2, wherein, The first Ethernet switch chip and the second Ethernet switch chip each employ two second communication switching chip units; The first computing unit and the second computing unit each use two Jetson AGX Orin module computing units; The plurality of PHY chips include at least: four third communication switching units and two first communication switching units.

5. The system as described in claim 3, wherein, The 100BASE-T1 interface is used as a 100 Mbps network interface; The 1000BASE-T interface or the 1000BASE-T1 interface is used to provide a gigabit network interface; The 10GBASE-T interface is used to provide a 10 Gigabit Ethernet interface.

6. The system of claim 1, wherein, The computing unit uses a Jetson AGX Orin module and exchanges network data through the UPHY6 channel of the Jetson AGX Orin module.

7. The system of claim 1, wherein, The Ethernet switch chip uses a second communication switching chip.

8. The system of claim 1, wherein, The PHY chip includes a first communication switching chip, which is connected to an Ethernet switching network composed of Ethernet switch chips via an XFI interface. The first communication switching chip also provides a 10GBASE-T network interface.

9. The system of claim 1, wherein, The PHY chip includes a third communication switching chip, which is connected to an Ethernet switching network composed of Ethernet switch chips via an SGMII interface.

10. An automated driving domain controller, wherein, An automatic driving domain controller network system including the automatic driving domain controller network system according to any one of claims 1 to 9.