A GMSL-based vehicle display module aging test device
By introducing GMSL technology for serialized data transmission and reverse communication into the vehicle display module aging test device, the problems of signal attenuation and interference in long-distance signal transmission are solved, achieving stability and compatibility of multiple signal types in high-temperature aging tests, and reducing hardware costs.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- SUZHOU GACII OPTOELECTRONICTECHNOLOGY CO LTD
- Filing Date
- 2025-07-10
- Publication Date
- 2026-07-07
Smart Images
Figure CN224471774U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the fields of communication control technology and display technology, specifically to an aging test device for vehicle display modules based on GMSL. Background Technology
[0002] With the development of new energy vehicle technology, the demand for automotive display modules is increasing, including but not limited to the need for high display resolution and long transmission distances for in-vehicle video signals. Therefore, to ensure the long-term stability and reliability of automotive display modules in real-world application environments (especially long-cable transmission scenarios), high-temperature aging tests are necessary. However, existing aging test schemes (such as those using cables shorter than 1 meter) typically lack simulation of the effects of real long-distance cable transmission (signal attenuation, jitter, crosstalk), failing to fully expose potential signal integrity issues and faults that may occur in automotive display modules under long-distance cabling conditions.
[0003] For example, the vehicle-mounted display screen aging trolley test system disclosed in Chinese utility model patent document (CN213025332U) replicates LVDS signals through a HUB chip and replicates RGB signals through an FPGA to achieve low-cost replication and distribution of parallel video signals to multiple displays for aging tests. It is more suitable for tests that do not meet the requirements of long-distance anti-interference transmission and high bandwidth under relatively short distance (internal wiring) conditions. Utility Model Content
[0004] This invention provides an aging test device for vehicle display modules based on GMSL, which solves the problem in the prior art of lacking a solution for simulating high-temperature aging tests of display modules using long-distance signal lines.
[0005] To solve the above-mentioned technical problems, the present invention provides a GMSL-based aging test device for vehicle display modules. The GMSL-based aging test device includes: a host computer module for generating and transmitting aging test signals; a main control module connected to the host computer module; an FPGA signal module connected to the main control module; and one or more vehicle display modules connected to the FPGA signal module via corresponding signal transmission channels, wherein the signal transmission channels are equipped with GMSL conversion links.
[0006] First, parallel data transmission is affected by uneven wiring lengths and crosstalk, preventing parallel buses from achieving very high bandwidth cross-chip transmission. For example, in SOC chips, various high-speed data transmission bus protocols often use SerDes technology. Therefore, serializing data transmission can further increase the upper limit of transmission bandwidth. This is where GMSL (Gigabit Multimedia Serial Link) technology comes in. Its characteristic is that it converts parallel data into serial data for transmission, and decodes the serial data back into parallel data at the receiving end. It is a high-speed serial communication technology that supports long-distance, high-reliability transmission of video, audio, control signals, and data.
[0007] The beneficial effects of the technical solution provided by this utility model compared to the prior art are as follows:
[0008] By incorporating a GMSL conversion link in the signal transmission channel to utilize GMSL technology, compared to ordinary SerDes technology, GMSL also provides a low-speed communication channel (Reverse-Link or Backward Link) that runs in the opposite direction to the high-speed data stream (Forward-Link), allowing the aforementioned vehicle display module aging test device to achieve reverse communication. Furthermore, GMSL technology uses transmit pre-emphasis and receive equalization to improve the signal integrity of the link, resisting signal attenuation caused by cables, and uses a Jitter Filter PLL (Phase-Locked Loop) to eliminate jitter on the input clock, improving link reliability.
[0009] In other words, by utilizing the aforementioned characteristics of GMSL technology to resist signal interference and data attenuation caused by cable length, longer data cables can be used in the aging test of automotive display modules. For example, serial transmission of up to several Gbps can be achieved between the FPGA signal module and the automotive display module over a 15-meter coaxial or twisted-pair cable, fully meeting the current requirement of 3 to 5 meters for automotive signal transmission distance.
[0010] The vehicle display module aging test device includes a host computer module, a main control module, an FPGA signal module, and a signal transmission channel structure with corresponding GMSL conversion links. Compared with the current ordinary LVDS test, it has a more complex connection architecture and can simultaneously test multiple GMSL links, thereby realizing the aging and mass production test of vehicle display modules.
[0011] In some implementations, the signal transmission channel is provided with a first GMSL conversion link, including: an LVDS to GMSL module and a GMSL to LVDS / RGB module connected in sequence to the FPGA signal module, wherein the GMSL to LVDS / RGB module is connected to the vehicle display module.
[0012] The above technical solution utilizes an LVDS-to-GMSL module and a GMSL-to-LVDS / RGB module to convert LVDS signals to GMSL signals. Specifically, during aging tests: the FPGA signal module connects to the LVDS-to-GMSL module via LVDS signals. The LVDS-to-GMSL module converts the LVDS signal to a GMSL signal, which in turn connects to the GMSL-to-LVDS / RGB module. The GMSL-to-LVDS / RGB module converts the GMSL signal back to either an LVDS signal or an RGB signal, which is then connected to and illuminates the corresponding automotive display module, thus enabling the connectivity of the aging test channel.
[0013] In some implementations, the signal transmission channel is provided with a second GMSL conversion link, including: an HDMI to GMSL module and a GMSL to eDP / LVDS / RGB module connected in sequence to the FPGA signal module, wherein the GMSL to eDP / LVDS / RGB module is connected to the vehicle display module.
[0014] Using the above technical solution, the conversion between HDMI and GMSL signals is achieved through the cascading of an HDMI-to-GMSL module and a GMSL-to-eDP / LVDS / RGB module. Specifically, during aging tests: the FPGA signal module connects to the HDMI-to-GMSL module via an HDMI signal; the HDMI-to-GMSL module converts the HDMI signal to a GMSL signal, which is then connected to the GMSL-to-eDP / LVDS / RGB module. The GMSL-to-eDP / LVDS / RGB module converts the GMSL signal to an eDP / LVDS / RGB signal, which is then connected to and illuminates the corresponding automotive display module, thus achieving connectivity of the test channel for aging tests.
[0015] In some implementations, the signal transmission channel includes a third GMSL conversion link, comprising: a DP to GMSL module and a GMSL to eDP / LVDS / RGB module connected in sequence to the FPGA signal module, wherein the GMSL to eDP / LVDS / RGB module is connected to the vehicle display module.
[0016] By employing the above technical solution, the conversion between DP and GMSL signals is achieved through the connection of a DP-to-GMSL module and a GMSL-to-eDP / LVDS / RGB module. Specifically, during aging tests: the FPGA signal module connects to the DP-to-GMSL module via a DP signal; the DP-to-GMSL module converts the DP signal to a GMSL signal, which is then connected to the GMSL-to-eDP / LVDS / RGB module; the GMSL-to-eDP / LVDS / RGB module converts the GMSL signal to an eDP / LVDS / RGB signal, which is then connected to and illuminates the corresponding automotive display module, thus enabling the connectivity of the test channel for aging tests.
[0017] In some implementations, the FPGA signal module is connected to an LVDS to GMSL module, an HDMI to GMSL module, and a DP to GMSL module, respectively; wherein, the FPGA signal module is connected to the LVDS to GMSL module via an LVDS signal; the FPGA signal module is connected to the HDMI to GMSL module via an HDMI signal; and the FPGA signal module is connected to the DP to GMSL module via a DP signal.
[0018] By adopting the above technical solution, the FPGA signal module is connected to the main control module and three output signal channels (including: signal conversion between LVDS and GMSL signals, signal conversion between HDMI and GMSL signals, and signal conversion between DP and GMSL signals) to achieve simultaneous compatible communication of multiple signal types, which greatly improves the adaptability and scalability of the aging test device.
[0019] In some implementations, the signal transmission channel is provided with multiple first GMSL conversion links, wherein the FPGA signal module is connected to multiple LVDS to GMSL modules respectively, and the multiple LVDS to GMSL modules are connected to multiple GMSL to LVDS / RGB modules in a one-to-one correspondence.
[0020] By adopting the above technical solution, multiple LVDS signals can be converted and transmitted simultaneously to meet the parallel processing requirements of aging test equipment for multiple LVDS signals. This makes it suitable for testing on automotive display module production lines based on LVDS and RGB interfaces. It can enable a sufficient number of automotive display modules to be lit up with low hardware costs and supports long-distance signal transmission with minimal wiring to simulate actual automotive applications.
[0021] In some implementations, the signal transmission channel is provided with multiple second GMSL conversion links, wherein the FPGA signal module is connected to multiple HDMI to GMSL modules respectively, and the multiple HDMI to GMSL modules are connected to the GMSL to eDP / LVDS / RGB modules in a one-to-one correspondence.
[0022] The above technical solution enables simultaneous conversion and transmission of multiple HDMI signals. The high-speed conversion between HDMI and GMSL signals provides higher data bandwidth, allowing for the illumination of larger, higher-resolution eDP interface automotive display modules. It also supports the illumination of larger, higher-resolution LVDS and RGB interface automotive display modules. Although this solution has higher hardware costs compared to multi-LVDS signal solutions, it can meet the aging test requirements of a wider range of automotive display module models.
[0023] In some implementations, the main control module and the FPGA signal module are connected via a DP interface, an HDMI interface, a PCIe interface, or an SPI interface. Using these technologies, the PCIe (Peripheral Component Interconnect Express) interface is a high-speed serial computer expansion bus standard that provides higher bandwidth to meet the high data processing speed requirements of automotive applications. Correspondingly, in aging tests, the PCIe interface can support complex graphics processing and video transmission for powering the display module. The SPI interface is suitable for short-distance communication between the microcontroller and peripheral devices; correspondingly, in aging tests, where the distance between the FPGA signal module and the main control module is short, the SPI interface is more cost-effective.
[0024] Furthermore, the main control module is an ARM main control module, and the sub-modules of the main control module include one or more of the following: Gigabit Ethernet, eMMC, LPDDR4, DP, HDMI, PCIe, and SPI.
[0025] In some implementations, the in-vehicle display module includes a system chip, an HDMI serializer, an OLDI deserializer, and a display module connected in sequence. By employing the above technical solution, the OLDI deserializer enables compatibility with LVDS technology display devices, reducing hardware costs.
[0026] In some implementations, the in-vehicle display module includes a system chip, an HDMI serializer, an eDP deserializer, and a display module connected in sequence. Using the above technical solution, high-resolution and high-quality video display is achieved through the eDP interface, making it suitable for application scenarios requiring high-definition display. Attached Figure Description
[0027] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort, wherein:
[0028] Figure 1 This is a connection frame of an embodiment of an aging test device for vehicle display modules based on GMSL provided by this utility model. Figure 1 ;
[0029] Figure 2 This is a connection frame of an embodiment of an aging test device for vehicle display modules based on GMSL provided by this utility model. Figure 2 ;
[0030] Figure 3 This is a connection frame of an embodiment of an aging test device for vehicle display modules based on GMSL provided by this utility model. Figure 3 ;
[0031] Figure 4 This is an LVDS interface signal connection diagram of an embodiment of an in-vehicle display module based on a GMSL-based aging test device for in-vehicle display modules provided by this utility model;
[0032] Figure 5 This is an eDP interface signal connection diagram of an embodiment of an in-vehicle display module based on a GMSL-based aging test device for in-vehicle display modules provided by this utility model.
[0033] In the picture:
[0034] 10. Host computer module; 20. Main control module; 30. FPGA signal module; 40. Vehicle display module; 41. System chip; 42. HDMI serializer; 43. OLDI deserializer; 44. eDP deserializer; 45. Display module;
[0035] 50. LVDS to GMSL module; 51. GMSL to LVDS / RGB module; 60. HDMI to GMSL module; 61. GMSL to eDP / LVDS / RGB module; 70. DP to GMSL module. Detailed Implementation
[0036] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present utility model. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present utility model without creative effort are within the protection scope of the present utility model.
[0037] For ease of subsequent description, the terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such use of data can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first," "second," etc., are generally of the same class and are not limited in number; for example, a first object can be one or more. Furthermore, in the specification and claims, "and / or" indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.
[0038] See Figure 1 As shown, Figure 1 The diagram shows a connection frame of an embodiment of an aging test device for an in-vehicle display module 40 based on GMSL provided in this application. Figure 1 .
[0039] In some implementations, the aging test device for the GMSL-based vehicle display module 40 includes: a host computer module 10 for generating and transmitting aging test signals; a main control module 20 connected to the host computer module 10; an FPGA signal module 30 connected to the main control module 20; and one or more vehicle display modules 40 connected to the FPGA signal module 30 via corresponding signal transmission channels, wherein the signal transmission channels are equipped with GMSL conversion links.
[0040] In this embodiment, a GMSL conversion link is provided in the signal transmission channel to utilize GMSL technology. Compared to ordinary SerDes technology, GMSL technology provides a low-speed communication channel (Reverse-Link or Backward Link) that is opposite to the high-speed data stream (Forward-Link), allowing the aforementioned vehicle display module 40 aging test device to achieve reverse communication. Furthermore, GMSL technology uses transmit pre-emphasis and receive equalization to improve the signal integrity of the link, resist signal attenuation caused by cables, and uses a Jitter Filter PLL (Phase-Locked Loop) to eliminate jitter on the input clock, improving link reliability.
[0041] For example, 50Ω coaxial cable or 100Ω shielded twisted-pair cable can be used for data transmission to achieve distances of 15m and above. Currently, the communication protocol (GMSL3) based on the GMSL architecture already meets the requirement of a maximum single-channel rate of 12Gbps, adapting to 8K video testing needs. Using GMSL technology allows for long-distance transmission of high-speed video signals and auxiliary control signals with fewer cables. Therefore, by applying the aforementioned GMSL technology, a long-distance signal transmission solution can be implemented to conduct high-temperature aging tests on the vehicle display module 40, improving the stability of the vehicle display module 40 in actual use.
[0042] The vehicle display module 40 aging test device includes a host computer module 10, a main control module 20, an FPGA signal module 30, and a signal transmission channel structure with corresponding GMSL conversion links. Compared with the current ordinary LVDS test, it has a more complex connection architecture and can simultaneously test multiple GMSL links, thereby realizing the aging mass production test of the vehicle display module 40.
[0043] like Figure 1 As shown, in some implementations, three signal transmission channels are provided, including a first GMSL conversion link, a second GMSL conversion link, and a third GMSL conversion link. The first GMSL conversion link includes an LVDS to GMSL module 50 and a GMSL to LVDS / RGB module 51 connected in sequence to the FPGA signal module 30. The second GMSL conversion link includes an HDMI to GMSL module 60 and a GMSL to eDP / LVDS / RGB module 61 connected in sequence to the FPGA signal module 30. The third GMSL conversion link includes a DP to GMSL module 70 and a GMSL to eDP / LVDS / RGB module 61 connected in sequence to the FPGA signal module 30.
[0044] For example, such as Figure 1 As shown, the FPGA signal module 30 is connected to the LVDS to GMSL module 50, the HDMI to GMSL module 60, and the DP to GMSL module 70 respectively; it realizes three output signal channels (including: signal conversion between LVDS signal and GMSL signal, signal conversion between HDMI signal and GMSL signal, and conversion between DP signal and GMSL signal) to achieve simultaneous compatible communication of multiple signal types, which greatly improves the adaptability and scalability of the aging test device.
[0045] Among them, such as Figure 1The FPGA signal module 30 is connected to the LVDS-to-GMSL module 50 via LVDS signals. Its control channel is controlled by UART / I2C / SPI signals. The LVDS-to-GMSL module 50 and the GMSL-to-LVDS / RGB module 51 convert LVDS signals to GMSL signals. Specifically, during aging tests: the FPGA signal module 30 is connected to the LVDS-to-GMSL module 50 via LVDS signals and UART / I2C / SPI control signals. The LVDS-to-GMSL module 50 converts the GMSL signals to GMSL signals and connects to the GMSL-to-LVDS / RGB module 51. The GMSL-to-LVDS / RGB module 51 converts the GMSL signals to LVDS or RGB signals and UART / I2C / SPI control signals, then connects to and illuminates the corresponding vehicle display module 40, thus achieving test channel connectivity for aging tests. For example, the LVDS-to-GMSL module 50 can use a chip such as the MAX9265, and the GMSL-to-LVDS / RGB module 51 can use a chip such as the MAX9266 or MAX9264. This application does not impose any limitations on this.
[0046] Continue to combine Figure 1 As shown, the FPGA signal module 30 achieves the conversion between HDMI and GMSL signals through the cascading of the HDMI to GMSL module 60 and the GMSL to eDP / LVDS / RGB module 61. Specifically, during aging tests: the FPGA signal module 30 connects to the HDMI to GMSL module 60 via an HDMI signal, and its control channel is controlled via UART / I2C / SPI signals. The HDMI to GMSL module 60 converts the HDMI signal to a GMSL signal and connects to the GMSL to eDP / LVDS / RGB module 61 via the GMSL signal. The GMSL to eDP / LVDS / RGB module 61 converts the GMSL signal to eDP / LVDS / RGB signals and UART / I2C / SPI control signals, then connects to and illuminates the corresponding vehicle display module 40, thus achieving test channel connectivity for aging tests. Among them, the above-mentioned solution of using HDMI to GMSL and then to eDP / LVDS / RGB can achieve higher data bandwidth so as to meet the requirement of lighting up the larger size and higher resolution eDP interface vehicle display module 40 during aging test. At the same time, it also supports lighting up the LVDS and RGB interface vehicle display modules 40.
[0047] For example, the HDMI to GMSL module 60 can use chips such as MAX76751 and MAX76762; the GMSL to eDP / LVDS / RGB module 61 can use chips such as MAX76752, MAX76763, and MAX9264, and this application does not limit the specific chips used.
[0048] The FPGA signal module 30 achieves the conversion between DP and GMSL signals through the connection of the DP-to-GMSL module 70 and the GMSL-to-eDP / LVDS / RGB module 61. Specifically, during aging tests: the FPGA signal module 30 connects to the DP-to-GMSL module 70 via a DP signal, and its control channel is controlled via UART / I2C / SPI signals; the DP-to-GMSL module 70 converts the DP signal to a GMSL signal and connects to the GMSL-to-eDP / LVDS / RGB module 61 via the GMSL signal; the GMSL-to-eDP / LVDS / RGB module 61 converts the GMSL signal into eDP / LVDS / RGB signals and UART / I2C / SPI signals, then connects to and illuminates the corresponding automotive display module 40, achieving test channel connectivity for aging tests. The DP-to-GMSL and then eDP / LVDS / RGB conversion scheme provides higher data bandwidth for aging tests, enabling the illumination of larger-sized, higher-resolution eDP interface automotive display modules 40, while also supporting the illumination of LVDS and RGB interface automotive display modules 40. For example, the GMSL to eDP / LVDS / RGB module 61 can use chips such as MAX76752, MAX76763, and MAX9264, and this application does not limit it.
[0049] The aforementioned FPGA signal transmission module simultaneously sets up three data transmission channels, which can meet the aging and mass production testing of the vehicle display module 40 with multiple interfaces. For example, the host computer module 10 communicates with the main control module 20 via a gigabit Ethernet port or serial port to transmit video image signals, control channel signals, and returned monitoring information, etc. The main control module 20 is an ARM main control module 20.
[0050] Combination Figure 2 As shown, Figure 2 The diagram shows a connection frame of an embodiment of an aging test device for an in-vehicle display module 40 based on GMSL provided in this application. Figure 2 .
[0051] In some implementations, the signal transmission channel is provided with multiple first GMSL conversion links, wherein the FPGA signal module 30 is connected to multiple LVDS to GMSL modules 50 respectively, and the multiple LVDS to GMSL modules 50 are connected to multiple GMSL to LVDS / RGB modules 51 in a one-to-one correspondence.
[0052] In this embodiment, multiple LVDS signals are simultaneously converted and transmitted to meet the parallel processing requirements of the aging test device for multiple LVDS signals, thereby adapting to the testing of the production line of the vehicle display module 40 based on LVDS and RGB interfaces. This enables the lighting of a sufficient number of vehicle display modules 40 with low hardware costs and supports long-distance signal transmission with minimal wiring to simulate actual vehicle applications.
[0053] like Figure 2 As shown, LVDS1 represents a 1-link LVDS signal (including 1 pair of differential clocks and 4 pairs of differential data). If n represents 24, then LVDSn represents a 24-link LVDS signal. The LVDS to GMSL module 50 transmits 24(n) pairs of GMSL signals, and the GMSL to LVDS / RGB module 51 receives 24(n) pairs of GMSL signals. This can enable the lighting of 24 RGB interface vehicle display modules 40, or 24 single-link LVDS interface vehicle display modules 40, or 12 dual-link LVDS interface vehicle display modules 40, or 6 4-link LVDS interface vehicle display modules 40. Here, n represents an imaginary value, which can be adjusted according to the actual test scenario; this application does not limit this adjustment.
[0054] In other words, in this embodiment, the above-mentioned vehicle display module 40 aging test device can achieve the goal of lighting up more vehicle display modules 40 with lower hardware costs (the low-cost effect of LVDS) to simulate actual vehicle applications and complete the aging test.
[0055] See Figure 3 As shown, Figure 3 The diagram shows a connection frame of an embodiment of an aging test device for an in-vehicle display module 40 based on GMSL provided in this application. Figure 3 .
[0056] In some implementations, the signal transmission channel is provided with multiple second GMSL conversion links, wherein the FPGA signal module 30 is connected to multiple HDMI to GMSL modules 60 respectively, and the multiple HDMI to GMSL modules 60 are connected to GMSL to eDP / LVDS / RGB modules 61 in a one-to-one correspondence.
[0057] In this embodiment, multiple second GMSL conversion links are used to achieve simultaneous conversion and transmission of multiple HDMI signals. This high-speed conversion between HDMI and GMSL signals provides higher data bandwidth, enabling the illumination of larger-sized, higher-resolution eDP interface automotive display modules 40. Simultaneously, it can support the illumination of larger-sized, higher-resolution LVDS and RGB interface automotive display modules 40. Although this method has higher hardware costs compared to the aforementioned multi-LVDS signal solution, it can adapt to the aging test requirements of a wider range of automotive display module models 40.
[0058] For example, Figure 3 In this context, HDMI1 represents a set of HDMI signals, including 1 pair of differential clock signals and 3 pairs of differential data signals. When n represents 12, the corresponding HDMI to GMSL module 60 can output 24 (2n) pairs of GMSL signals (currently, the HDMI to GMSL module 60 can output 2 pairs of GMSL signals). Therefore, it can actually light up 24 RGB interface automotive display modules 40, or 24 single-link LVDS interface automotive display modules 40, or 12 dual-link LVDS interface automotive display modules 40, or 6 4-link LVDS interface automotive display modules 40. Here, n represents an imaginary value, which can be adjusted according to the actual testing scenario; this application does not limit this adjustment.
[0059] In some implementations, the main control module 20 and the FPGA signal module 30 are connected via a DP interface, an HDMI interface, a PCIE interface, or an SPI interface. In this embodiment, the PCIE (Peripheral Component Interconnect Express) interface is a high-speed serial computer expansion bus standard that provides higher bandwidth to meet the high data processing speed requirements of automotive applications. Correspondingly, in aging tests, the PCIE interface can support complex graphics processing and video transmission for illuminating the display module 45. The DP and HDMI interfaces are mainly used for transmitting high-speed video signals, while the PCIE interface can transmit both high-speed video signals and handle high-speed synchronous communication signals. The SPI interface is suitable for short-distance communication between the microcontroller and peripheral devices, primarily used for processing relatively low-speed serial communication signals. Correspondingly, in aging tests, the distance between the FPGA signal module 30 and the main control module 20 is short, making the SPI interface more cost-effective.
[0060] Furthermore, the main control module 20 is an ARM main control module 20, and the sub-modules of the main control module 20 include one or more of the following: Gigabit Ethernet, eMMC, LPDDR4, DP, HDMI, PCIe, and SPI.
[0061] Combination Figure 4 As shown, Figure 4 This paper shows an LVDS interface signal connection diagram of an embodiment of an aging test device for an in-vehicle display module 40 based on GMSL provided in this application.
[0062] In some implementations, the vehicle-mounted display module 40 includes a system chip 41, an HDMI serializer 42, an OLDI deserializer 43, and a display module 45 connected in sequence. In this embodiment, the OLDI deserializer 43 is used to enable display devices compatible with LVDS technology, thereby reducing hardware costs.
[0063] OLDI (OpenLDI, Open LVDS Display Interface) is an open standard interface based on LVDS (Low Voltage Differential Signaling) technology, primarily used for transmitting digital video signals. TMDS (Transition Minimized Differential Signaling) is the underlying physical layer technology used in the HDMI protocol to achieve high-speed audio and video transmission.
[0064] For example, the system chip 41 (such as the SOC main control chip) transmits audio and video image signals to the HDMI serializer 42 via the HDMI signal and converts the HDMI signal into 2-link GMSL signals (i.e., GMSL LINK-A and GMSL LINK-B), and then transmits them to the corresponding two OLDI deserializers 43 via GMSL cables; and the two corresponding OLDI deserializers 43 convert the 2-link GMSL signals into 4 sets of OLDI signals, and then transmit them to the display module 45 with 2 OLDI interfaces.
[0065] Combination Figure 5 As shown, Figure 5 This paper shows an eDP interface signal connection diagram of an embodiment of an aging test device for an in-vehicle display module 40 based on GMSL provided in this application.
[0066] In some implementations, the in-vehicle display module 40 includes a system chip 41, an HDMI serializer 42, an eDP deserializer 44, and a display module 45 connected in sequence. In this embodiment, high-resolution and high-quality video display is achieved through the eDP interface, which is suitable for application scenarios requiring high-definition display.
[0067] For example, the system chip 41 (such as the SOC main control chip) transmits audio and video image signals to the HDMI serializer 42 via the HDMI signal and converts the HDMI signal into 2-link GMSL signals (i.e., GMSL LINK-A and GMSL LINK-B), and then transmits them to the corresponding two OLDI deserializers 43 via the GMSL cable; and the two corresponding OLDI deserializers 43 convert the 2-link GMSL signal into a set of eDP signals, and then transmit them to the display module 45 with the eDP interface.
[0068] The above description is merely an embodiment of this utility model and does not limit the patent scope of this utility model. Any equivalent structural or procedural transformations made based on the description and drawings of this utility model, or direct or indirect applications in other related technical fields, should be included within the protection scope of this utility model.
Claims
1. An aging test device for vehicle display modules based on GMSL, characterized in that, include: The host computer module is used to generate and transmit aging test signals; The main control module is connected to the host computer module; An FPGA signal module, wherein the FPGA signal module is connected to the main control module; One or more vehicle-mounted display modules, wherein the vehicle-mounted display modules are connected to the FPGA signal module through a corresponding signal transmission channel, wherein the signal transmission channel is provided with a GMSL conversion link.
2. The aging test device for vehicle display modules based on GMSL according to claim 1, characterized in that, The signal transmission channel is provided with a first GMSL conversion link, including: an LVDS to GMSL module and a GMSL to LVDS / RGB module connected in sequence to the FPGA signal module, wherein the GMSL to LVDS / RGB module is connected to the vehicle display module.
3. The aging test device for vehicle display modules based on GMSL according to claim 1, characterized in that, The signal transmission channel is provided with a second GMSL conversion link, including: an HDMI to GMSL module and a GMSL to eDP / LVDS / RGB module connected in sequence to the FPGA signal module, wherein the GMSL to eDP / LVDS / RGB module is connected to the vehicle display module.
4. The aging test device for vehicle display modules based on GMSL according to claim 1, characterized in that, The signal transmission channel includes a third GMSL conversion link, comprising: a DP to GMSL module and a GMSL to eDP / LVDS / RGB module connected in sequence to the FPGA signal module, wherein the GMSL to eDP / LVDS / RGB module is connected to the vehicle display module.
5. The aging test device for vehicle display modules based on GMSL according to any one of claims 2 to 4, characterized in that, The FPGA signal module is connected to the LVDS to GMSL module, the HDMI to GMSL module, and the DP to GMSL module, respectively; wherein, the FPGA signal module is connected to the LVDS to GMSL module via an LVDS signal; the FPGA signal module is connected to the HDMI to GMSL module via an HDMI signal; and the FPGA signal module is connected to the DP to GMSL module via a DP signal.
6. The aging test device for vehicle display modules based on GMSL according to claim 2, characterized in that, The signal transmission channel is provided with multiple first GMSL conversion links, wherein the FPGA signal module is connected to multiple LVDS to GMSL modules respectively, and the multiple LVDS to GMSL modules are connected to multiple GMSL to LVDS / RGB modules in a one-to-one correspondence.
7. The aging test device for vehicle display modules based on GMSL according to claim 3, characterized in that, The signal transmission channel is provided with multiple second GMSL conversion links, wherein the FPGA signal module is connected to multiple HDMI to GMSL modules respectively, and the multiple HDMI to GMSL modules are connected to the GMSL to eDP / LVDS / RGB modules in a one-to-one correspondence.
8. The aging test device for vehicle display modules based on GMSL according to claim 1, characterized in that, The main control module and the FPGA signal module are connected via a DP interface, an HDMI interface, a PCIE interface, or an SPI interface.
9. The aging test device for vehicle display modules based on GMSL according to any one of claims 6 to 8, characterized in that, The vehicle-mounted display module includes a system chip, an HDMI serializer, an OLDI deserializer, and a display module connected in sequence.
10. The aging test apparatus for vehicle display modules based on GMSL according to any one of claims 6 to 8, characterized in that, The vehicle-mounted display module includes a system chip, an HDMI serializer, an eDP deserializer, and a display module connected in sequence.