Back contact cell and photovoltaic module

By increasing the number of electrodes and optimizing the electrode layout in the back contact cell, the problem of unsatisfactory passivation effect of P-region doped polycrystalline silicon was solved, achieving higher current collection efficiency and cell conversion efficiency.

CN224473672UActive Publication Date: 2026-07-07ANHUI SUNSHINE SOLAR TECHNOLOGY CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
ANHUI SUNSHINE SOLAR TECHNOLOGY CO LTD
Filing Date
2025-05-15
Publication Date
2026-07-07

AI Technical Summary

Technical Problem

The passivation effect of polycrystalline silicon doped in the P-region of existing back-contact batteries is not ideal, with many defect recombination centers, high series resistance, and poor electron collection ability, which limits the improvement of battery efficiency.

Method used

Increasing the number of first electrodes in a back-contact battery provides more conductive paths, shortens the path for electrons to reach the electrodes, reduces lateral transport distance, and optimizes current harvesting through a reasonable layout of electrodes and main grids.

Benefits of technology

It significantly improves current collection efficiency, reduces energy loss and recombination probability, optimizes battery electrical performance parameters, and enhances overall conversion efficiency.

✦ Generated by Eureka AI based on patent content.

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Abstract

The embodiment of the present disclosure relates to the technical field of solar cells, and provides a back contact cell and a photovoltaic module, the back contact cell comprising a substrate, a first semiconductor doped layer, a second semiconductor doped layer, a first electrode group and a second electrode. By increasing the number of the first electrodes, the lateral transmission distance of electrons in the semiconductor material is significantly shortened, the lateral resistance is reduced, the current collection efficiency is improved, the electrical performance parameters of the cell are optimized, and the overall conversion efficiency of the cell is significantly improved.
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Description

Technical Field

[0001] This disclosure relates to the field of solar cell technology, and in particular to a back-contact battery and photovoltaic module. Background Technology

[0002] In the field of solar cells, back-contact cells have attracted widespread attention due to their high photoelectric conversion efficiency and good stability. Currently, the mainstream industrial back-contact cell structure in the P-region typically uses a tunneling oxide layer (SiOX) superimposed with doped polycrystalline silicon for substrate passivation. However, in the industrial production of back-contact cells, the passivation effect of doped polycrystalline silicon in the P-region is not ideal, exhibiting problems such as numerous defect recombination centers, high series resistance, and poor electron collection ability, resulting in a small process window and limiting the improvement of cell efficiency. Utility Model Content

[0003] This disclosure provides a back-contact battery and a photovoltaic module, aiming to optimize the battery's electrical performance parameters and improve its overall conversion efficiency.

[0004] According to some embodiments of this disclosure, one aspect of this disclosure provides a back contact battery, comprising: a substrate, the substrate including a first surface and a second surface opposite to each other, a first semiconductor doped layer and a second semiconductor doped layer located on the second surface, wherein the first doping element in the first semiconductor doped layer and the second doping element in the second semiconductor doped layer have different conductivity types; a first electrode group, the first electrode group being electrically contacted with a corresponding first semiconductor doped layer, the first electrode group including a plurality of first electrodes spaced apart, each first electrode being electrically contacted with the first semiconductor doped layer; and a second electrode, the second electrode being electrically contacted with the second semiconductor doped layer, wherein both the first electrode and the second electrode extend along a first direction.

[0005] Preferably, the width D of the first semiconductor doped layer corresponding to the first electrode group is 0.1-1 mm.

[0006] Preferably, the spacing H between adjacent first electrodes in the first electrode group satisfies H=D / (M-1); where M is the number of first electrodes in the first electrode group.

[0007] Preferably, the spacing S between adjacent first semiconductor doped layers is 0.5-3 mm, where S > D.

[0008] Preferably, the number X of the first electrode group satisfies X=L / S+1, where L is the length of the substrate in the second direction.

[0009] Preferably, the back contact battery further includes: a first main grid, which extends along the second direction and is in electrical contact with the first electrode in the first electrode group, and has an insulating gap between it and the second electrode; and a second main grid, which extends along the second direction and is in electrical contact with the second electrode, and has an insulating gap between it and the first electrode.

[0010] Preferably, the number of first electrodes in the first electrode group is 2-20.

[0011] Preferably, the substrate is an N-type silicon wafer or a P-type silicon wafer.

[0012] Preferably, the first electrode group and the second electrode are arranged alternately along the second direction, and there is a gap between the first electrode group and the second electrode.

[0013] According to some embodiments of this disclosure, another aspect of this disclosure also provides a photovoltaic module, including: a plurality of back contact cells as described in the previous embodiments; a connecting member for connecting adjacent back contact cells; an encapsulating film covering the surface of the back contact cells; and a cover plate located on the surface of the encapsulating film away from the back contact cells, the cover plate including a first cover plate and a second cover plate.

[0014] The technical solutions provided in this disclosure have at least the following advantages:

[0015] In this embodiment, by increasing the number of first electrodes, more conductive paths can be provided, significantly shortening the path for electrons to reach the electrodes and reducing their lateral transport distance in the semiconductor material, thereby reducing energy loss and recombination probability. More conductive paths not only reduce resistance during current transport and lower lateral resistance, but also provide more collection points, enabling electrons to be transported to the main electrode more quickly and directly, improving current collection efficiency, thereby optimizing the battery's electrical performance parameters and significantly improving the overall conversion efficiency of the battery. Attached Figure Description

[0016] One or more embodiments are illustrated by way of example with corresponding pictures in the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Unless otherwise stated, the pictures in the accompanying drawings do not constitute a limitation on scale. In order to more clearly illustrate the technical solutions in the embodiments of this disclosure or the conventional technology, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1This is a partial structural schematic diagram of the back contact battery provided in an embodiment of this disclosure;

[0018] Figure 2 A top view of the structure of a photovoltaic module provided in an embodiment of this application;

[0019] Figure 3 This is a cross-sectional schematic diagram of the structure of a photovoltaic module provided in an embodiment of this application.

[0020] Explanation of icon numbers:

[0021] The battery includes a back contact battery 100, a substrate 110, a first semiconductor doped layer 120, a second semiconductor doped layer 130, a first electrode group 140, a first electrode 141, a second electrode 150, a first main grid 160, a second main grid 170, a battery string 201, a solder ribbon 202, a first solder ribbon 212, a second solder ribbon 222, a busbar 232, an encapsulating film 203, and a cover plate 204. Detailed Implementation

[0022] As the background technology shows, although the tunneling oxide layer SiOx and doped polycrystalline silicon can theoretically provide good passivation effects, in actual production, due to unsatisfactory process conditions or other factors, a large number of defect recombination centers are often formed inside the material, reducing the generation of effective current, resulting in an increase in the series resistance inside the battery. High series resistance increases the energy loss of current transmission, leading to a decrease in the fill factor and thus reducing battery efficiency.

[0023] In the back-contact battery provided in this embodiment, the number of first electrodes is increased, providing more conductive paths and significantly shortening the path for electrons to reach the electrodes. This reduces their lateral transport distance in the semiconductor material, thereby reducing energy loss and recombination probability. More conductive paths not only reduce resistance during current transport and lower lateral resistance, but also provide more collection points, enabling electrons to be transported to the main electrode more quickly and directly, improving current collection efficiency. This, in turn, optimizes the battery's electrical performance parameters and significantly improves the overall conversion efficiency of the battery.

[0024] In the description of the embodiments of this application, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary and secondary relationship of the indicated technical features. In the description of the embodiments of this application, "multiple" means two or more, unless otherwise explicitly defined. Similarly, "multiple sets" refers to two or more sets (including two sets), and "multiple pieces" refers to two or more pieces (including two pieces).

[0025] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0026] In the description of the embodiments in this application, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent three cases: A exists, A and B exist simultaneously, and B exists. In addition, the character " / " in this document generally indicates that the related objects before and after it have an "or" relationship.

[0027] In the description of the embodiments of this application, the technical terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential," etc., indicating orientation or positional relationships, are based on the orientation or positional relationships shown in the accompanying drawings. They are only for the convenience of describing the embodiments of this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of this application. For example, if the device or element in the illustration is inverted, then the element described as "below," "under," "below," or "bottom" of other elements or features will be oriented "above" or "top" of said other elements or features. Therefore, the term "below" may cover both above and below orientation depending on the context in which the term is used, which will be obvious to those skilled in the art. Materials may be oriented in other ways (e.g., rotated 90 degrees, inverted, flipped), and the spatial relative descriptive terms used herein may be interpreted accordingly.

[0028] In the description of the embodiments of this application, unless otherwise expressly specified and limited, technical terms such as "installation," "connection," "joining," and "fixing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. For those skilled in the art, the specific meaning of the above terms in the embodiments of this application can be understood according to the specific circumstances.

[0029] In the accompanying drawings corresponding to the embodiments of this application, the thickness and area of ​​the layers are enlarged for better understanding and ease of description. Furthermore, when describing a component as "generally" formed on another component, it means that the component is not formed on the entire surface (or front surface) of the other component, nor is it formed on a portion of the edge of the entire surface.

[0030] In the description of the embodiments of this application, when a component "includes" another component, other components are not excluded unless otherwise stated, and other components may be further included. The formation or provision of a second component above or on a first component, or on the surface of a first component, or on one side of a first component, may include embodiments where the first and second components are in direct contact, and may also include embodiments where an additional component may be present between the first and second components, thereby preventing direct contact between the first and second components. For simplicity and clarity, various components may be drawn at different scales. In the drawings, some layers / components may be omitted for simplicity. Unless otherwise specified, the formation or provision of a second component on the surface of a first component refers to direct contact between the first and second components. The term "component" may refer to a layer, film, region, portion, structure, etc.

[0031] The terminology used in the description of the various embodiments herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used in the description of the various embodiments and the appended claims, the term "component" is also intended to include the plural form unless the context clearly indicates otherwise. Components include layers, films, regions, or plates, etc.

[0032] The embodiments of this disclosure will now be described in detail with reference to the accompanying drawings. However, those skilled in the art will understand that many technical details have been provided in the embodiments of this disclosure to facilitate a better understanding of the disclosure. However, the technical solutions claimed in this disclosure can be implemented even without these technical details and various variations and modifications based on the following embodiments.

[0033] Figure 1 This is a partial structural diagram of a back contact battery provided in an embodiment of this disclosure.

[0034] refer to Figure 1 The back contact battery 100 includes a substrate 110, which includes a first surface and a second surface opposite to each other.

[0035] The first semiconductor doped layer 120 and the second semiconductor doped layer 130 are located on the second surface. The first doped element in the first semiconductor doped layer 120 and the second doped element in the second semiconductor doped layer 130 have different conductivity types.

[0036] The first electrode group 140 is electrically contacted with the corresponding first semiconductor doped layer 120. The first electrode group 140 includes a plurality of first electrodes 141 arranged at intervals, and each first electrode is electrically contacted with the first semiconductor doped layer 120.

[0037] The second electrode 150 is in electrical contact with the second semiconductor doped layer 130, wherein both the first electrode and the second electrode extend along the first direction.

[0038] In some embodiments, the material of the substrate 110 may be an elemental semiconductor material. Specifically, the elemental semiconductor material is composed of a single element, such as silicon or germanium. The elemental semiconductor material may be monocrystalline, polycrystalline, amorphous, or microcrystalline (a state simultaneously possessing both monocrystalline and amorphous states is called microcrystalline). For example, silicon may be at least one of monocrystalline silicon, polycrystalline silicon, amorphous silicon, or microcrystalline silicon, and the material of the substrate 110 may include at least one of monocrystalline silicon, polycrystalline silicon, amorphous silicon, or microcrystalline silicon.

[0039] In some embodiments, the substrate 110 may also be a compound semiconductor material. Common compound semiconductor materials include, but are not limited to, silicon germanide, silicon carbide, gallium arsenide, indium gallium arsenide, perovskite, cadmium telluride, copper indium selenide, etc. Materials may also be silicon carbide, organic materials, or multi-component compounds. Multi-component compounds may include, but are not limited to, perovskite, gallium arsenide, cadmium telluride, copper indium selenide, etc.

[0040] The substrate 110 can also be a sapphire substrate, a silicon substrate on an insulator, or a germanium substrate on an insulator.

[0041] Specifically, in a back-contact battery, the first side is usually the light-receiving side, used to receive incident light, while the second side, as the back-lighting side, is used to arrange electrodes and other functional layers.

[0042] In some embodiments, the light-receiving surface of the substrate 110 has a textured structure, which may include a regularly shaped pyramidal textured structure. The beveled surface of the textured structure can increase the internal reflection of incident light, thereby improving the absorption and utilization rate of incident light by the substrate 110, and thus improving the battery efficiency of the back contact battery.

[0043] In some embodiments, the light-illuminated surface of the substrate 110 may have a front surface field (FSF) layer. The conductivity type of the doped ions in the front surface field is the same as that of the doped ions in the substrate 110. The field passivation effect is used to reduce the minority carrier concentration on the surface, thereby reducing the surface recombination rate. At the same time, the series resistance can also be reduced, and the electron transport capability can be improved.

[0044] In some embodiments, a first semiconductor doped layer 120 and a second semiconductor doped layer 130 are alternately arranged on the back surface of the substrate 110. The first semiconductor doped layer 120 and the second semiconductor doped layer 130 correspond to different doping types, forming a highly efficient pn junction, which promotes the efficient separation and transport of electrons and holes. Laser groove C1 is located on the first semiconductor doped layer 120, and laser groove C2 is located on the second semiconductor doped layer 130. Laser grooves C1 and C2 are formed using laser technology on the back contact cell. Laser grooves C1 and C2 are mainly used as contact openings to expose the doped layers for subsequent electrode deposition, thereby achieving efficient current collection.

[0045] Optionally, in this embodiment of the present disclosure, the first semiconductor doped layer 120 can be a p-type doped layer for collecting and transporting holes. The second semiconductor doped layer 130 can be an n-type doped layer for collecting and transporting electrons. The first electrode group 140 consists of a plurality of spaced-apart first electrodes 141, each of which is in direct contact with the p-type doped layer, and the second electrode 150 is in direct contact with the n-type doped layer.

[0046] In the back-contact battery provided in this embodiment, the number of first electrodes is increased, providing more conductive paths and significantly shortening the path for electrons to reach the electrodes. This reduces their lateral transport distance in the semiconductor material, thereby reducing energy loss and recombination probability. More conductive paths not only reduce resistance during current transport and lower lateral resistance, but also provide more collection points, enabling electrons to be transported to the main electrode more quickly and directly, improving current collection efficiency. This, in turn, optimizes the battery's electrical performance parameters and significantly improves the overall conversion efficiency of the battery.

[0047] The embodiments of this disclosure will now be described in more detail with reference to the accompanying drawings.

[0048] See Figure 1 As shown, in one possible implementation, the width D of the first semiconductor doped layer 120 corresponding to the first electrode group 140 is 0.1-1 mm.

[0049] The first semiconductor doped layer 120 is used to collect holes and transport them to the corresponding first electrode group 140. The width of the first semiconductor doped layer 120 determines the lateral transport distance from the photogenerated carrier generation point to the first electrode group 140. A wider doped layer can cover a larger area but increases the lateral resistance; a narrower doped layer requires a denser electrode layout to ensure efficient collection. A width design of 0.1-1 mm provides sufficient current collection capability while maintaining the feasibility and economy of the manufacturing process.

[0050] It is understandable that the width of the doped layer is related to the number of doped layers. For the same battery area, the smaller the width D of the first semiconductor doped layer 120, the more first semiconductor doped layers 120 need to be formed; conversely, the smaller the width D of the first semiconductor doped layer 120, the more first semiconductor doped layers 120 need to be formed. This inverse relationship directly affects current collection efficiency and manufacturing cost. For example, for applications requiring high current density, choosing a narrower width (e.g., 0.1 mm) can significantly shorten the path of holes to the electrode, reducing lateral transport distance and resistance loss, thereby improving current collection efficiency. However, a narrower width means requiring more doped areas and a correspondingly larger number of electrodes. While this can improve overall efficiency, it may increase the complexity of the manufacturing process and lead to higher contact resistance, affecting effective current collection. Furthermore, more doped areas mean more surface area exposed, increasing the possibility of surface recombination and resulting in energy loss. For applications that prioritize simplified manufacturing processes and cost control, choosing a wider width (e.g., 1 mm) can reduce the number and density of electrodes, lowering manufacturing complexity and cost. However, the longer lateral transport distance increases resistance loss, potentially leading to decreased current collection efficiency. A middle value (around 0.5 mm) is often used as a compromise, providing sufficient current collection capability while maintaining manufacturing feasibility and economics. For example, on a 0.5 mm wide doped layer, electrodes can be strategically arranged to ensure rapid hole collection in each region, while avoiding overly complex electrode layouts.

[0051] In one possible implementation, the spacing H between adjacent first electrodes 141 in the first electrode group 140 satisfies H=D / (M-1); where M is the number of first electrodes 141 in the first electrode group 140.

[0052] It should be understood that D is the width of the first semiconductor doped layer 120. Since there are M-1 gaps between the M electrodes, the width of each gap can be obtained by dividing the total width D by the number of gaps. For example, assuming the width D of the first semiconductor doped layer 120 is 0.5mm, and there are 6 first electrodes in the first electrode group 140, i.e., M=6, then the spacing H calculated according to the formula is: H=0.5mm / (6-1)=0.1mm, that is, the distance between two adjacent first electrodes 141 should be 0.1mm.

[0053] For example, in some common applications, to balance manufacturing costs and battery performance, an appropriate number and spacing of electrodes can be selected. For instance, choosing 5-10 first electrodes can ensure sufficient current collection efficiency while avoiding the additional costs and manufacturing complexity caused by too many electrodes.

[0054] Based on the above technical means, by reasonably setting the spacing between the first electrodes, it can be ensured that holes in the entire doped layer can be efficiently collected, reducing lateral transport distance and resistance loss. Furthermore, the uniformly distributed first electrodes can guarantee a consistent current density throughout the entire doped layer region, avoiding performance degradation caused by local current imbalances.

[0055] See Figure 1 As shown, in one possible implementation, the spacing S between adjacent first semiconductor doped layers 120 is 0.5-3 mm, where S > D.

[0056] Specifically, multiple first semiconductor doped layers 120 are distributed on the substrate 110, and each first semiconductor doped layer 120 corresponds to a set of first electrode groups 140, together forming a high-efficiency carrier collection network. A shorter distance between adjacent first semiconductor doped layers 120 allows for denser coverage of the substrate, improving current collection efficiency, but may increase manufacturing complexity and cost. A larger spacing between adjacent first semiconductor doped layers 120 can, to some extent, reduce the number of doped layers, lowering manufacturing complexity and cost. A spacing design of 0.5-3 mm provides sufficient current collection capability while maintaining the feasibility and economy of the manufacturing process.

[0057] For example, in applications requiring high current density, choosing a shorter spacing (e.g., 0.5 mm) allows for denser substrate coverage, improving current collection efficiency. In high-power applications, a shorter spacing ensures that holes in each region are collected quickly, reducing lateral transport distance and resistance loss. For applications prioritizing simplified manufacturing processes and cost control, a larger spacing (e.g., 3 mm) reduces the number of doped layers, lowering manufacturing complexity and cost. A middle value (around 1.5 mm) is often used as a compromise, providing sufficient current collection capability while maintaining manufacturing feasibility and economics. For instance, with a substrate length of 182 mm, a 1.5 mm spacing allows for the uniform distribution of multiple doped layers on the substrate, ensuring rapid hole collection in each region while avoiding overly complex electrode layouts.

[0058] In some embodiments, in order to ensure electrical isolation between adjacent first semiconductor doped layers and second semiconductor doped layers and avoid short circuits or other electrical faults, the spacing between adjacent first semiconductor doped layers is greater than the width of a single second semiconductor doped layer; the spacing between adjacent second semiconductor doped layers is greater than the width of a single first semiconductor doped layer, so as to ensure that the doped layers do not interfere with each other, thereby improving the overall battery performance and reliability.

[0059] In one possible implementation, the number X of the first electrode group 140 satisfies X=L / S+1, where L is the length of the substrate 110 in the second direction.

[0060] Specifically, L represents the total length of the substrate 110 in the second direction. S represents the spacing between adjacent first semiconductor doped layers 120. When the substrate 110 is divided into segments, the number of segments is one more than the number of intervals. For example, on a substrate 110 of length L, if a first electrode group 140 is placed every S intervals, then the last segment will also have a first electrode group 140. Therefore, the number X of the first electrode groups 140 is the total length divided by the number of intervals, plus one. For example, assuming the length L of the substrate 110 in the second direction is 182 mm and the spacing S between adjacent first semiconductor doped layers is 1 mm, then the number X of the first electrode groups 140 calculated according to the formula is: X = 182 mm / 1 mm + 1 = 183, that is, 183 first electrode groups 140 need to be arranged along the length of the substrate 110. By reasonably setting the number and spacing of the first electrode groups, it can be ensured that holes on the entire substrate surface can be efficiently collected, reducing lateral transmission distance and resistance loss. Furthermore, the uniformly distributed first electrode group can ensure a consistent current density throughout the entire substrate area, avoiding performance degradation caused by local current imbalance.

[0061] In one possible implementation, the back contact battery 100 further includes: a plurality of first main grids 160 and a plurality of second main grids 170, wherein the first main grids 160 extend along a second direction and are in electrical contact with the first electrode 141 in the first electrode group 140, and have an insulating gap between them and the second electrode 150; the second main grids 170 extend along the second direction and are in electrical contact with the second electrode 150, and have an insulating gap between them and the first electrode 141.

[0062] Specifically, the first main gate 160 is responsible for collecting the current from all the first electrodes 141 in the first electrode group 140 and directing it to an external circuit. The first main gate 160 extends along the second direction of the substrate 110 (perpendicular to the extension direction of the electrodes) and is in direct electrical contact with each first electrode 141, ensuring efficient current collection and transmission. Insulating gaps are provided between the first main gate 160 and the second electrode 150, and between the first main gate 160 and the second semiconductor doped layer 130, providing physical isolation. The second main gate 170 is responsible for collecting the current from the second electrode 150 and directing it to an external circuit. The second main gate 170 also extends along the second direction of the substrate 110 and is in direct electrical contact with each second electrode 150, ensuring efficient current collection and transmission. Insulating gaps are provided between the second main gate 170 and the first electrode 141, and between the second main gate 170 and the first semiconductor doped layer 120, providing physical isolation. Physical isolation exists between the first main gate 160 and the second main gate 170 to avoid electrical short circuits. When designing the layout of the back side of the back-contact battery, the first main grid 160 and the second main grid 170 are positioned as far apart as possible and isolated by a reasonable gap. By setting the main grids, the current dispersed in various locations can be concentrated, reducing the length of the current transmission path, decreasing resistance loss, and improving current collection efficiency.

[0063] See Figure 1 As shown, in some embodiments, an insulator 180 is provided between the first electrode group 140 and the second electrode 150, between the first electrode group 140 and the second main gate 170, and between the second electrode 150 and the first main gate 160. The insulator 180 is U-shaped. By providing the insulator 180, not only can electrical isolation be achieved between the first electrode group 140 and the second electrode 150, preventing current leakage and short circuits between them, but also the independence between the first electrode group 140 and the second main gate 170, and between the second electrode 150 and the first main gate 160, can be ensured, avoiding the formation of unnecessary current paths and improving the reliability and safety of the system.

[0064] In some embodiments, the first main gate 160 is typically made of a highly conductive metallic material, such as silver (Ag). Silver has extremely low resistivity (approximately 1.59 × 10⁻⁶). -8 Ω Silver (m) can effectively reduce resistive losses during current transmission. Simultaneously, silver possesses good chemical stability and solderability, facilitating connection with the first electrode 141, and is not easily oxidized or corroded during long-term use, ensuring the reliability and stability of the battery. The second main grid 170 can also be made of silver as the primary material. Since electrons and holes require the same conductivity during transmission, silver's high conductivity meets the demands for efficient electron current transmission. Furthermore, silver's good solderability also contributes to a robust connection with the second electrode 150, ensuring stable current transmission.

[0065] The main grid is typically fabricated using screen printing. First, a screen printing template is created according to the design requirements, with the pattern on the template corresponding to the shape and position of the first main grid 160 and the second main grid 170. Then, silver paste is evenly coated onto the screen, and through the pressure of a squeegee, the silver paste is forced through the patterned portion of the screen and precisely printed onto the substrate 110 of the back contact battery. After printing, the battery is dried and sintered to solidify the silver paste and form good ohmic contact with the substrate and electrodes.

[0066] During the printing process, it is necessary to precisely control process parameters such as the viscosity of the silver paste, printing speed, and squeegee pressure. The viscosity of the silver paste affects the clarity and thickness uniformity of the print, and is generally controlled within 100-200 Pa. The printing speed should be between 50-800 mm / s. Too fast a speed may result in incomplete silver paste printing, while too slow a speed will affect production efficiency. The speed is typically controlled between 50-800 mm / s. The doctor blade pressure affects the thickness and adhesion of the silver paste and needs to be adjusted according to the actual situation, generally controlled between 40-70 N.

[0067] In one possible implementation, the number of first electrodes 141 in the first electrode group 140 is 2-20.

[0068] Specifically, the first electrode 141 is responsible for collecting holes from the corresponding first semiconductor doped layer 120 and transmitting them to an external circuit. To ensure that holes throughout the doped layer can be effectively collected, the first electrode 141 needs to be uniformly distributed on the doped layer.

[0069] Insufficient electrode count leads to lower current collection efficiency, especially in large-area batteries, where longer lateral transport distances increase resistance losses. For example, with only one electrode in a large-area battery, holes generated far from the electrode area need to travel a long lateral transport distance to reach it. During this process, the probability of hole-electron recombination increases significantly, reducing the number of holes that can be collected at the electrode, thus lowering current collection efficiency. Furthermore, the longer lateral transport distance increases the resistance of holes in the semiconductor material. This results in more energy being lost as heat, further degrading battery performance.

[0070] An excessive number of electrodes increases manufacturing complexity and cost. On one hand, a larger number of electrodes means the need for more conductive materials, such as silver paste, which directly increases material costs. On the other hand, increased manufacturing complexity leads to decreased production efficiency, higher equipment maintenance and debugging costs, and potentially lower product yields, all of which indirectly contribute to increased costs.

[0071] The number of first electrodes 141 in each first electrode group 140 is set between 2 and 20, which provides sufficient current collection capacity while maintaining the feasibility and economy of the manufacturing process. For example, screen printing equipment can accurately print electrode patterns within this range without requiring large-scale equipment modifications. Simultaneously, a good balance is maintained between material usage and production efficiency. Compared to cases with an excessive number of electrodes, the range of 2-20 effectively controls material costs and production time, ensuring product economics.

[0072] In one possible implementation, the substrate 110 is an N-type silicon wafer or a P-type silicon wafer.

[0073] Specifically, the substrate 110 can be an N-type semiconductor substrate or a P-type semiconductor substrate. The N-type semiconductor substrate is doped with an N-type dopant element, which can be any one of group V elements such as phosphorus (P), bismuth (Bi), antimony (Sb), or arsenic (As). The P-type semiconductor substrate is doped with a P-type dopant element, which can be any one of group III elements such as boron (B), aluminum (Al), gallium (Ga), or gallium (In).

[0074] It should be noted that the choice between an N-type silicon wafer and a P-type silicon wafer for the substrate 110 depends on the specific application requirements and design goals, and this disclosure does not limit this.

[0075] See Figure 1As shown, in one possible implementation, the first electrode group 140 and the second electrode 150 are arranged alternately along the second direction, and there is a gap between the first electrode group 140 and the second electrode 150.

[0076] Specifically, the first electrode group 140 and the second electrode 150 are alternately arranged along the second direction of the substrate (perpendicular to the extension direction of the electrode), which ensures that each electrode can effectively cover the corresponding doped layer region, thereby efficiently collecting charge carriers. There is a certain gap between the first electrode group 140 and the second electrode 150 to ensure electrical isolation, prevent short circuits or other electrical faults between different types of electrodes, and improve the safety and reliability of the battery.

[0077] In the back contact battery provided in this embodiment, the number of first electrodes is increased, which can significantly shorten the path for electrons to reach the electrodes and reduce their lateral transport distance in the semiconductor material, thereby reducing the lateral resistance. It also provides more collection points, enabling electrons to be transported to the main electrode more quickly and directly, improving the current collection efficiency, thereby optimizing the battery's electrical performance parameters and significantly improving the overall conversion efficiency of the battery.

[0078] Accordingly, another embodiment of this application also provides a photovoltaic module, including a plurality of back contact cells as described in the above embodiments.

[0079] The photovoltaic module provided in another embodiment of this application will be described in detail below with reference to the accompanying drawings. For the parts that are the same as or corresponding to the previous embodiment, please refer to the corresponding description of the foregoing embodiment. They will not be described in detail below.

[0080] Figure 2 A top view of the structure of a photovoltaic module provided in an embodiment of this application; Figure 3 This is a cross-sectional schematic diagram of the structure of a photovoltaic module provided in an embodiment of this application.

[0081] refer to Figure 2 and Figure 3 The photovoltaic module provided in this application includes: a plurality of back contact cells 100 as described in the above embodiments; a connecting component 202 for connecting adjacent back contact cells 100; an encapsulating film 203 covering the surface of the back contact cells 100; and a cover plate 204 located on the surface of the encapsulating film away from the back contact cells 100, the cover plate 204 including a first cover plate and a second cover plate.

[0082] refer to Figure 2 The connecting component 202 includes a plurality of first solder strips 212 and a plurality of second solder strips 222.

[0083] Adjacent back contact cells 100 can be connected via a first solder strip 212 and a second solder strip 222, for example, for Figure 2 For the back contact battery located in the middle, the main grid of the first polarity of this back contact battery is connected to the main grid of the second polarity of another back contact battery on the left by a first solder strip 212, and the main grid of the second polarity of this back contact battery is connected to the main grid of the first polarity of another back contact battery on the right by a second solder strip 222. The first polarity is either positive or negative, and the second polarity is either positive or negative. In this way, multiple back contact batteries are connected in series.

[0084] In other embodiments, multiple back-contact batteries may also be connected in parallel sequentially.

[0085] refer to Figure 3 The encapsulating film 203 is used to cover the surface of the back contact battery 100.

[0086] The encapsulating film 203 can be made of organic encapsulating films such as ethylene-vinyl acetate copolymer (EVA) film, polyvinyl octene coelastomer (POE) film, or polyvinyl butyral (PVB) film.

[0087] In some embodiments, the encapsulating film 203 includes a first encapsulating layer and a second encapsulating layer. The first encapsulating layer covers one of the front or back sides of the back contact battery 100, and the second encapsulating layer covers the other of the front or back sides of the back contact battery 100. Specifically, at least one of the first encapsulating layer or the second encapsulating layer can be an organic encapsulating film such as polyvinyl butyral (PVB) film, ethylene-vinyl acetate copolymer (EVA) film, polyvinyl octene coelastomer (POE) film, or polyethylene terephthalate (PET) film. Alternatively, at least one of the first encapsulating layer or the second encapsulating layer can also be an EP film, EPE film, or PVP film. Among them, EP film refers to a co-extruded film composed of stacked EVA film and POE film; EPE film refers to a co-extruded film formed by sequentially stacking EVA film, POE film, and EVA film; and PVP film refers to a co-extruded film formed by stacking POE film, EVA film, and POE film. Co-extruded films can be prepared by sequentially extruding one or more raw materials onto another pre-made film during the film processing, or by bonding different types of pre-made films together.

[0088] In some cases, the first encapsulation layer and the second encapsulation layer still have a boundary line before lamination. After lamination, the photovoltaic module no longer has the concept of a first encapsulation layer and a second encapsulation layer. That is, the first encapsulation layer and the second encapsulation layer have formed an integral encapsulation film 203.

[0089] refer to Figure 3 The cover plate 204 is used to cover the surface of the encapsulating film 203 away from the back contact battery 100.

[0090] The cover plate 204 can be a glass cover plate, a plastic cover plate, or other cover plate with light transmission function. In some embodiments, the surface of the cover plate 204 facing the encapsulating film 203 can be an uneven surface, thereby increasing the utilization rate of incident light.

[0091] In some embodiments, the first cover plate is opposite to the first encapsulation layer, and the second cover plate is opposite to the second encapsulation layer.

[0092] One of the first cover plate or the second cover plate is used to protect the front area of ​​the photovoltaic cell and provide good light transmission performance; the other of the first cover plate or the second cover plate is disposed on the back of the photovoltaic cell, forming a double-sided encapsulation structure.

[0093] In some embodiments, the first cover plate and the second cover plate may be made of the same material. For example, when both the first cover plate and the second cover plate are made of glass, the photovoltaic module is a double-glass module, which has higher mechanical strength, better weather resistance and longer service life, and is suitable for high humidity, high temperature or corrosive environments.

[0094] In some embodiments, the first cover plate and the second cover plate can be made of different materials. For example, one of the first cover plate or the second cover plate is made of glass, and the other is made of a polymer backsheet material, such as thermoplastic elastomer (TPE) or TPT. TPT usually refers to a backsheet material composed of three layers of Tedlar (polyvinyl fluoride, PVF), polyester (PET), and Tedlar (PVF). In this case, the photovoltaic module is a single-glass module, which has the advantages of light weight and low cost, and is suitable for conventional outdoor installation scenarios.

[0095] By flexibly configuring the material types of the first and second cover plates, the performance, cost, and application scenarios of the components can be optimized and matched to meet the diverse needs of different customers for power, lifespan, and operating environment.

[0096] In the photovoltaic module provided in this application embodiment, the number of first electrodes in the back contact cell is increased, which provides more conductive paths, significantly shortens the path for electrons to reach the electrodes, and reduces their lateral transport distance in the semiconductor material, thereby reducing energy loss and recombination probability. More conductive paths not only reduce resistance during current transmission and lower lateral resistance, but also provide more collection points, enabling electrons to be transported to the main electrode more quickly and directly, improving current collection efficiency. This, in turn, optimizes the electrical performance parameters of the cell, significantly improving the overall conversion efficiency of the cell and thus enhancing the efficiency of the photovoltaic module.

[0097] Those skilled in the art will understand that the above embodiments are specific examples of implementing this disclosure, and in practical applications, various changes in form and detail may be made without departing from the spirit and scope of this disclosure. Any person skilled in the art can make various alterations and modifications without departing from the spirit and scope of this disclosure; therefore, the scope of protection of this disclosure should be determined by the scope defined in the claims.

Claims

1. A back-contact battery, characterized in that, include: A substrate, the substrate comprising opposing first and second surfaces; The first semiconductor doped layer and the second semiconductor doped layer are located on the second surface, wherein the first doping element in the first semiconductor doped layer and the second doping element in the second semiconductor doped layer have different conductivity types. A first electrode group, the first electrode group being electrically contacted with a corresponding first semiconductor doped layer, the first electrode group comprising a plurality of first electrodes spaced apart, each of the first electrodes being electrically contacted with the first semiconductor doped layer; The second electrode is in electrical contact with the second semiconductor doped layer, wherein both the first electrode and the second electrode extend along a first direction.

2. The back contact battery according to claim 1, characterized in that, The width D of the first semiconductor doped layer corresponding to the first electrode group is 0.1-1 mm.

3. The back contact battery according to claim 2, characterized in that, The spacing H between adjacent first electrodes in the first electrode group satisfies H=D / (M-1); where M is the number of first electrodes in the first electrode group.

4. The back contact battery according to claim 2, characterized in that, The spacing S between adjacent first semiconductor doped layers is 0.5-3 mm, where S > D.

5. The back contact battery according to claim 4, characterized in that, The number X of the first electrode group satisfies X=L / S+1, where L is the length of the substrate in the second direction.

6. The back contact battery according to claim 5, characterized in that, The back contact battery also includes: A first main gate extends along the second direction and is in electrical contact with the first electrode in the first electrode group, and has an insulating gap between it and the second electrode. The second main gate extends along the second direction and is in electrical contact with the second electrode, and has an insulating gap with the first electrode.

7. The back contact battery according to any one of claims 1 to 5, characterized in that, The number of first electrodes in the first electrode group is 2-20.

8. The back contact battery according to any one of claims 1 to 5, characterized in that, The substrate is an N-type silicon wafer or a P-type silicon wafer.

9. The back contact battery according to claim 5, characterized in that, The first electrode group and the second electrode are arranged alternately along the second direction, and there is a gap between the first electrode group and the second electrode.

10. A photovoltaic module, characterized in that, include: Multiple back contact batteries as described in any one of claims 1 to 9; A connecting component for connecting adjacent back contact batteries; An encapsulating film that covers the surface of the back contact battery; A cover plate, the cover plate being located on the surface of the encapsulating film away from the back contact battery, the cover plate comprising a first cover plate and a second cover plate.