A driving system of a SiC MOSFET
By combining diodes, capacitors, and switching transistors, along with the electrical isolation provided by Zener diodes and transformers, the Miller effect of SiCMOSFETs in bridge topology circuits was suppressed, solving the problem of SiCMOSFETs mis-turning, maintaining switching speed, and reducing losses.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- SICON CHAT UNION ELECTRIC CO LTD
- Filing Date
- 2025-06-07
- Publication Date
- 2026-07-10
AI Technical Summary
In bridge topology circuits, SiCMOSFETs pose a risk of false turn-on due to the Miller effect caused by high switching speed. Existing technologies address this by increasing the gate drive resistance, but this leads to reduced switching speed and increased losses.
A combination of diodes D1 and D3, capacitor C2, and switching transistors Q1, Q2, and Q3 is used to suppress the Miller effect through a near-zero impedance path. Electrical isolation is achieved by combining Zener diode D2 and transformer T1. The turn-off detection circuit detects the gate current injected at the turn-off moment of the SiCMOSFET to reduce the current drop rate.
It effectively suppresses misdirection caused by the Miller effect, avoids increased switching losses and circuit complexity, and maintains switching speed and circuit simplicity.
Smart Images
Figure CN224481700U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of power electronics technology, and more particularly to a driving system for a SiC MOSFET. Background Technology
[0002] MOSFETs are widely used in new energy, electric vehicles, and industrial power supplies due to their high switching speed, high temperature resistance, and high voltage withstand characteristics. However, their high switching speed can lead to a significant Miller effect: in a bridge topology circuit, when the switch is turned off, the drain-source voltage (Vds) changes rapidly and is coupled to the gate through the gate-drain capacitance (Cgd), causing the gate voltage (Vgs) to rise. Since the Vth of MOSFETs is generally low, even a negative voltage can cause false turn-on, resulting in a risk of bridge arm shoot-through and short circuit.
[0003] In existing technologies, increasing the gate drive resistance is commonly used to suppress the Miller effect, but this reduces switching speed and increases losses. Utility Model Content
[0004] This application provides a SiCMOSFET driving system to offer a high-efficiency, low-loss Miller clamping solution.
[0005] This application provides a SiC MOSFET driving system, including diode D1, diode D3, capacitor C2, switch Q1, switch Q2, and switch Q3.
[0006] The anode of diode D1 is connected to the first output terminal of the drive circuit, the cathode of diode D1 is connected to the first terminal of switch Q1, the cathode of diode D1 is connected to the control terminal of switch Q1 through resistor R3, the second terminal of switch Q1 is connected to the anode of diode D3, and the cathode of diode D3 is connected to the second output terminal of the drive circuit.
[0007] The first end of capacitor C2 is connected to the anode of diode D3, the second end of capacitor C2 is connected to the control terminals of switch Q2 and switch Q3 respectively, the first end of switch Q2 is connected to the cathode of diode D1, the second end of switch Q2 is connected to the second end of switch Q3, and the first end of switch Q3 is used to connect to SiCMOSFET.
[0008] In one exemplary embodiment of this application, the SiCMOSFET driving system further includes:
[0009] Zener diode D2, the anode of Zener diode D2 is connected to the first terminal of capacitor C2, and the cathode of Zener diode D2 is connected to the second terminal of capacitor C2.
[0010] In one exemplary embodiment of this application, the first output terminal of the driving circuit and the anode of the diode D1, as well as the second output terminal of the driving circuit and the cathode of the diode D3, are both connected via a transformer T1.
[0011] The first end of the primary side of transformer T1 is connected to the first output terminal of the driving circuit, the second end of the primary side of transformer T1 is connected to the second output terminal of the driving circuit, the first end of the secondary side of transformer T1 is connected to the anode of diode D1, and the second end of the secondary side of transformer T1 is connected to the cathode of diode D3.
[0012] In one exemplary embodiment of this application, a resistor R1 and a capacitor C1 are connected in series between the first end of the primary side of the transformer T1 and the first output end of the drive circuit.
[0013] In one exemplary embodiment of this application, the SiCMOSFET driving system further includes a turn-off detection circuit, a switch Q9, a resistor R24, a switch Q10, a resistor R26, and a diode D1.
[0014] The turn-off detection circuit is used to detect the turn-off time of the SiCMOSFET. The control terminal of the switch Q9 is connected to the output terminal of the turn-off detection circuit. The first terminal of the switch Q9 is connected to the first power supply through the resistor R24. The second terminal of the switch Q9 is grounded. The control terminal of the switch Q10 is connected to the first terminal of the switch Q9. The first terminal of the switch Q10 is connected to the second power supply. The second terminal of the switch Q10 is connected to the anode of the diode D11. The cathode of the diode D11 is connected to the control terminal of the SiCMOSFET.
[0015] In one exemplary embodiment of this application, the shutdown detection circuit includes a voltage sensor, a differentiating circuit, a first comparator circuit, a gate voltage detection circuit, a second comparator circuit, a third comparator circuit, an XOR gate U7, and an AND gate U8.
[0016] The voltage sensor is used to detect the voltage between the drain and source of the SiC MOSFET. The output terminal of the voltage sensor is connected to the input terminal of the differentiating circuit. The output terminal of the differentiating circuit is connected to the first input terminal of the first comparator circuit. The second input terminal of the first comparator circuit is connected to a first reference voltage. The output terminal of the first comparator circuit is connected to the first input terminal of the AND gate U8.
[0017] The gate voltage detection circuit is used to detect the gate voltage of the SiC MOSFET. The output terminal of the gate voltage detection circuit is connected to the first input terminal of the second comparator circuit. The second input terminal of the second comparator circuit is connected to the second reference voltage. The output terminal of the second comparator circuit is connected to the first input terminal of the XOR gate U7.
[0018] The output terminal of the gate voltage detection circuit is also connected to the first input terminal of the third comparison circuit. The second input terminal of the third comparison circuit is connected to the third reference voltage. The output terminal of the third comparison circuit is connected to the second input terminal of the XOR gate U7. The output terminal of the XOR gate U7 is connected to the second input terminal of the AND gate U8. The output terminal of the AND gate U8 is the output terminal of the turn-off detection circuit.
[0019] In one exemplary embodiment of this application, the gate voltage detection circuit includes resistors R21 and R22.
[0020] The first end of the resistor R21 is used to connect to the gate of the SiCMOSFET, the second end of the resistor R21 is grounded through the resistor R22, and the first end of the resistor R21 is the output terminal of the gate voltage detection circuit.
[0021] The SiCMOSFET driving system provided in this application has the following working principle and beneficial effects:
[0022] In this embodiment, when the first output of the driving circuit is high, SiCMOSFET Q4 is high-level and conducting, capacitor C2 is charged (left negative, right positive). At this time, switches Q2 and Q3 are not conducting, and the normal turn-on of SiCMOSFET Q4 is not affected. When the first output of the driving circuit is low (negative voltage), switch Q1 is turned on, SiCMOSFET Q4 is quickly turned off, and the first end of switch Q2 is pulled to the left side of C2, i.e., the negative end. Due to the presence of the body diode of switch Q2, the second end of switch Q2 is clamped to the negative end. The control end of switch Q2 is the positive end of capacitor C2, switch Q2 is turned on, and switch Q3 is turned on at the same time. The gate of SiCMOSFET Q4 is pulled to the negative end and will not be turned on again due to crosstalk during the turn-off period.
[0023] Therefore, the arrangement of switching transistors Q1, Q2, Q3 and capacitor C2 in this embodiment enables the SiCMOSFET to be connected to the negative terminal (negative power supply) through a near-zero impedance path during the turn-off process. This can suppress misleading turn-on caused by the Miller effect, while avoiding increased switching losses or circuit complexity. Attached Figure Description
[0024] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0025] Figure 1 This is a circuit schematic diagram of a SiCMOSFET driving system provided in an embodiment of this application;
[0026] Figure 2 This is a circuit diagram of a shutdown detection circuit provided in an embodiment of this application. Detailed Implementation
[0027] To enable those skilled in the art to better understand this solution, the technical solutions in the embodiments of this solution will be clearly described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this solution, not all of them. Based on the embodiments of this solution, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this solution.
[0028] The term "comprising" and any other variations thereof in the specification, claims, and accompanying drawings of this invention mean "including but not limited to," and are intended to cover a non-exclusive inclusion, not limited to the examples listed herein. Furthermore, the terms "first" and "second," etc., are used to distinguish different objects, not to describe a specific order.
[0029] The implementation of this application will be described in detail below with reference to the specific accompanying drawings:
[0030] Figure 1 This is a circuit schematic diagram of a SiC MOSFET driving system provided for an embodiment of this application. (Refer to...) Figure 1 The SiC MOSFET driving system includes diode D1, diode D3, capacitor C2, switching transistors Q1, Q2, and Q3.
[0031] The anode of diode D1 is connected to the first output terminal of the drive circuit, the cathode of diode D1 is connected to the first terminal of switch Q1, the cathode of diode D1 is connected to the control terminal of switch Q1 through resistor R3, the second terminal of switch Q1 is connected to the anode of diode D3, and the cathode of diode D3 is connected to the second output terminal of the drive circuit.
[0032] The first terminal of capacitor C2 is connected to the anode of diode D3, the second terminal of capacitor C2 is connected to the control terminals of switching transistors Q2 and Q3 respectively, the first terminal of switching transistor Q2 is connected to the cathode of diode D1, the second terminal of switching transistor Q2 is connected to the second terminal of switching transistor Q3, and the first terminal of switching transistor Q3 is used to connect to SiCMOSFET.
[0033] In this embodiment, SiCMOSFET Q4 and SiCMOSFET Q5 form one arm of the bridge topology circuit. To avoid the bridge arm shoot-through caused by the Miller effect, Miller clamping circuits are provided on the gates of both SiCMOSFET Q4 and SiCMOSFET Q5.
[0034] The two Miller clamp circuits operate on the same principle. One circuit includes diodes D1 and D3, capacitor C2, and switches Q1, Q2, and Q3. When the first output of the drive circuit is high, SiCMOSFET Q4 is high-level and conducting, charging capacitor C2 (left side negative, right side positive). At this time, switches Q2 and Q3 are not conducting, and this does not affect the normal turn-on of SiCMOSFET Q4. When the first output of the drive circuit is low (negative voltage), switch Q1 conducts, SiCMOSFET Q4 is quickly turned off, and simultaneously, the first terminal of switch Q2 is pulled to the left of C2 (negative terminal). Due to the presence of the body diode of switch Q2, the second terminal of switch Q2 is clamped to the negative terminal. The control terminal of switch Q2 is the positive terminal of capacitor C2, and switch Q2 conducts. At the same time, switch Q3 conducts. The gate of SiCMOSFET Q4 is pulled to the negative terminal, preventing it from conducting again during the turn-off period due to crosstalk.
[0035] Therefore, the arrangement of switching transistors Q1, Q2, Q3 and capacitor C2 in this embodiment enables the SiCMOSFET to be connected to the negative terminal (negative power supply) through a near-zero impedance path during the turn-off process. This can suppress misleading turn-on caused by the Miller effect, while avoiding increased switching losses or circuit complexity.
[0036] Reference Figure 1 In one exemplary embodiment of this application, the SiCMOSFET driving system further includes:
[0037] Zener diode D2, the anode of Zener diode D2 is connected to the first terminal of capacitor C2, and the cathode of Zener diode D2 is connected to the second terminal of capacitor C2.
[0038] In this embodiment, a Zener diode D2 is connected in parallel across capacitor C2 to limit the voltage across capacitor C2 within a set voltage range, thus preventing the voltage across capacitor C2 from becoming too high.
[0039] Reference Figure 1In one exemplary embodiment of this application, the first output terminal of the driving circuit and the anode of diode D1, as well as the second output terminal of the driving circuit and the cathode of diode D3, are both connected via transformer T1.
[0040] The first end of the primary side of transformer T1 is connected to the first output terminal of the drive circuit, the second end of the primary side of transformer T1 is connected to the second output terminal of the drive circuit, the first end of the secondary side of transformer T1 is connected to the anode of diode D1, and the second end of the secondary side of transformer T1 is connected to the cathode of diode D3.
[0041] In this embodiment, a transformer T1 is provided between the first output terminal of the driving circuit and the anode of diode D1, and between the second output terminal of the driving circuit and the cathode of diode D3. This provides electrical isolation and prevents mutual interference between the driving circuit and the SiCMOSFET bridge arm.
[0042] In one exemplary embodiment of this application, a resistor R1 and a capacitor C1 are connected in series between the first end of the primary side of the transformer T1 and the first output end of the drive circuit.
[0043] In this example, a resistor R1 and a capacitor C1 are connected in series at the first end of the primary side of transformer T1 to limit the inrush current at the moment of power-on and avoid damage to the subsequent circuit by the surge current.
[0044] Reference Figure 2 In one exemplary embodiment of this application, the SiCMOSFET driving system further includes a turn-off detection circuit, a switch Q9, a resistor R24, a switch Q10, a resistor R26, and a diode D1.
[0045] The turn-off detection circuit is used to detect the turn-off time of the SiC MOSFET. The control terminal of the switch Q9 is connected to the output terminal of the turn-off detection circuit. The first terminal of the switch Q9 is connected to the first power supply through resistor R24, and the second terminal of the switch Q9 is grounded. The control terminal of the switch Q10 is connected to the first terminal of the switch Q9. The first terminal of the switch Q10 is connected to the second power supply, and the second terminal of the switch Q10 is connected to the anode of the diode D11. The cathode of the diode D11 is connected to the control terminal of the SiC MOSFET.
[0046] In this embodiment, considering that injecting gate current during the drain current decrease phase of the SiCMOSFET Q4 turn-off process can reduce the current decrease rate and thus effectively suppress voltage overshoot, a turn-off detection circuit is set up to detect the turn-off time of the SiCMOSFET Q4. When it is determined that the SiCMOSFET Q4 has entered the turn-off state, the turn-off detection circuit outputs a high-level signal to the control terminal of the switch Q9, the switch Q9 is turned on, the first terminal (collector) of the switch Q9 is grounded, the switch Q10 is turned on, and the second power supply VDD injects current into the gate of the SiCMOSFET Q4 through the switch Q10, thereby reducing the current decrease rate and effectively suppressing voltage overshoot.
[0047] Reference Figure 2 In one exemplary embodiment of this application, the shutdown detection circuit includes a voltage sensor, a differentiating circuit, a first comparator circuit, a gate voltage detection circuit, a second comparator circuit, a third comparator circuit, an XOR gate U7, and an AND gate U8.
[0048] The voltage sensor is used to detect the voltage between the drain and source of the SiC MOSFET. The output of the voltage sensor is connected to the input of a differentiating circuit, the output of which is connected to the first input of a first comparator circuit. The second input of the first comparator circuit is connected to a first reference voltage, and the output of the first comparator circuit is connected to the first input of an AND gate U8.
[0049] The gate voltage detection circuit is used to detect the gate voltage of the SiC MOSFET. The output of the gate voltage detection circuit is connected to the first input of the second comparator circuit. The second input of the second comparator circuit is connected to the second reference voltage. The output of the second comparator circuit is connected to the first input of the XOR gate U7.
[0050] The output of the gate voltage detection circuit is also connected to the first input of the third comparator circuit. The second input of the third comparator circuit is connected to the third reference voltage. The output of the third comparator circuit is connected to the second input of the XOR gate U7. The output of the XOR gate U7 is connected to the second input of the AND gate U8. The output of the AND gate U8 is the output of the turn-off detection circuit.
[0051] In this embodiment, the turn-off time of the SiC MOSFET Q4 can be determined by combining the drain-source voltage rise rate and the gate voltage. Specifically, comparator U1A constitutes the first comparator circuit, and capacitor C5 and resistor R20 form a differentiating circuit to perform a differentiating operation on the drain-source voltage Vds of the SiC MOSFET Q4. The output voltage of the differentiating circuit is... It is proportional to the rate of rise of the drain-source voltage Vds, specifically:
[0052] ;
[0053] When SiCMOSFET Q4 is turned off, the drain-source voltage Vds rises rapidly, and the output voltage of the differentiating circuit... If the voltage is greater than the first reference voltage REF1, the first comparator circuit outputs a high-level signal to the first input terminal of AND gate U8.
[0054] Meanwhile, comparator U1B constitutes the second comparator circuit, and comparator U1C constitutes the third comparator circuit. When SiCMOSFET Q4 is turned off, the gate voltage Vg of SiCMOSFET Q4 is between the second reference voltage REF2 and the third reference voltage REF3 (REF2>REF3). The second comparator circuit outputs a high-level signal, and the third comparator circuit outputs a low-level signal. The XOR gate U7 outputs a high-level signal to the second input terminal of the AND gate U8, and the AND gate U8 outputs a high-level signal, indicating that SiCMOSFET Q4 is in the off state at this time.
[0055] Reference Figure 2 In one exemplary embodiment of this application, the gate voltage detection circuit includes resistors R21 and R22.
[0056] The first end of resistor R21 is used to connect to the gate of the SiCMOSFET, and the second end of resistor R21 is grounded through resistor R22. The first end of resistor R21 is the output of the gate voltage detection circuit.
[0057] In this embodiment, resistors R21 and R22 form a series voltage divider circuit, which is placed between the gate of the SiCMOSFET Q4 and ground. The voltage divided by resistor R22 is the gate voltage of the SiCMOSFET Q4. The circuit structure is simple and easy to implement.
[0058] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.
Claims
1. A driving system for SiC MOSFETs, characterized in that, This includes diode D1, diode D3, capacitor C2, switching transistors Q1, Q2, and Q3. The anode of diode D1 is connected to the first output terminal of the drive circuit, the cathode of diode D1 is connected to the first terminal of switch Q1, the cathode of diode D1 is connected to the control terminal of switch Q1 through resistor R3, the second terminal of switch Q1 is connected to the anode of diode D3, and the cathode of diode D3 is connected to the second output terminal of the drive circuit. The first end of capacitor C2 is connected to the anode of diode D3, the second end of capacitor C2 is connected to the control terminals of switch Q2 and switch Q3 respectively, the first end of switch Q2 is connected to the cathode of diode D1, the second end of switch Q2 is connected to the second end of switch Q3, and the first end of switch Q3 is used to connect to SiCMOSFET.
2. The SiC MOSFET driving system as described in claim 1, characterized in that, Also includes: Zener diode D2, the anode of Zener diode D2 is connected to the first terminal of capacitor C2, and the cathode of Zener diode D2 is connected to the second terminal of capacitor C2.
3. The SiC MOSFET driving system as described in claim 1, characterized in that, The first output terminal of the driving circuit and the anode of diode D1, as well as the second output terminal of the driving circuit and the cathode of diode D3, are all connected via transformer T1. The first end of the primary side of transformer T1 is connected to the first output terminal of the driving circuit, the second end of the primary side of transformer T1 is connected to the second output terminal of the driving circuit, the first end of the secondary side of transformer T1 is connected to the anode of diode D1, and the second end of the secondary side of transformer T1 is connected to the cathode of diode D3.
4. The SiC MOSFET driving system as described in claim 3, characterized in that, A resistor R1 and a capacitor C1 are connected in series between the first end of the primary side of the transformer T1 and the first output end of the drive circuit.
5. The SiC MOSFET driving system as described in claim 1, characterized in that, It also includes a shutdown detection circuit, switching transistor Q9, resistor R24, switching transistor Q10, resistor R26, and diode D1. The turn-off detection circuit is used to detect the turn-off time of the SiCMOSFET. The control terminal of the switch Q9 is connected to the output terminal of the turn-off detection circuit. The first terminal of the switch Q9 is connected to the first power supply through the resistor R24. The second terminal of the switch Q9 is grounded. The control terminal of the switch Q10 is connected to the first terminal of the switch Q9. The first terminal of the switch Q10 is connected to the second power supply. The second terminal of the switch Q10 is connected to the anode of the diode D11. The cathode of the diode D11 is connected to the control terminal of the SiCMOSFET.
6. The SiC MOSFET driving system as described in claim 5, characterized in that, The shutdown detection circuit includes a voltage sensor, a differentiating circuit, a first comparator circuit, a gate voltage detection circuit, a second comparator circuit, a third comparator circuit, an XOR gate U7, and an AND gate U8. The voltage sensor is used to detect the voltage between the drain and source of the SiC MOSFET. The output terminal of the voltage sensor is connected to the input terminal of the differentiating circuit. The output terminal of the differentiating circuit is connected to the first input terminal of the first comparator circuit. The second input terminal of the first comparator circuit is connected to a first reference voltage. The output terminal of the first comparator circuit is connected to the first input terminal of the AND gate U8. The gate voltage detection circuit is used to detect the gate voltage of the SiC MOSFET. The output terminal of the gate voltage detection circuit is connected to the first input terminal of the second comparator circuit. The second input terminal of the second comparator circuit is connected to the second reference voltage. The output terminal of the second comparator circuit is connected to the first input terminal of the XOR gate U7. The output terminal of the gate voltage detection circuit is also connected to the first input terminal of the third comparison circuit. The second input terminal of the third comparison circuit is connected to the third reference voltage. The output terminal of the third comparison circuit is connected to the second input terminal of the XOR gate U7. The output terminal of the XOR gate U7 is connected to the second input terminal of the AND gate U8. The output terminal of the AND gate U8 is the output terminal of the turn-off detection circuit.
7. The SiC MOSFET driving system as described in claim 6, characterized in that, The gate voltage detection circuit includes resistors R21 and R22. The first end of the resistor R21 is used to connect to the gate of the SiCMOSFET, the second end of the resistor R21 is grounded through the resistor R22, and the first end of the resistor R21 is the output terminal of the gate voltage detection circuit.