Analog thermistor temperature circuit

Abstract

The utility model relates to battery detection equipment test technical field especially, relates to a kind of simulation thermistor temperature circuit, including N groups of series connection resistance group, wherein N≥1;Each resistance group includes four resistance elements and four parallel switches;Each resistance group has different resistance value order of magnitude.The utility model discloses the purpose of invention is to provide a kind of simulation thermistor temperature circuit, the technical scheme provided by the utility model solves the problem that current battery detection equipment development process is difficult to build extreme temperature and causes the problem of incomplete detection of various functional parameters.

Description

Technical Field

[0001] This utility model relates to the field of battery testing equipment technology, and in particular to a simulated thermistor temperature circuit. Background Technology

[0002] In battery testing equipment, it is necessary to verify whether the various functional parameters of the equipment are normal under different temperatures. Currently, battery testing equipment commonly uses thermistors for temperature detection. A thermistor is a temperature coefficient thermistor, whose resistance changes with temperature. The battery testing equipment uses a data acquisition circuit to collect the resistance value of the NTC thermistor, and obtains the temperature value of the battery testing equipment through the correspondence between the thermistor's resistance and temperature.

[0003] The functional parameters of battery testing equipment include extreme temperature parameters, such as whether the equipment functions properly and performs corresponding actions when the temperature is at extreme high or low temperatures. However, in the actual research and development of battery testing equipment, the cost and difficulty of constructing extreme temperature environments are high, thus failing to meet the research and development environment requirements for battery testing equipment. Utility Model Content

[0004] The purpose of this invention is to provide a simulated thermistor temperature circuit. The technical solution provided by this invention solves the problem that it is difficult to construct extreme temperatures in the current battery testing equipment development process, resulting in incomplete detection of various functional parameters.

[0005] To solve the above-mentioned technical problems, this utility model provides a simulated thermistor temperature circuit, including N groups of resistors connected in series, where N≥1; each group of resistors includes four resistive elements and four parallel switches; each group of resistors has a different resistance value order of magnitude; The resistance values ​​of each group of resistors are a, b, c, and d, respectively, and they satisfy the following conditions: a≤b≤c≤d; S² = a + b < 4; if S² = 2, then c < 4; S3 = a + b + c ∈ [4, 7]; 9-S3≤d≤S3+1.

[0006] Preferably, each group of resistors has a different resistance value on the order of magnitude, including: Ω*10 k k is a natural number.

[0007] Preferably, the four parallel switches each control the short-circuit state of a resistor element; when the parallel switch is closed, the corresponding resistor element is short-circuited; when the parallel switch is open, the corresponding resistor element is connected to the circuit.

[0008] Preferably, the parallel switch is a semiconductor switching device.

[0009] Preferably, it further includes a resistance input circuit, a central controller, and a switch driving circuit; the resistance input circuit and the switch driving circuit are respectively connected to the central controller; the switch driving circuit is connected to the parallel switch.

[0010] Preferably, the response time of the semiconductor switching device is less than 100 ns.

[0011] Preferably, the resistance values ​​of the resistive elements within the resistor group, a, b, c, and d, are any one of the following combinations: {1, 1, 2, 5}, {1, 1, 3, 4}, {1, 1, 3, 5}, {1, 1, 3, 6} {1, 2, 2, 4}, {1, 2, 2, 5}, {1, 2, 2, 6} {1, 2, 3, 3}, {1, 2, 3, 4}, {1, 2, 3, 5}, {1, 2, 3, 6}, {1, 2, 3, 7} {1, 2, 4, 4}, {1, 2, 4, 5}, {1, 2, 4, 6}, {1, 2, 4, 7}, {1, 2, 4, 8}.

[0012] Compared with existing technologies, the analog thermistor temperature circuit provided by this utility model adopts a multi-group series structure, with each group containing four resistive elements with a specific order of magnitude relationship. Each resistive element is equipped with a parallel switch. Through a unique resistance value constraint design, it ensures that each group can accurately generate any integer value from 0 to 9. In conjunction with the central controller and switch control circuit, it can achieve accurate synthesis of any target resistance value and accurate matching of any target value. Multiple groups of resistors can be added according to the application scenario, and the range can cover continuously adjustable levels from Ω to MΩ. This solves the technical problems of insufficient accuracy and limited range of existing adjustable resistors and is suitable for high-precision electronic measurement systems. Attached Figure Description

[0013] Figure 1 This is a schematic diagram of the connection of the resistor portion of the simulated thermistor temperature circuit in an embodiment of this application; Figure 2 This is a schematic diagram of the connection of a simulated thermistor temperature circuit in an embodiment of this application. Detailed Implementation

[0014] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0015] The functional parameters of battery testing equipment include extreme temperature parameters, such as whether the equipment functions properly and performs corresponding actions when the temperature is at extreme high or low temperatures. However, in the actual research and development of battery testing equipment, the cost and difficulty of constructing extreme temperature environments are high, thus failing to meet the research and development environment requirements for battery testing equipment.

[0016] Please see Figures 1 to 2 To address the aforementioned technical problems, this embodiment provides a simulated thermistor temperature circuit, which can simulate the resistance value output by the thermistor at any temperature. It is suitable for electronic measurement systems, automated testing equipment, sensor simulation circuits, and other fields that require high precision and wide-range adjustable resistance, especially for simulating high and low temperature environments in battery testing equipment and BMS testing systems.

[0017] For example, to find the thermistor installed in a device, one can consult its datasheet or specifications based on its temperature coefficient. This datasheet or specifications will contain the temperature coefficient of that thermistor under extreme temperatures. If it's necessary to simulate an ambient temperature of -25°C, the corresponding resistance value can be input. The circuit provided in this embodiment uses a real resistor or a combination of resistors to output an equivalent resistance value to the device, allowing the device to detect high or low temperatures and trigger an alarm, thus verifying the device's operation in extreme environments. This embodiment provides a resistance matrix with a resolution of 1 ohm and a wide output range, capable of simulating the resistance values ​​of commonly used thermistors at different temperatures, thereby simulating all temperatures.

[0018] Specifically, it includes N groups of resistors connected in series, where N ≥ 1. In this embodiment, N = 6 is used as an example, i.e., 6 groups of resistors are used for detailed explanation. Each group of resistors has a different resistance value on the order of magnitude, including: Ω * 10 k k is a natural number.

[0019] Specifically, the resistance value of the first group of resistors is on the order of 10. 0 The first group of resistors can output a single-digit resistance value, i.e., 1Ω; the second group of resistors has resistance values ​​on the order of 10Ω. 1 It can output a resistance value in the tens digit, i.e., 10Ω; and so on, the resistance value of the sixth resistance group is on the order of 10. 5It can output resistance values ​​in the hundreds of thousands, i.e., 0.1MΩ. If each resistor group outputs 9, the resistance value output by six resistor groups would be 999999Ω ≈ 1MΩ. Therefore, this embodiment provides a resistor matrix with a resolution of 1 ohm and an output range of 1Ω to 1MΩ. The output resistance range of the circuit can also be increased by adding resistor groups. If seven resistor groups are used, the output range is 1Ω to 10MΩ; if eight resistor groups are used, the output range is 1Ω to 100MΩ, and so on.

[0020] Each resistor group contains four resistive elements and four parallel switches SW, for a total of 24 resistors and 24 parallel switches SW across the six resistor groups. If a parallel switch SW is open, the system is equivalent to a value of 1; in this case, the resistive element is connected to the circuit, and its resistance value is included in the output resistance. If a parallel switch SW is closed, the coefficient is equivalent to 0; in this case, the resistive element is short-circuited, and its resistance value is not included in the output resistance. Therefore, the circuit provided in this embodiment has the following formula for calculating the output resistance value: R out =SW1*R1+SW2*R2……+SW24*R24. By controlling the opening or closing of the parallel switch SW, the effect of outputting any resistance value can be achieved.

[0021] The parallel switch SW can be a semiconductor switching device. The response time of the semiconductor switching device is less than 100ns. The semiconductor switching device can be controlled by inputting a PWM pulse signal.

[0022] Each resistor group consists of four resistors with resistance values ​​a, b, c, and d. To achieve an output resistance value of any value, the four resistors must be combined in any way to reach any number from 1 to 9. In the circuit provided in this embodiment, a, b, c, and d must simultaneously satisfy the following conditions: 1. a≤b≤c≤d; 2. S² = a + b < 4; if S² = 2, then c < 4; 3. S3 = a + b + c ∈ [4, 7] 4. 9-S3≤d≤S3+1.

[0023] Based on the above conditions, the following 17 combinations can be obtained: 1 {1,1,2,5} 10 {1,2,3,5} 2 {1,1,3,4} 11 {1,2,3,6} 3 {1,1,3,5} 12 {1,2,3,7} 4 {1,1,3,6} 13 {1,2,4,4} 5 {1,2,2,4} 14 {1,2,4,5} 6 {1,2,2,5} 15 {1,2,4,6} 7 {1,2,2,6} 16 {1,2,4,7} 8 {1,2,3,3} 17 {1,2,4,8} 9 {1,2,3,4} The resistance values ​​of the resistors in each resistor group are a, b, c, and d, which can be any combination of the above. That is, the resistance values ​​of the six resistor groups can be any of the options from number 1 to 17. To facilitate the procurement and assembly of resistors in the circuit, resistors with the same serial number are preferred. For example, the first group uses serial number 3, {1,1,3,5}, and the second to sixth groups also use serial number 3, {1,1,3,5}. Thus, the resistance values ​​of the 24 resistors are (1,1,3,5,10,10,30,50,100,100,300,500,1000,1000,3000,500,1000,1000,3000,5000......100000,100000,300000,500000).

[0024] The resistance values ​​of the above 17 schemes are conventional and easy for enterprises to implement. Using a combination of 24 relays and resistors, it is possible to achieve an output with a resolution of 1Ω and an output range of 1Ω-1MΩ for any resistance value. Among them, the two resistors in items 1-8 and item 13 have the same resistance value, which is easy for enterprises to prepare. Therefore, the combination of items 1-8 and item 13 should be given priority.

[0025] To control the parallel switch, the simulated thermistor temperature circuit provided in this embodiment further includes a resistance input circuit 10, a central controller 20, and a switch drive circuit 30. The resistance input circuit 10 and the switch drive circuit 30 are respectively connected to the central controller 10, and the switch drive circuit 30 is connected to the parallel switch SW. The resistance input circuit 10 is used to input the resistance value to be simulated. The central controller 20 outputs a corresponding control signal based on the input resistance, and the switch drive circuit 30 outputs a corresponding PWM pulse signal based on the control signal to control the semiconductor switching device. The control process includes: receiving the target resistance value instruction, decomposing the target value by order of magnitude, calculating the optimal switch combination for each group, and outputting a control signal to drive the switch.

[0026] This embodiment uses item 3 as an example for detailed explanation. The resistance values ​​for item 3 are 1, 1, 3, and 5. According to the resistance calculation formula R... out =SW1*R1+SW2*R2……+SW24*R24, therefore, the output resistance R out =SW1*1+SW2*1+SW3*3+SW4*5+……+SW21*100000+SW22*100000+SW23*300000+SW24*500000.

[0027] The relationships between resistor group number, order of magnitude, resistance value, and parallel switch identification are as follows: 1 10^0 a=1, b=1, c=3, d=5 SW1~SW4 2 10^1 a=10, b=10, c=30, d=50 SW5~SW8 3 10^2 a=100, b=100, c=300, d=500 SW9~SW12 4 10^3 a=1000, b=1000, c=3000, d=5000 SW13~SW16 5 10^4 a=10000, b=10000, c=30000, d=50000 SW17~SW20 6 10^5 a=100000, b=100000, c=300000, d=500000 SW21~SW24 By connecting SW1*1+SW2*1+SW3*3+SW4*5 in series, any value from 0 to 9 in the units digit can be formed; By connecting SW5*10+SW6*10+SW7*30+SW8*50 in series, any value from 0 to 9 in the tens place can be formed; By connecting SW9*100+SW10*100+SW11*300+SW12*500 in series, any value from 0 to 9 can be formed for the hundreds digit; By concatenating SW13*1000+SW14*1000+SW15*3000+SW16*5000, any value from 0 to 9 can be formed in the thousands place; And so on.

[0028] The specific control signals are as follows: When the control signal of the parallel switch SW is 0, the switch SW is closed; when the control signal of the parallel switch SW is 1, the switch SW is open.

[0029] The units digit of the output resistance is achieved through the combination of four resistors R1-R4. The correspondence between the output resistance, working resistor number, and parallel switch SW control signal is shown in the table below: 1 R1 or R2 0001 or 0010 2 R1+R2 0011 3 R3 0100 4 R1+R3 or R2+R3 0101 or 0110 5 R1+R2+R3 or R4 0111 or 1000 6 R1+R4 or R2+R4 1001 or 1010 7 R1+R2+R4 1011 8 R3+R4 1100 9 R1+R3+R4 or R2+R3+R4 1101 or 1110 0 none 0000 It should be noted that the resistor values ​​in number 3 are 1, 1, 3, and 5. If all four resistors are connected to the circuit, the total output resistance will be 10, which overlaps with the output resistance of the second resistor group. To reduce the control difficulty of the parallel switch SW, this embodiment only retains the output resistances of 0-9, that is, the control signal of the parallel switch SW avoids the case of 1111. Similarly, in the other resistor groups, only the output resistances of 0-9 are retained.

[0030] In summary, to output a resistance value of 1Ω, the control signal input to the parallel switches SW24~SW1 is (0000 0000 0000 0000 0000 0001). To output a resistance value of 999999Ω, the control signal input to the parallel switches SW24~SW1 is (1110 1110 1110 1110 1110 1110). Parallel switches SW1 / SW5 / SW9 / SW13 / SW17 / SW21 are closed, and the remaining parallel switches SW are open. At this time, the output resistance is 999999Ω. Similarly, and so on, according to the output resistance value, the corresponding control signal input to the parallel switches SW is given.

[0031] The analog thermistor temperature circuit provided by this utility model adopts a multi-group series structure. Each group contains four resistive elements with a specific order of magnitude relationship. Each resistive element is equipped with a parallel switch. Through a unique resistance value constraint design, it is ensured that each group can accurately generate any integer value from 0 to 9. With the help of a central controller and switch control circuit, it can achieve accurate synthesis of any target resistance value and accurate matching of any target value. Multiple groups of resistors can be added according to the application scenario, and the range can cover continuously adjustable from Ω to MΩ. It solves the technical problems of insufficient accuracy and limited range of existing adjustable resistors and is suitable for high-precision electronic measurement systems.

[0032] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A simulated thermistor temperature circuit, characterized in that: It includes N groups of resistors connected in series, where N≥1; each group of resistors contains four resistive elements and four parallel switches; each group of resistors has a different order of magnitude of resistance value; The resistance values ​​of each group of resistors are a, b, c, and d, respectively, and they satisfy the following conditions: a≤b≤c≤d; S² = a + b < 4; if S² = 2, then c < 4; S3 = a + b + c ∈ [4, 7]; 9-S3≤d≤S3+1.

2. The analog thermistor temperature circuit according to claim 1, characterized in that: Each resistor group has a different resistance value on the order of magnitude, including: Ω*10 k k is a natural number.

3. The analog thermistor temperature circuit according to claim 2, characterized in that: The four parallel switches each control the short-circuit state of a resistor element; when the parallel switch is closed, the corresponding resistor element is short-circuited; when the parallel switch is open, the corresponding resistor element is connected to the circuit.

4. The analog thermistor temperature circuit according to claim 2, characterized in that: The parallel switch is a semiconductor switching device.

5. The analog thermistor temperature circuit according to claim 2, characterized in that: It also includes a resistance input circuit, a central controller, and a switch drive circuit; the resistance input circuit and the switch drive circuit are respectively connected to the central controller; the switch drive circuit is connected to the parallel switch.

6. The analog thermistor temperature circuit according to claim 4, characterized in that: The response time of the semiconductor switching device is less than 100 ns.

7. The analog thermistor temperature circuit according to any one of claims 1-6, characterized in that: The resistance values ​​of the resistive elements in the resistor group, a, b, c, and d, can be any of the following combinations: {1，1，2，5}、{1，1，3，4}、{1，1，3，5}、{1，1，3，6}、 {1，2，2，4}、{1，2，2，5}、{1，2，2，6}、 {1，2，3，3}、{1，2，3，4}、{1，2，3，5}、{1，2，3，6}、{1，2，3，7}、 {1，2，4，4}、{1，2，4，5}、{1，2，4，6}、{1，2，4，7}、{1，2，4，8}。

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