An isolated anti-interference PWM input circuit

Abstract

The utility model relates to the technical field of isolation circuit, concretely is a kind of isolation anti-interference PWM input circuit, including the input end connection PWM signal source of diode D1;Resistance R1 and resistance R2 are connected with 5V power voltage after series connection one end, the other end ground setting, the gate G pole of MOS tube Q1 is connected between resistance R1 and resistance R2 by resistance R3, the drain D pole of MOS tube Q1 is electrically connected with 5V power voltage, and PWM signal source is exported by resistance R5.The utility model is applied by the combination of diode D1 and MOS tube Q1, effectively isolated and anti-interference processing of PWM signal are realized, ensure that cooling fan can stably work under various input conditions, improve the reliability and stability of product.

Description

Technical Field

[0001] This utility model relates to a PWM input circuit, and more particularly to an isolated and anti-interference PWM input circuit, belonging to the field of isolation circuit technology. Background Technology

[0002] In cooling fan applications, PWM pulse width modulation signals are often used to control fan speed. However, due to the complexity of the input environment, the PWM input signal may contain a lot of noise, or the PWM voltage value may be too high. These can interfere with subsequent circuits or even damage the fan control circuit, affecting the normal operation of the fan.

[0003] Therefore, it is urgent to improve the PWM input circuit to solve the above-mentioned problems. Utility Model Content

[0004] The purpose of this invention is to provide an isolated and anti-interference PWM input circuit. By combining diode D1 and MOSFET Q1, the PWM signal is effectively isolated and anti-interference is achieved, ensuring that the cooling fan can work stably under various input conditions, thus improving the reliability and stability of the product.

[0005] To achieve the above objectives, the main technical solutions adopted by this utility model include:

[0006] An isolated anti-interference PWM input circuit includes:

[0007] Diode D1, the input terminal of which is connected to a PWM signal source;

[0008] Resistors R1 and R2 are connected in series, with one end connected to a 5V power supply and the other end grounded. Resistors R1 and R2 are electrically connected to the anode pin A of diode D1.

[0009] The MOSFET Q1 has its gate (G) connected between resistors R1 and R2 via resistor R3. The drain (D) of the MOSFET Q1 is electrically connected to the 5V power supply voltage and outputs a PWM signal source via resistor R5. The source (S) of the MOSFET Q1 is grounded.

[0010] Preferably, the gate (G) of the MOS transistor Q1 is electrically connected to the anode pin (A) of the diode D1 through the resistor R3.

[0011] Preferably, the diode D1 is in the off state when the PWM signal is high, preventing the PWM signal from entering the circuit.

[0012] When the PWM signal is low, the voltage at the anode pin A of the diode D1 flows to the cathode pin K, generating a PWM signal with the same frequency as the input PWM signal for subsequent circuit processing.

[0013] Preferably, a resistor R4 is electrically connected between the drain (D) of the MOS transistor Q1 and the 5V power supply voltage.

[0014] Preferably, the resistor R5 is disposed between the resistor R4 and the drain (D) of the MOS transistor Q1.

[0015] Preferably, the voltage division ratio of resistors R1 and R2 is set such that the anode pin A of diode D1 receives voltage when the circuit is working, ensuring that diode D1 conducts normally when the PWM signal is low.

[0016] Preferably, the MOS transistor Q1 controls the switching of the drain voltage according to the high and low changes of the PWM signal received at the gate.

[0017] This utility model has at least the following beneficial effects:

[0018] 1. Signal Input and Isolation: The PWM signal first passes through a reverse cutoff diode D1 to ensure that external signals cannot enter the circuit when the circuit is not working or the PWM signal is abnormal, thus playing a preliminary isolation role.

[0019] 2. Voltage Divider and Signal Generation: After the circuit is working, the 5V voltage is divided by resistors R1 and R2 to provide a stable voltage to terminal A of diode D1. When the PWM signal is high, diode D1 is not conducting; when the PWM signal is low, the voltage at terminal A of diode D1 flows to terminal K, generating a PWM signal of the same frequency. Resistors R1 and R2 also provide the VGS operating voltage threshold for MOSFET Q1. Resistor R3 acts as the gate current limiter for MOSFET Q1 and controls the rising and falling edges of MOSFET Q1's turn-on and turn-off, ensuring that the output PWM signal is not distorted.

[0020] 3. Signal Amplification and Driving: The generated PWM signal is transmitted to the control gate (G) of MOSFET Q1 via resistor R3. MOSFET Q1 controls the drain (D) voltage to ground via the source (S) according to the high and low changes of the PWM signal, thereby generating a PWM signal with high and low voltage changes at the drain position, realizing stable driving of the subsequent circuit, while isolating excessively high voltage or noise input, and protecting the subsequent circuit. Attached Figure Description

[0021] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0022] Figure 1 This is the circuit diagram of this utility model. Detailed Implementation

[0023] The following will describe in detail the implementation of this application with reference to the accompanying drawings and embodiments, so that the implementation process of how this application uses technical means to solve technical problems and achieve technical effects can be fully understood and implemented accordingly.

[0024] like Figure 1 As shown, the isolated anti-interference PWM input circuit provided in this embodiment includes:

[0025] Diode D1 has its input terminal connected to the PWM signal source. Diode D1 is in the cutoff state when the PWM signal is high, preventing the PWM signal from entering the circuit.

[0026] When the PWM signal is low, the voltage at the anode pin A of diode D1 flows to the cathode pin K, generating a PWM signal with the same frequency as the input PWM signal for subsequent circuit processing. The voltage division ratio of resistors R1 and R2 is set so that the anode pin A of diode D1 receives voltage when the circuit is working, ensuring that diode D1 conducts normally when the PWM signal is low, and is used to reverse cut off when the PWM signal is high, preventing external signals from entering the circuit.

[0027] Resistors R1 and R2 are connected in series, with one end connected to a 5V power supply and the other end grounded. Resistors R1 and R2 are electrically connected to the anode pin (A) of diode D1. The gate (G) of MOSFET Q1 is electrically connected to the anode pin (A) of diode D1 via resistor R3. Resistors R1 and R2, connected in series between the 5V power supply and ground, serve as a voltage divider and provide a stable voltage to the anode pin (A) of diode D1. Resistors R1 and R2 also act as the VGS operating voltage threshold for MOSFET Q1. Resistor R3 limits the gate current of MOSFET Q1 and controls the rising and falling edges of MOSFET Q1's turn-on and turn-off, ensuring a distortion-free PWM output signal.

[0028] MOSFET Q1 has its gate (G) connected between resistors R1 and R2 via resistor R3. MOSFET Q1 controls the switching of its drain voltage based on the high / low changes of the PWM signal received at its gate. The drain (D) of MOSFET Q1 is electrically connected to the 5V power supply and outputs the PWM signal source through resistor R5. The source (S) of MOSFET Q1 is grounded. When the gate (G) of MOSFET Q1 receives a high / low change of the PWM signal, it controls the drain (D) voltage to be grounded through the source, thereby generating a high / low voltage PWM signal at the drain (D) position. This achieves stable driving of the subsequent circuits and isolates excessively high voltage or noise input.

[0029] Therefore, this circuit has the following advantages:

[0030] Signal input and isolation: The PWM signal first passes through a reverse cutoff diode D1 to ensure that external signals cannot enter the circuit when the circuit is not working or the PWM signal is abnormal, thus playing a preliminary isolation role.

[0031] Voltage division and signal generation: After the circuit is working, the 5V voltage is divided by resistors R1 and R2 to provide a stable voltage to terminal A of diode D1. When the PWM signal is high, diode D1 is not conducting.

[0032] When the PWM signal is low, the voltage at terminal A of diode D1 flows to terminal K, generating a PWM signal of the same frequency.

[0033] Signal amplification and driving: The generated PWM signal is transmitted to the control gate (G) of MOSFET Q1 through resistor R3. MOSFET Q1 controls the drain (D) voltage to be grounded through the source (S) according to the high and low changes of the PWM signal, thereby generating a PWM signal with high and low voltage changes at the drain position, realizing stable driving of the subsequent circuit, while isolating excessively high voltage or noise input, and protecting the subsequent circuit.

[0034] Therefore, this invention achieves effective isolation and anti-interference processing of PWM signals through the combined application of diode D1 and MOSFET Q1, ensuring that the cooling fan can work stably under various input conditions, thus improving the reliability and stability of the product.

[0035] Furthermore, such as Figure 1As shown, a resistor R4 is electrically connected between the drain (D) of MOSFET Q1 and the 5V power supply. Resistor R4 acts as a current limiter, preventing damage to the MOSFET or power supply due to excessive current when MOSFET Q1 is turned on. By limiting the current flowing through MOSFET Q1, resistor R4 helps protect the MOSFET and the entire circuit for safe operation. In addition, resistor R4, connected to the drain (D) of MOSFET Q1 and the 5V power supply, can stabilize the voltage at this node to a certain extent. This helps reduce the impact of voltage fluctuations on subsequent circuits, improving the stability and reliability of the circuit.

[0036] Furthermore, such as Figure 1 As shown, resistor R5 is placed between resistor R4 and the drain of MOSFET Q1. Resistor R5 serves to match the impedance of the subsequent stage and also limits the current. Resistor R5 is used to optimize the transmission of the PWM signal from the drain of MOSFET Q1 to the subsequent circuit. By adjusting the resistance value of R5, the signal transmission quality can be optimized.

[0037] like Figure 1 As shown, the principle of the isolated anti-interference PWM input circuit provided in this embodiment is as follows:

[0038] When the PWM signal is low, the voltage at the anode pin A of diode D1 flows to the cathode pin K, generating a PWM signal with the same frequency as the input PWM signal for subsequent circuit processing. The voltage division ratio of resistors R1 and R2 is set so that the anode pin A of diode D1 receives voltage when the circuit is working, ensuring that diode D1 conducts normally when the PWM signal is low, and is used to reverse cut off when the PWM signal is high, preventing external signals from entering the circuit.

[0039] Resistors R1 and R2 are connected in series between the 5V power supply voltage and ground to divide the voltage and provide a stable voltage to the anode pin A of diode D1.

[0040] When the gate (G) of MOSFET Q1 receives a high-low change in the PWM signal, it controls the drain (D) voltage to be grounded through the source, thereby generating a high-low voltage PWM signal at the drain (D) position to achieve stable driving of the subsequent circuit and isolate excessively high voltage or noise input.

[0041] If certain terms are used in the specification and claims to refer to specific components, those skilled in the art will understand that hardware manufacturers may use different names to refer to the same component. This specification and claims do not distinguish components based on differences in name, but rather on differences in function. The term "comprising" as used throughout the specification and claims is an open-ended term and should be interpreted as "comprising but not limited to." "Approximately" means that within an acceptable margin of error, those skilled in the art can solve the technical problem and substantially achieve the technical effect within a certain margin of error.

[0042] It should be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a product or system comprising a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a product or system. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the product or system that includes that element.

[0043] The foregoing description illustrates and describes several preferred embodiments of the present invention. However, as previously stated, it should be understood that the present invention is not limited to the forms disclosed herein and should not be construed as excluding other embodiments. It can be used in various other combinations, modifications, and environments, and can be altered within the scope of the inventive concept described herein through the foregoing teachings or techniques or knowledge in related fields. Any modifications and variations made by those skilled in the art that do not depart from the spirit and scope of the present invention should be within the protection scope of the appended claims.

Claims

1. An isolated anti-interference PWM input circuit, characterized in that, include: Diode D1, the input terminal of which is connected to a PWM signal source; Resistors R1 and R2 are connected in series, with one end connected to a 5V power supply and the other end grounded. Resistors R1 and R2 are electrically connected to the anode pin A of diode D1. The MOSFET Q1 has its gate (G) connected between resistors R1 and R2 via resistor R3. The drain (D) of the MOSFET Q1 is electrically connected to the 5V power supply voltage and outputs a PWM signal source via resistor R5. The source (S) of the MOSFET Q1 is grounded.

2. The isolated anti-interference PWM input circuit according to claim 1, characterized in that: The gate (G) of the MOS transistor Q1 is electrically connected to the anode pin (A) of the diode D1 through the resistor R3.

3. The isolated anti-interference PWM input circuit according to claim 1, characterized in that: The diode D1 is in the off state when the PWM signal is high, preventing the PWM signal from entering the circuit. When the PWM signal is low, the voltage at the anode pin A of the diode D1 flows to the cathode pin K, generating a PWM signal with the same frequency as the input PWM signal for subsequent circuit processing.

4. The isolated anti-interference PWM input circuit according to claim 1, characterized in that: A resistor R4 is electrically connected between the drain (D) of the MOS transistor Q1 and the 5V power supply voltage.

5. The isolated anti-interference PWM input circuit according to claim 1, characterized in that: The resistor R5 is positioned between the resistor R4 and the drain (D) of the MOS transistor Q1.

6. The isolated anti-interference PWM input circuit according to claim 1, characterized in that: The voltage division ratio of resistors R1 and R2 is set such that the anode pin A of diode D1 receives voltage when the circuit is working, ensuring that diode D1 conducts normally when the PWM signal is low.

7. The isolated anti-interference PWM input circuit according to claim 1, characterized in that: The MOSFET Q1 controls the switching of the drain voltage according to the high and low changes of the PWM signal received at the gate.

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