A step motor based distance compensation circuit

Abstract

This invention provides a stepper motor-based distance compensation circuit, including a delay timing module, a speed calculation module, a stepping direction signal generation module, and a remaining distance calculation module. The synchronization signal for the stepper motor is input to the delay timing module. When the rising edge of the synchronization signal arrives, the chip enters a first-level delay, during which distance and time can be written. After the first-level delay ends, a second-level delay begins, during which the running speed is calculated. Running begins at the end of the second-level delay. Furthermore, at the start of a new movement, if there is unfinished motor distance, the chip increases the speed to ensure the motor completes the sum of the remaining distance and the new distance within the running time.

Description

Technical Field

[0001] This utility model belongs to the field of stepper motor technology, and in particular relates to a travel compensation circuit based on a stepper motor. Background Technology

[0002] Stepper motors are widely used in modern society. They are essential in industrial automation, medical applications, and any other application requiring rotation. Furthermore, due to the significant differences in these applications, the specific drive requirements for stepper motors are numerous. Currently, most stepper motor motion profiles are driven using external microcontroller programming. The drive signals are programmed into the microcontroller and then input into the chip to drive the motor. However, this method is not only costly and complex to use, but also wastes microcontroller resources.

[0003] Existing patent application CN116505811A discloses a stepper motor compensation method and device, comprising: activating a compensation mode according to an external command; detecting the motion state of the stepper motor; and entering closed-loop compensation based on the motion state; calculating compensation information based on the current motion information of the stepper motor after entering closed-loop compensation; and performing multiple compensations on the stepper motor according to the compensation information and compensation rules until the compensation information reaches a preset condition, then stopping compensation and exiting the closed-loop compensation mode. This invention allows stepper motor compensation detection to be activated via an external command, eliminating the need for operation in a specific working environment; and performs multiple compensations on the stepper motor according to the compensation information and preset compensation rules, resulting in higher accuracy and ensuring the stepper motor's precision. However, this method requires additional external equipment to provide external commands, which not only increases the cost of the external equipment (which is typically a microcontroller, resulting in some waste), but also makes implementation in application relatively complex. Utility Model Content

[0004] Currently, most stepper motor motion profiles are driven by external microcontroller programming. The drive signal is programmed into the microcontroller and then input into the chip to drive the motor. The current method of distance compensation calculation generally uses microcontroller programming to achieve high-frequency reciprocating operation of the motor. This not only increases the cost of the microcontroller and causes some waste, but also makes the implementation in the application process more complicated.

[0005] To solve the above-mentioned technical problems, the technical solution provided by this utility model is as follows: a distance compensation circuit based on a stepper motor, including a stepping direction signal generation module, which outputs a direction signal and a stepping signal to the motor based on the synchronous speed; a remaining distance calculation module records the actual displacement and calculates the current remaining distance during motor operation; a delay timing module sequentially starts a first-level delay counter and a second-level delay counter when it detects the synchronous signal input; during the first-level delay, the distance and time are written and input to the speed calculation module; during the second-level delay, the remaining distance calculation module calculates the expected remaining distance based on the delay time, the actual speed, and the current remaining distance; the speed calculation module calculates the total distance based on the expected remaining distance and the written distance, and calculates the synchronous speed based on the total distance and the written time.

[0006] Specifically, the delay timing module includes a startup module, which is connected to the first-level delay counting module. The output of the first-level delay counting module is connected to the speed calculation module and the second-level delay counting module. The output of the second-level delay counting module is connected to the step direction signal generation module.

[0007] Specifically, when the startup module detects the rising edge of the synchronization signal, it outputs a startup signal to the first-level delay counting module. The first-level delay counting module starts delay counting. During the counting process, the writing distance and writing time are input. After the counting is completed, the first-level delay counting module outputs the first-level delay counting completion signal DT1_PLS to the speed calculation module and the second-level delay counting module.

[0008] Specifically, after receiving DT1_PLS, the speed calculation module latches the written distance and the written time, calculates the total distance of this synchronization operation based on the written distance and the estimated remaining distance calculated by the remaining distance calculation module, and then calculates the synchronization speed of this operation based on the written time.

[0009] Specifically, after receiving DT1_PLS, the secondary delay counting module starts secondary delay counting. During the secondary delay counting process, the speed calculation module completes the calculation of the synchronous speed. After the counting is completed, the secondary delay counting module outputs the secondary delay counting completion signal DT2_PLS to the step direction signal generation module.

[0010] Specifically, after receiving DT2_PLS, the step direction signal generation module latches the synchronous speed output by the speed calculation module as the actual speed, performs step counting accumulation based on the actual speed, obtains the step signal and direction signal, and outputs them to the stepper motor and the remaining distance calculation module.

[0011] Specifically, the first-level delay counting module also outputs the first-level delay counting completion signal DT1_PLS to the remaining distance calculation module. After receiving DT1_PLS, the remaining distance calculation module calculates the distance traveled at the current actual speed within the second-level delay counting time.

[0012] Specifically, the remaining distance calculation module accumulates the step signal and direction signal to calculate the actual displacement; then, it subtracts the actual displacement from the total distance of synchronous operation output by the speed calculation module to calculate the current remaining distance; after receiving DT1_PLS, it calculates the distance traveled within the second-level delay counting time using the actual speed output by the step direction signal generation module, subtracts the distance traveled within the second-level delay counting time from the current remaining distance to obtain the expected remaining distance; and outputs the expected remaining distance to the speed calculation module to calculate the total distance of this synchronous operation.

[0013] Specifically, the startup module is mounted on chip U1. U1 includes a first register U1_1. The output of U1_1 is connected to a second register U1_2. When the rising edge of the synchronization signal arrives, U1_1 outputs 1 and U1_2 outputs 0. Finally, chip U1 outputs a synchronization signal pulse to the first-level delay counting module.

[0014] Specifically, the speed calculation module includes latch chips U4 and U5, an addition calculation chip U6, and a division calculation chip U7. After receiving DT1_PLS, the speed calculation module latches the input write path and outputs it to chip U6, while U5 latches the input write time and outputs it to chip U7. The remaining path calculation module outputs the estimated remaining path to U6, and U6 calculates the total path based on the write path and the estimated remaining path, and outputs the total path to U7. U7 calculates the synchronization speed based on the write time and the total path, and outputs the synchronization speed to the step direction signal generation module.

[0015] The beneficial effects of this utility model are: the distance compensation calculation is realized in the form of digital circuit, which ensures that the motor can run continuously without losing steps when running at high speed and high frequency, reduces the use of microcontroller resources, and simplifies the configuration of motor drive. Attached Figure Description

[0016] Figure 1 This is a block diagram of the overall circuit module of this utility model.

[0017] Figure 2 This is a detailed circuit diagram of the delay timing module of this utility model.

[0018] Figure 3 This is a detailed circuit diagram of the speed calculation module of this utility model.

[0019] Figure 4 This is a detailed circuit diagram of the step direction signal generation module of this utility model.

[0020] Figure 5 This is a detailed circuit diagram of the remaining distance calculation module of this utility model. Detailed Implementation

[0021] The present invention will now be described in detail with reference to the accompanying drawings and embodiments.

[0022] Example 1: A travel compensation circuit based on a stepper motor, such as Figure 1 As shown, it includes a timing delay module, a speed calculation module, a stepping direction signal generation module, and a remaining distance calculation module. The synchronization signal for the stepper motor is input to the timing delay module. When the rising edge of the synchronization signal arrives, the chip enters the first-level delay, during which the distance and time can be written. After the first-level delay ends, it enters the second-level delay, during which the running speed is calculated, and operation begins at the end of the second-level delay.

[0023] Once the target position and running time are set, the chip will automatically provide a constant running speed. After a first-level delay and a second-level delay, it will begin running at a constant speed to ensure that it reaches the target position by the end of the running time, and then stops immediately upon reaching the target position. To ensure that the motor can reach the target position within the specified time, and at the start of a new movement, if there is any unfinished motor distance, the chip will increase the speed to ensure that the motor completes the sum of the remaining distance and the new distance within the running time.

[0024] For example: In the first run, the writing distance is 100, the writing time is 10, and the running speed is 100 / 10. It is completed when the time reaches 10. In the second run, the writing distance is 100, the writing time is 10, and the initial running speed is 100 / 10. Before it is completed (during the first-level delay counting process), the third run is written with a writing distance of 100 and a writing time of 10. At this time, the second-level delay counting begins, the new running speed is calculated, and the running speed is increased according to the above calculation results after the second-level delay state ends, so as to ensure that the preset distance is completed when the writing time ends.

[0025] like Figure 2 As shown, the delay timing module includes a startup module U1, a first-level delay counting module U2, and a second-level delay counting module U3; U1 is used to detect the rising edge of the synchronization signal. When the VD signal is at its rising edge, the first register U1_1 of U1 will output 1, at which time U1_2 will output 0, and VD_PLS_POS will output a clock pulse signal.

[0026] U2 is used for the first-level delay count. When the VD_PLS_POS pulse arrives, U2 is enabled and reset to DT1, and decrements by 1 every clock cycle until U2 equals 0. At this time, DT1_PLS will output a clock pulse signal to indicate that the first-level delay count is complete.

[0027] U3 is used for the second-level delay count. When the DT1_PLS pulse arrives, U3 is enabled and reset to DT2, and decrements by 1 every clock cycle until U3 equals 0. At this time, DT2_PLS will output a clock pulse signal to indicate that the second-level delay count is complete.

[0028] When the speed calculation module receives the DT1_PLS pulse from the first-level delay counting module, it latches the write path PSUM_write and write time RUNT_write. Based on PSUM_write and the estimated remaining path PSUM_remain_DT2 (calculated by the remaining path calculation module) of the previous run instruction, the speed calculation module calculates the total path XTARGET for this synchronous run: XTARGET = PSUM_write + PSUM_remain_DT2. The synchronization speed VACTUAL_pr for this synchronous run is calculated as XTARGET / RUNT_write. After calculation, the speed calculation module inputs XTARGET to the remaining path calculation module and the synchronization speed VACTUAL_pr to the step direction signal generation module.

[0029] When the step direction signal generation module receives the DT2_PLS pulse indicating the completion of the second-level delay count, it latches the synchronization speed VACTUAL_pr to obtain the actual speed VACTUAL for this synchronous operation. The step direction signal generation module then performs step counting accumulation based on the actual speed to obtain the step signal STEP and the direction signal DIR, and outputs them to the stepper motor and remaining distance calculation module.

[0030] The remaining distance calculation module accumulates the step signal STEP and the direction signal DIR to calculate the actual displacement XACTUAL. Then, it subtracts the actual displacement XACTUAL from the total synchronous distance XTARGET output by the speed calculation module to calculate the current remaining distance PSUM_remain, where PSUM_remain = XTARGET - XACTUAL. Upon receiving DT1_PLS, it calculates the distance traveled within the second-level delay counting time DT2 and the actual speed VACTUAL output by the step direction signal generation module, where distance_DT2 = VACTUAL * DT2. The current remaining distance PSUM_remain is subtracted from the distance traveled within the second-level delay counting time to obtain the expected remaining distance PSUM_remain_DT2, where PSUM_remain_DT2 = PSUM_remain - distance_DT2. Finally, the expected remaining distance PSUM_remain_DT2 is output to the speed calculation module to calculate the total synchronous distance XTARGET.

[0031] Among them, such as Figure 3 As shown, the speed calculation module includes four functional blocks, U4-U7. U4 and U5: Data latching. When the DT1_PLS pulse arrives, U4 and U5 are enabled to latch the path PSUM and time RUNT respectively, obtaining the write path PSUM_write and write time RUNT_write for this synchronous operation. U6: Addition calculation. The total distance traveled in this synchronous run is XTARGET = PSUM_write + PSUM_remain_DT2. PSUM_remain_DT2 is the remaining distance expected to be completed by DT2. U7: Division calculation. The speed of this synchronous operation is VACTUAL_pr=XTARGET / RUNT_write.

[0032] Step direction signal generation module such as Figure 4 As shown, it includes two function blocks, U8 and U9. U8: Data latch. When the DT2_PLS pulse arrives, U8 is enabled to latch VACTUAL_pr, thus obtaining the actual speed VACTUAL of this synchronization operation. U9: Count Overflow. When U9 reaches full scale or overflows, it outputs a clock pulse signal STEP as a step signal. The direction signal DIR is equal to the most significant bit of VACTUAL, representing the direction of operation.

[0033] The remaining distance calculation module is as follows: Figure 5 As shown, there are four functional blocks, U10-U13. U10: Counting and Accumulation Module. It accumulates based on the step signal and direction signal. STEP (one clock pulse) enables XACTUAL for incrementing or decrementing, selected by the DIR signal. The accumulated XACTUAL result represents the current actual position. U11: Subtraction calculation. Current remaining distance PSUM_remain = XTARGET - XACTUAL. This represents the remaining distance to the current position.

[0034] U12: Multiplication calculation. When the DT1_PLS pulse arrives, calculate the distance traveled at the current actual speed within the DT2 time interval: distance_DT2 = VACTUAL * DT2; U13: Subtraction calculation. Estimated remaining distance PSUM_remain_DT2 = PSUM_remain - distance_DT2. This represents the estimated distance remaining at the end of DT2. The distance subsequently added to the write distance PSUM_write represents the total distance after compensation.

[0035] Example 2: A distance compensation circuit based on a stepper motor includes a delay timing module, which is connected to a speed calculation module and a stepping direction signal generation module. The speed calculation module calculates the synchronous speed and total distance and outputs them to the stepping direction signal generation module. The stepping direction signal generation module calculates the direction signal and the stepping signal and outputs them to the motor and the remaining distance calculation module. The remaining distance calculation module is connected to both the speed calculation module and the direction signal generation module, calculates the travel distance during the delay time, calculates the expected remaining distance based on the current remaining distance, and outputs it to the speed calculation module to calculate the total distance.

[0036] This embodiment implements the algorithm functionality that would otherwise require a microcontroller in hardware, significantly reducing the use of a microcontroller. Microcontrollers are more expensive than chip resources, and their implementation is more complex, making modifications for different situations cumbersome. This invention can be integrated as standalone IP into any required chip, greatly improving efficiency and integration while reducing cost and complexity. Furthermore, the motion results of this invention are suitable for motor motion, providing better optimization for motor wear and drive systems.

[0037] The delay timing module includes a startup module, which is connected to the first-level delay counting module. The output of the first-level delay counting module is connected to the speed calculation module and the second-level delay counting module. The output of the second-level delay counting module is connected to the step direction signal generation module.

[0038] When the startup module detects the rising edge of the synchronization signal, it outputs a startup signal pulse to the first-level delay counting module. The first-level delay counting module starts delay counting and writes the distance and time during the counting process. After the counting is completed, the first-level delay counting module outputs the first-level delay counting completion signal DT1_PLS to the speed calculation module and the second-level delay counting module.

[0039] After receiving DT1_PLS, the speed calculation module latches the written distance and time, calculates the total distance of this synchronization operation based on the written distance and the estimated remaining distance calculated by the remaining distance calculation module, and then calculates the synchronization speed of this synchronization operation based on the written time.

[0040] After receiving DT1_PLS, the secondary delay counting module starts secondary delay counting. During the secondary delay counting process, the speed calculation module completes the synchronous speed calculation. After the counting is completed, the secondary delay counting module outputs the secondary delay counting completion signal DT2_PLS to the step direction signal generation module.

[0041] After receiving DT2_PLS, the step direction signal generation module latches the synchronous speed output by the speed calculation module as the actual speed, performs step counting accumulation based on the actual speed, calculates the step signal and direction signal, and outputs them to the stepper motor and the remaining distance calculation module.

[0042] The first-level delay counting module also outputs the first-level delay counting completion signal DT1_PLS to the remaining distance calculation module. After receiving DT1_PLS, the remaining distance calculation module calculates the distance traveled at the current actual speed within the second-level delay counting time.

[0043] The remaining distance calculation module accumulates the step signal and direction signal to calculate the actual displacement; then it subtracts the actual displacement from the total distance of synchronous operation output by the speed calculation module to calculate the current remaining distance; after receiving DT1_PLS, it calculates the distance traveled during the second-level delay counting time by using the second-level delay counting time and the actual speed output by the step direction signal generation module, and subtracts the distance traveled during the second-level delay counting time from the current remaining distance to obtain the expected remaining distance; the expected remaining distance is then output to the speed calculation module to calculate the total distance of this synchronous operation.

[0044] The delay timing module includes a startup module U1, a first-level delay counting module U2, and a second-level delay counting module U3. U1 is used to detect the rising edge of the synchronization signal. When the VD signal is at its rising edge, the first register U1_1 of U1 will output 1, at which time U1_2 will output 0, and VD_PLS_POS will output a clock pulse signal.

[0045] U2 is used for the first-level delay count. When the VD_PLS_POS pulse arrives, U2 is enabled and reset to DT1, and then decrements by 1 every clock cycle until U2 equals 0. At this time, DT1_PLS will output a clock pulse signal to indicate that the first-level delay count is complete.

[0046] U3 is used for the second-level delay count. When the DT1_PLS pulse arrives, U3 is enabled and reset to DT2, and decrements by 1 every clock cycle until U3 equals 0. At this time, DT2_PLS will output a clock pulse signal to indicate that the second-level delay count is complete.

[0047] The speed calculation module includes four functional blocks, U4-U7. U4 and U5: Data latching. When the DT1_PLS pulse arrives, U4 and U5 are enabled to latch the path PSUM and time RUNT respectively, obtaining the write path PSUM_write and write time RUNT_write for this synchronous operation. U6: Addition calculation. The total distance traveled in this synchronous run is XTARGET = PSUM_write + PSUM_remain_DT2. PSUM_remain_DT2 is the remaining distance expected to be completed by DT2. U7: Division calculation. The speed of this synchronous operation is VACTUAL_pr=XTARGET / RUNT_write.

[0048] The step direction signal generation module includes two functional blocks, U8 and U9. U8: Data latch. When the DT2_PLS pulse arrives, U8 is enabled to latch VACTUAL_pr, thus obtaining the actual speed VACTUAL for this synchronous operation. U9: Count Overflow. When U9 reaches full scale or overflows, it outputs a clock pulse signal STEP as a step signal. The direction signal DIR is equal to the most significant bit of VACTUAL, representing the direction of operation.

[0049] The remaining distance calculation module consists of four functional blocks, U10-U13. U10 is the counting and accumulation module. It accumulates distance based on the step signal and direction signal. STEP (one clock pulse) enables XACTUAL for incrementing or decrementing, selected by the DIR signal. The accumulated XACTUAL result represents the current actual position. U11: Subtraction calculation. Current remaining distance PSUM_remain = XTARGET - XACTUAL. This represents the remaining distance to the current position.

[0050] U12: Multiplication calculation. When the DT1_PLS pulse arrives, calculate the distance traveled at the current actual speed within the DT2 time interval: distance_DT2 = VACTUAL * DT2; U13: Subtraction calculation. Estimated remaining distance PSUM_remain_DT2 = PSUM_remain - distance_DT2. This represents the estimated distance remaining at the end of DT2. The distance subsequently added to the write distance PSUM_write represents the total distance after compensation.

[0051] The above specific embodiments are merely preferred embodiments of this utility model, and are not intended to limit the specific implementation structure and scope of this utility model. In fact, some equivalent changes can be made according to the shape, structure, and design purpose of this utility model. Therefore, all equivalent changes made according to the shape, structure, and design purpose of this utility model should be included within the protection scope of this utility model, that is, these equivalent changes should all be protected by this utility model.

Claims

1. A travel compensation circuit based on a stepper motor, characterized in that, The system includes a step direction signal generation module, which outputs a direction signal and a step signal to the motor based on the synchronous speed; a remaining distance calculation module, which records the actual displacement and calculates the current remaining distance during motor operation; a delay timing module, which sequentially starts a first-level delay counter and a second-level delay counter when it detects the synchronous signal input; during the first-level delay, the distance and time are written and input to the speed calculation module; during the second-level delay, the remaining distance calculation module calculates the expected remaining distance based on the delay time, the actual speed, and the current remaining distance; and a speed calculation module calculates the total distance based on the expected remaining distance and the written distance, and calculates the synchronous speed based on the total distance and the written time.

2. The travel compensation circuit based on a stepper motor according to claim 1, characterized in that, The delay timing module includes a startup module, which is connected to the first-level delay counting module. The output of the first-level delay counting module is connected to the speed calculation module and the second-level delay counting module. The output of the second-level delay counting module is connected to the step direction signal generation module.

3. The travel compensation circuit based on a stepper motor according to claim 2, characterized in that, When the startup module detects the rising edge of the synchronization signal, it outputs a startup signal to the first-level delay counting module. The first-level delay counting module starts delay counting. During the counting process, the writing distance and writing time are input. After the counting is completed, the first-level delay counting module outputs the first-level delay counting completion signal DT1_PLS to the speed calculation module and the second-level delay counting module.

4. The travel compensation circuit based on a stepper motor according to claim 1 or 3, characterized in that, After receiving DT1_PLS, the speed calculation module latches the written distance and the written time. Based on the written distance and the estimated remaining distance calculated by the remaining distance calculation module, it calculates the total distance for this synchronization operation, and then calculates the synchronization speed for this operation based on the written time.

5. The travel compensation circuit based on a stepper motor according to claim 2 or 3, characterized in that, After receiving DT1_PLS, the secondary delay counting module starts secondary delay counting. During the secondary delay counting process, the speed calculation module completes the calculation of the synchronous speed. After the counting is completed, the secondary delay counting module outputs the secondary delay counting completion signal DT2_PLS to the step direction signal generation module.

6. The travel compensation circuit based on a stepper motor according to claim 5, characterized in that, After receiving DT2_PLS, the step direction signal generation module latches the synchronous speed output by the speed calculation module as the actual speed, performs step counting accumulation based on the actual speed, obtains the step signal and direction signal, and outputs them to the stepper motor and the remaining distance calculation module.

7. The travel compensation circuit based on a stepper motor according to claim 3, characterized in that, The first-level delay counting module also outputs the first-level delay counting completion signal DT1_PLS to the remaining distance calculation module. After receiving DT1_PLS, the remaining distance calculation module calculates the distance traveled at the current actual speed within the second-level delay counting time.

8. The travel compensation circuit based on a stepper motor according to claim 1, characterized in that, The remaining distance calculation module accumulates the step signal and direction signal to calculate the actual displacement; then it subtracts the actual displacement from the total distance of synchronous operation output by the speed calculation module to calculate the current remaining distance; after receiving DT1_PLS, it calculates the distance traveled within the second-level delay counting time using the actual speed output by the step direction signal generation module, subtracts the distance traveled within the second-level delay counting time from the current remaining distance to obtain the expected remaining distance; and outputs the expected remaining distance to the speed calculation module to calculate the total distance of this synchronous operation.

9. The travel compensation circuit based on a stepper motor according to claim 3, characterized in that, The startup module is mounted on chip U1, which includes a first register U1_1. The output of U1_1 is connected to a second register U1_2. When the rising edge of the synchronization signal arrives, U1_1 outputs 1 and U1_2 outputs 0. Finally, chip U1 outputs a synchronization signal pulse to the first-level delay counting module.

10. The travel compensation circuit based on a stepper motor according to claim 4, characterized in that, The speed calculation module includes latch chips U4 and U5, an addition calculation chip U6, and a division calculation chip U7. After receiving DT1_PLS, the speed calculation module latches the write path input by U4 and outputs it to chip U6, and latches the write time input by U5 and outputs it to chip U7. The remaining path calculation module outputs the estimated remaining path to U6. U6 calculates the total path based on the write path and the estimated remaining path and outputs the total path to U7. U7 calculates the synchronization speed based on the write time and the total path and outputs the synchronization speed to the step direction signal generation module.

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