Dc / ac inversion topology circuit based on coupled inductances and device provided with same

Abstract

The utility model provides a kind of DC / AC inverter topology circuit based on coupled inductance and the device with it, in DC / AC inverter topology circuit, by the modular structure of power module design is direct current side parallel connection, AC side is independently coupled inductance output module, and further apply the same drive waveform with fixed phase difference, utilize the principle of power group independent control, phase stagger and coupled inductance sharing, realized the independent current effect between power module, eliminated the dependence on power tube parameter consistency;At the same time, through the physical separation layout design of power group, improve the system heat dissipation distribution and break through centralized layout limit;In addition, with the technical means of staggered drive to improve equivalent switching frequency, the volume of coupled inductance is significantly reduced, the core loss is reduced, and the number of coupled inductance is reduced by optimizing the configuration, the overall volume is reduced and the loss is reduced, so as to improve the system power density, and optimize the overall efficiency and expansion flexibility.

Description

Technical Field

[0001] This utility model relates to the field of new energy integrated machines, and in particular to a DC / AC inverter topology circuit based on coupled inductors and a device equipped with it. Background Technology

[0002] In the field of integrated new energy systems, DC / AC inverters are the core components for realizing the conversion of electrical energy and the interaction of system energy. The key to designing DC / AC inverter circuits lies in the design of the topology, the selection and driving of power transistors, and the selection of magnetic components. Specifically, to meet high power output demands, multiple power transistors are often connected in parallel in the circuit design. By sharing the current load among multiple power transistors, the power consumption of a single transistor can be reduced to improve conversion efficiency. Furthermore, the natural heat dissipation mechanism of the power transistors can be improved, reducing reliance on complex heat dissipation structures and, to a certain extent, meeting the requirements of equipment compactness and economy. However, when using a direct parallel connection of power transistors, the consistency of the parameters of the connected power transistors is crucial. The common practice is to screen power transistors at the factory, using those with smaller parameter errors. However, due to subtle differences in device manufacturing processes, parameters such as on-state voltage drop and switching speed of each transistor are difficult to match perfectly, easily leading to uneven current distribution. Furthermore, in actual use, some power transistors may overheat due to carrying excessive current. To mitigate this risk, a larger power margin is often reserved in the design, which not only increases device costs but also adds redundancy to the overall device size. Moreover, in actual circuit layout, the parallel power transistors need to be as close as possible to ensure consistent drive and voltage stress, increasing PCB routing difficulty, and the transistors cannot be placed too close together to avoid excessive heat concentration. Furthermore, in the technical solution of using multiple power transistors in parallel, the total output current of the circuit is equal to the sum of the currents of each power transistor. The current through the magnetic components increases significantly. Therefore, the magnetic components need to withstand larger peak currents and effective currents. At the same time, in order to better achieve the current sharing characteristics of each branch, the magnetic components are also required to have better consistency. To reduce over-reliance on power transistor consistency and achieve automatic current balancing, traditional current sharing solutions either rely on complex detection and feedback circuits or require stringent component selection to ensure parameter matching. However, improper topology increases system losses and wiring complexity, and significantly raises production costs. Therefore, there is a need to develop a DC / AC inverter topology with a simplified circuit structure that does not depend on power transistor consistency and can achieve good current sharing performance. Utility Model Content

[0003] The present invention aims to overcome at least one of the defects of the prior art and provide a DC / AC inverter topology circuit based on coupled inductors and a device having therein.

[0004] Specifically, this technical solution provides a DC / AC inverter topology circuit based on coupled inductors, including: A power module includes at least two power groups, each power group containing no less than four power transistors. Each power group includes two parallel power group paths: a first path and a second path. Each power group path includes at least two power transistors connected in series. The drive control module includes several drive control units, each of which corresponds to one of the power groups and is independently controlled. In the power group, the DC side of each power group path is connected in parallel to the DC bus, and its AC side is connected to the AC output terminal through its corresponding coupling inductor. The drive control module provides drive control signals with the same waveform but with a certain phase difference to each power group. The connection points on the AC side of the power group path are located between the power transistors connected in series in each power group path. In the power module, the AC side of the first path in two adjacent power groups is simultaneously connected to the same side of the coupling inductor, and the AC side of the second path in two adjacent power groups is simultaneously connected to the same side of the coupling inductor.

[0005] In this technical solution, by designing the power modules as a modular structure with parallel DC-side connections and AC-side output via independently coupled inductors, and further applying the same driving waveform with a fixed phase difference, the autonomous current sharing effect among the power modules is achieved by utilizing the principles of independent power group control, phase interleaving, and shared coupled inductors, eliminating the dependence on the consistency of power transistor parameters. Simultaneously, the physical separation layout design of the power groups improves the system's heat dissipation distribution and overcomes the limitations of centralized layouts. Furthermore, by using interleaved driving to increase the equivalent switching frequency, the volume of coupled inductors is significantly reduced, and core losses are lowered. At the same time, optimizing the configuration of coupled inductors reduces their number, further reducing the overall volume and losses, thereby improving system power density while optimizing overall efficiency and expansion flexibility.

[0006] Furthermore, when the number of power groups is n, the number of coupling inductors is 2n-2. By allowing adjacent power groups to share coupling inductors, and combining the magnetic coupling characteristics based on coupling inductors with the delay characteristics of phase interleaving between power groups, the total number of coupling inductors used in the DC / AC inverter circuit is reduced. At the same time, the balance of current in each power group path and ripple suppression are ensured, improving the compactness of the overall circuit layout, increasing the utilization efficiency of magnetic devices, and reducing device costs and system size.

[0007] Furthermore, within the same power group, the two power group paths are connected via a pair of complementary switching power transistors. By using a pair of complementary switching power transistors to connect the two power group paths within the same power group, and based on the alternating on and off characteristics of the complementary switching power transistors, flexible switching and coordinated control of the two paths within the power group are achieved. This ensures the integrity and smoothness of the current path during different half-cycles, improves the stability of the power conversion process, and enhances the utilization efficiency of the power transistors and the reliability of circuit operation.

[0008] Furthermore, when the number of the drive control unit and the power group is N, the phase difference between the drive control signals received by the power groups is 360° / N; by utilizing the principle of multi-phase interleaving superposition, the output current ripple frequency is increased to N times that of a single module, thereby significantly reducing the volume and loss of the coupled inductor and improving the system power density and efficiency.

[0009] Furthermore, in the power module, all power groups have the same connection structure; by setting the electrical parameters of each power group branch to be symmetrical, the uneven current distribution caused by structural differences is eliminated by utilizing the principle of topology consistency, thereby improving the reliability of system current sharing and the convenience of modular expansion.

[0010] Furthermore, it also includes an output filter capacitor, which is connected in parallel at the AC output terminal; by utilizing the characteristic that the capacitor voltage cannot change abruptly to absorb the high-frequency switching ripple current, combined with the filtering effect of the coupling inductor, the output voltage waveform is effectively smoothed, and forced current sharing is further realized on the AC output side, reducing the impact of power transistor device consistency.

[0011] Furthermore, the coupling inductors connected to all power groups have a consistent differential-mode inductance value. Specifically, by ensuring that the differential-mode inductance values ​​of all coupling inductors are strictly consistent, it is ensured that each power group exhibits equal impedance characteristics under the same phase difference drive. By utilizing the forced current sharing mechanism of electromagnetic coupling, automatic current balancing among multiple modules is achieved, reducing the dependence on the consistency of power transistor parameters.

[0012] Furthermore, in the drive control module, the drive control signal is an SPWM signal; specifically, sinusoidal pulse width modulation technology is used to precisely control the switching timing of each power group, and a high-quality sine wave is synthesized by combining a phase interleaving strategy, which further improves the harmonic distortion and waveform accuracy of the output voltage.

[0013] In one embodiment, the first power group includes power transistors Q1, Q2, Q3, Q4, Q5, and Q6. The second power group includes power transistors Q11, Q22, Q33, Q44, Q55, and Q66. In the first power group, the input terminal of power transistor Q1 is connected to the positive terminal of the DC power supply, and the output terminal is connected to the input terminal of the coupling inductor L1. At the same time, the output terminal of power transistor Q1 is also connected to the input terminal of power transistor Q4 and further connected to the negative terminal of the DC power supply. The input terminal of power transistor Q2 is connected to the positive terminal of the DC power supply, and the output terminal is connected to the input terminal of the coupling inductor L2. At the same time, the output terminal of power transistor Q2 is also connected to the input terminal of power transistor Q3 and further connected to the negative terminal of the DC power supply. The output terminal of power transistor Q1 is connected to the output terminal of power transistor Q2 through power transistors Q6 and Q5 connected in series. In the second power group, the input terminal of power transistor Q11 is connected to the positive terminal of the DC power supply, and the output terminal is connected to the input terminal of the coupling inductor L1. At the same time, the output terminal of power transistor Q11 is also connected to the input terminal of power transistor Q44 and further connected to the negative terminal of the DC power supply. The input terminal of power transistor Q22 is connected to the positive terminal of the DC power supply, and the output terminal is connected to the input terminal of the coupling inductor L2. At the same time, the output terminal of power transistor Q22 is also connected to the input terminal of power transistor Q33 and further connected to the negative terminal of the DC power supply. The output terminal of power transistor Q11 and the output terminal of power transistor Q22 are connected in series through power transistors Q66 and Q55. The output terminal of the coupling inductor L1 is connected to one end of the filter capacitor C1, and the output terminal of the coupling inductor L2 is connected to the other end of the filter capacitor C1.

[0014] Furthermore, during the positive half-cycle of the AC voltage: The power transistors Q1 and Q3 of the first power group and the power transistors Q11 and Q33 of the second power group are kept in synchronous switching. The switching actions of power transistors Q1 and Q3 in the first power group and power transistors Q11 and Q33 in the second power group are complementary to the switching states of power transistor Q5 in the first power group and power transistor Q55 in the second power group. The power transistor Q6 of the first power group and the power transistor Q66 of the second power group are kept on by normal operation. During the negative half-cycle of the AC voltage: The power transistors Q2 and Q4 of the first power group are switched synchronously with the power transistors Q22 and Q44 of the second power group. The switching actions of power transistors Q2 and Q4 in the first power group and power transistors Q22 and Q44 in the second power group are complementary to the switching states of power transistors Q6 in the first power group and Q66 in the second power group. The power transistor Q5 of the first power group and the power transistor Q55 of the second power group remain constantly on.

[0015] Another objective of this utility model is to provide a DC / AC inverter device, wherein the DC / AC inverter device is provided with the DC / AC inverter topology circuit as provided in this technical solution.

[0016] The beneficial effects of this utility model are as follows: 1. A DC / AC inverter topology circuit based on coupled inductors and a device incorporating it are provided. Specifically, in the DC / AC inverter topology circuit, by designing the power modules as a modular structure with parallel DC-side connections and AC-side outputs via independent coupled inductors, and further applying the same driving waveform with a fixed phase difference, the autonomous current sharing effect among the power modules is achieved by utilizing the current superposition characteristics of the coupled inductors and the principle of interleaved parallel connection, eliminating the dependence on the consistency of power transistor parameters. At the same time, the physical separation layout design of the power groups improves the system heat dissipation distribution and overcomes the limitations of centralized layout. In addition, by using the technique of interleaved driving to increase the equivalent switching frequency, the volume of the coupled inductors is significantly reduced and the core loss is reduced, thereby improving the system power density while optimizing the overall efficiency and expansion flexibility.

[0017] 2. In the power module, all power groups have the same connection structure; by setting the electrical parameters of each power group branch to be symmetrical, the uneven current distribution caused by structural differences is eliminated by utilizing the principle of topology consistency, thereby improving the reliability of system current sharing and the convenience of modular expansion.

[0018] 3. In the DC / AC inverter topology circuit, there is also an output filter capacitor connected in parallel at the AC output terminal. By utilizing the characteristic that the capacitor voltage cannot change abruptly, the high-frequency switching ripple current is absorbed. Combined with the filtering effect of the coupling inductor, the output voltage waveform is effectively smoothed. Forced current sharing is further realized on the AC output side, reducing the impact of power transistor device consistency. Attached Figure Description

[0019] Figure 1 This is a circuit connection diagram of the DC / AC inverter topology circuit based on coupled inductors provided in Embodiment 2 of this utility model.

[0020] Figure 2 This is a circuit connection diagram of the DC / AC inverter topology circuit based on coupled inductors provided in Embodiment 3 of this utility model. Detailed Implementation

[0021] The accompanying drawings are for illustrative purposes only and should not be construed as limiting the scope of this invention. To better illustrate the following embodiments, some components in the drawings may be omitted, enlarged, or reduced, and do not represent the actual dimensions of the product. It is understandable to those skilled in the art that some well-known structures and their descriptions may be omitted in the drawings.

[0022] Example 1 This embodiment provides a DC / AC inverter topology circuit based on coupled inductors, including: A power module includes at least two power groups, each power group containing no less than four power transistors. Each power group includes two parallel power group paths: a first path and a second path. Each power group path includes at least two series-connected power transistors. The drive control module contains several drive control units, each of which corresponds to a power group and can be controlled independently. In the power group, the DC side of each power group path is connected in parallel to the DC bus, and its AC side is connected to the AC output terminal through its corresponding coupling inductor. The drive control module provides drive control signals with the same waveform but with a certain phase difference to each other for all power groups. The connection points on the AC side of the power group path are located between the power transistors connected in series in each power group path. In the power module, the AC side of the first path in two adjacent power groups is simultaneously connected to the same side of the coupling inductor, and the AC side of the second path in two adjacent power groups is simultaneously connected to the same side of the coupling inductor.

[0023] Specifically, by designing the power modules as a modular structure with parallel DC-side connections and AC-side outputs via independently coupled inductors, and further applying identical drive waveforms with a fixed phase difference, the autonomous current sharing effect among the power modules is achieved by utilizing the current superposition characteristics of the coupled inductors and the principle of interleaved parallel connection, eliminating the dependence on the consistency of power transistor parameters. At the same time, the physical separation layout design of the power groups improves the system's heat dissipation distribution and overcomes the limitations of centralized layout. In addition, by using the technique of interleaved drive to increase the equivalent switching frequency, the volume of the coupled inductors is significantly reduced and the core loss is decreased, thereby improving the system's power density while optimizing overall efficiency and expansion flexibility.

[0024] Furthermore, when the number of power groups is n, the number of coupling inductors is 2n-2. By allowing adjacent power groups to share coupling inductors, and by utilizing the magnetic coupling characteristics based on coupling inductors and the delay characteristics of phase interleaving between power groups, the total number of coupling inductors used in the DC / AC inverter circuit is reduced. At the same time, the balance of current in each power group path and ripple suppression are ensured, the overall circuit layout is improved in terms of compactness, the utilization efficiency of magnetic devices is increased, and the device cost and system size are reduced.

[0025] Furthermore, within the same power group, the two power group paths are connected via a pair of complementary switching power transistors. By using a pair of complementary switching power transistors to connect the two power group paths within the same power group, and based on the alternating on and off characteristics of the complementary switching power transistors, flexible switching and coordinated control of the two paths within the power group is achieved. This ensures the integrity and smoothness of the current path during different half-cycles, improves the stability of the power conversion process, and enhances the utilization efficiency of the power transistors and the reliability of circuit operation.

[0026] Furthermore, when the number of drive control units and power groups is N, the phase difference between the drive control signals received by the power groups is 360° / N. By utilizing the principle of multi-phase interleaved superposition, the output current ripple frequency is increased to N times that of a single module, thereby significantly reducing the volume and loss of the coupled inductor and improving the system power density and efficiency.

[0027] Furthermore, in the power module, all power groups have the same connection structure; by setting the electrical parameters of each power group branch to be symmetrical, the uneven current distribution caused by structural differences is eliminated by utilizing the principle of topology consistency, thereby improving the reliability of system current sharing and the convenience of modular expansion.

[0028] Furthermore, it also includes an output filter capacitor connected in parallel at the AC output terminal; by utilizing the characteristic that the capacitor voltage cannot change abruptly to absorb the high-frequency switching ripple current, combined with the filtering effect of the coupling inductor, the output voltage waveform is effectively smoothed, and forced current sharing is further realized on the AC output side, reducing the impact of power transistor device consistency.

[0029] Furthermore, all power groups are connected to the same coupling inductor with a consistent differential-mode inductance value. Specifically, by ensuring that the differential-mode inductance values ​​of all coupling inductors are strictly consistent, it is ensured that each power group exhibits equal impedance characteristics under the same phase difference drive. By utilizing the forced current sharing mechanism of electromagnetic coupling, automatic current balancing between multiple modules is achieved, reducing the dependence on the consistency of power transistor parameters.

[0030] Furthermore, in the drive control module, the drive control signal is an SPWM signal; specifically, sinusoidal pulse width modulation technology is used to precisely control the switching timing of each power group, and a high-quality sine wave is synthesized by combining a phase interleaving strategy, which further improves the harmonic distortion and waveform accuracy of the output voltage.

[0031] Example 2 like Figure 1As shown, this embodiment also provides a DC / AC inverter topology circuit based on coupled inductors. The difference from embodiment 1 is that the power module includes two power groups with the same connection structure: a first power group and a second power group. Both the first power group and the second power group contain 6 power transistors. The drive control module includes two drive control units corresponding to the first power group and the second power group, respectively, and transmits drive control signals to the first power group and the second power group, respectively, and the drive control signal received by the second power group is 180° out of phase with respect to the first power group.

[0032] Furthermore, the first power group includes power transistors Q1, Q2, Q3, Q4, Q5, and Q6; The second power group includes power transistors Q11, Q22, Q33, Q44, Q55, and Q66. In the first power group, the input terminal of power transistor Q1 is connected to the positive terminal of the DC power supply, and the output terminal is connected to the input terminal of the coupling inductor L1. At the same time, the output terminal of power transistor Q1 is also connected to the input terminal of power transistor Q4 and further connected to the negative terminal of the DC power supply. The input terminal of power transistor Q2 is connected to the positive terminal of the DC power supply, and the output terminal is connected to the input terminal of the coupling inductor L2. At the same time, the output terminal of power transistor Q2 is also connected to the input terminal of power transistor Q3 and further connected to the negative terminal of the DC power supply. The output terminals of power transistor Q1 and power transistor Q2 are connected in series through power transistors Q6 and Q5. In the second power group, the input terminal of power transistor Q11 is connected to the positive terminal of the DC power supply, and the output terminal is connected to the input terminal of the coupling inductor L1. At the same time, the output terminal of power transistor Q11 is also connected to the input terminal of power transistor Q44 and further connected to the negative terminal of the DC power supply. The input terminal of power transistor Q22 is connected to the positive terminal of the DC power supply, and the output terminal is connected to the input terminal of the coupling inductor L2. At the same time, the output terminal of power transistor Q22 is also connected to the input terminal of power transistor Q33 and further connected to the negative terminal of the DC power supply. The output terminals of power transistor Q11 and Q22 are connected in series through power transistors Q66 and Q55. The output terminal of the coupling inductor L1 is connected to one end of the filter capacitor C1, and the output terminal of the coupling inductor L2 is connected to the other end of the filter capacitor C1.

[0033] In this embodiment, in the first power group, power transistors Q1 and Q4 are connected in series to form a first path, and power transistors Q2 and Q3 are connected in series to form a second path. The two paths of the power group are connected in series via power transistors Q6 and Q5. In the second power group, power transistors Q11 and Q44 are connected in series to form a first path, and power transistors Q22 and Q33 are connected in series to form a second path. The two paths of the power group are connected in series via power transistors Q66 and Q55. In both the first and second power groups, power transistors Q6 and Q5, and Q66 and Q55, participate in the loop control of their respective power group paths through their own conduction and cutoff, helping to adjust parameters such as current and voltage in the power group paths. This makes the power conversion process more stable and efficient, and also helps to achieve current sharing among the power transistors, improving the overall performance of the power group. Furthermore, by having two paths within the same power group operate alternately under drive signal control, current flows through the corresponding coupled inductor from different paths within the power group under different operating modes, thereby achieving current sharing within the group. Simultaneously, by having each power group drive and control independently with a 180° phase difference between the drive signals, the current paths of the two power groups are dispersed in time. Furthermore, the magnetic coupling characteristics of the coupled inductor are used to balance the current between different paths and power groups, thus achieving good current sharing without the need for strict matching of power transistor parameters.

[0034] Furthermore, during the positive half-cycle of the AC voltage: The power transistors Q1 and Q3 of the first power group and the power transistors Q11 and Q33 of the second power group are kept in synchronous switching. The switching actions of power transistors Q1 and Q3 in the first power group and power transistors Q11 and Q33 in the second power group are complementary to the switching states of power transistor Q5 in the first power group and power transistor Q55 in the second power group. The power transistor Q6 of the first power group and the power transistor Q66 of the second power group are kept on by normal operation. During the negative half-cycle of the AC voltage: The power transistors Q2 and Q4 of the first power group are switched synchronously with the power transistors Q22 and Q44 of the second power group. The switching actions of power transistors Q2 and Q4 in the first power group and power transistors Q22 and Q44 in the second power group are complementary to the switching states of power transistors Q6 in the first power group and Q66 in the second power group. The power transistor Q5 of the first power group and the power transistor Q55 of the second power group remain constantly on.

[0035] In this embodiment, by time-division multiplexing the power transistor group during the positive and negative half-cycles of AC voltage operation, and combining the complementary and normally-on combination control modes between the power transistors in the same group, the synergistic effect of the interleaved drive of the two power modules and the coupled inductor is fully utilized to achieve switching loss optimization and current ripple suppression. Specifically, during the positive half-cycle of the AC voltage, power transistors Q1 / Q3 (and their mirror group Q11 / Q33) and the complementary power transistor Q5 form a high-frequency switching pair, while power transistor Q6 (power transistor Q66) is normally on, providing a low-impedance path. During the negative half-cycle, the switching occurs symmetrically with Q2 / Q4 (and their mirror group Q22 / Q44) and the complementary power transistor Q6 (power transistor Q66). This design disperses the thermal stress of the circuit by periodically rotating the roles of the power transistor groups, i.e., alternating between switching and normally on transistors. Combined with synchronous control with a 180-degree phase difference, the ripple phase of the two current groups is canceled in the coupling inductor, increasing the equivalent switching frequency to twice that of a single group. This significantly reduces the output filtering requirements and improves system efficiency while reducing the switching losses of a single power transistor.

[0036] Example 3 like Figure 2 As shown, this embodiment also provides a DC / AC inverter topology circuit based on coupled inductors. The difference from embodiment 2 is that the power module includes three power groups with the same connection structure: a first power group, a second power group, and a third power group. Each of the first power group, the second power group, and the third power group contains 6 power transistors. The drive control module includes three drive control units corresponding to the first power group, the second power group and the third power group respectively, and transmits drive control signals to the first power group, the second power group and the third power group respectively. The drive control signals received by the second power group and the third power group are respectively lagging behind the first power group by 120° and 240° phase.

[0037] Furthermore, the first power group includes power transistors Q1, Q2, Q3, Q4, Q5, and Q6; The second power group includes power transistors Q11, Q22, Q33, Q44, Q55, and Q66. The third power group includes power transistors Q111, Q222, Q333, Q444, Q555, and Q666. In the first power group, the input terminal of power transistor Q1 is connected to the positive terminal of the DC power supply, and the output terminal is connected to the input terminal of the coupling inductor L1. At the same time, the output terminal of power transistor Q1 is also connected to the input terminal of power transistor Q4 and further connected to the negative terminal of the DC power supply. The input terminal of power transistor Q2 is connected to the positive terminal of the DC power supply, and the output terminal is connected to the input terminal of the coupling inductor L2. At the same time, the output terminal of power transistor Q2 is also connected to the input terminal of power transistor Q3 and further connected to the negative terminal of the DC power supply. The output terminals of power transistor Q1 and power transistor Q2 are connected in series through power transistors Q6 and Q5. In the second power group, the input terminal of power transistor Q11 is connected to the positive terminal of the DC power supply, and its output terminal is also connected to the input terminals of coupling inductors L1 and L11 respectively. At the same time, the output terminal of power transistor Q11 is also connected to the input terminal of power transistor Q44 and further connected to the negative terminal of the DC power supply. The input terminal of power transistor Q22 is connected to the positive terminal of the DC power supply, and its output terminal is also connected to the input terminals of coupling inductors L2 and L22 respectively. At the same time, the output terminal of power transistor Q22 is also connected to the input terminal of power transistor Q33 and further connected to the negative terminal of the DC power supply. The output terminals of power transistor Q11 and Q22 are connected in series through power transistors Q66 and Q55. In the third power group, the input terminal of power transistor Q111 is connected to the positive terminal of the DC power supply, and the output terminal is connected to the input terminal of coupling inductor L11. At the same time, the output terminal of power transistor Q111 is also connected to the input terminal of power transistor Q444 and further connected to the negative terminal of the DC power supply. The input terminal of power transistor Q222 is connected to the positive terminal of the DC power supply, and the output terminal is connected to the input terminal of coupling inductor L22. At the same time, the output terminal of power transistor Q222 is also connected to the input terminal of power transistor Q333 and further connected to the negative terminal of the DC power supply. The output terminals of power transistor Q111 and power transistor Q222 are connected in series through power transistors Q666 and Q555. The output terminals of coupling inductors L1 and L11 are simultaneously connected to one end of filter capacitor C1, and the output terminals of coupling inductors L2 and L22 are simultaneously connected to the other end of filter capacitor C1.

[0038] In this embodiment, in the first power group, power transistors Q1 and Q4 are connected in series to form a first path, power transistors Q2 and Q3 are connected in series to form a second path, and the two paths of the power group are connected in series through power transistors Q6 and Q5; in the second power group, power transistors Q11 and Q44 are connected in series to form a first path, power transistors Q22 and Q33 are connected in series to form a second path, and the two paths of the power group are connected in series through power transistors Q66 and Q55; in the third power group, power transistors Q111 and Q444 are connected in series to form a first path, power transistors Q222 and Q333 are connected in series to form a second path, and the two paths of the power group are connected in series through power transistors Q666 and Q555. In the first, second, and third power groups, power transistors Q6 and Q5, Q66 and Q55, and Q666 and Q555 participate in the loop control of the corresponding power group path through their own conduction and turn-off, helping to adjust the current, voltage, and other parameters in the power group path, making the power conversion process more stable and efficient. At the same time, it also helps to achieve current sharing among the power transistors and improve the overall performance of the power group. Furthermore, by controlling the two paths within the same power group to work alternately via drive signals, current flows through the corresponding coupled inductors from different paths within the power group under different operating modes, thereby achieving path current sharing within the group. Simultaneously, by enabling each power group to be driven and controlled independently, with drive signal phase differences of 0°, 120°, and 240° respectively, combined with the shared connection of coupled inductors, automatic current sharing between power groups is achieved. Specifically, the independent control mode allows each power group to adjust its current autonomously, and the phase interleaving disperses the current paths of each power group in time. The coupled inductors utilize magnetic coupling characteristics to balance the current between different paths and power groups, thus achieving good current sharing without strictly matching power transistor parameters.

[0039] Furthermore, during the positive half-cycle of the AC voltage: The power transistors Q1 and Q3 of the first power group, Q11 and Q33 of the second power group, and Q111 and Q333 of the third power group maintain synchronous switching. The switching actions of power transistors Q1 and Q3 in the first power group, Q11 and Q33 in the second power group, and Q111 and Q333 in the third power group are complementary to the switching states of power transistors Q5 in the first power group, Q55 in the second power group, and Q555 in the third power group. The power transistors Q6 and Q66 of the first power group, and Q666 of the second power group, remain normally on. During the negative half-cycle of the AC voltage: Synchronous switching of power transistors Q2 and Q4 in the first power group, power transistors Q22 and Q44 in the second power group, and power transistors Q222 and Q444 in the third power group; The switching actions of power transistors Q2 and Q4 in the first power group, Q22 and Q44 in the second power group, and Q222 and Q444 in the third power group are complementary to the switching states of power transistors Q6 in the first power group, Q66 in the second power group, and Q666 in the third power group. The power transistors Q5 in the first power group, Q55 in the second power group, and Q555 in the third power group remain constantly on.

[0040] In this embodiment, during the positive half-cycle of the AC voltage, power transistors Q1 / Q3, Q11 / Q33, and Q111 / Q333 form a high-frequency switching group, which, together with complementary power transistors Q5, Q55, and Q555, forms a switching pair. Simultaneously, power transistors Q6, Q66, and Q666 are normally on, providing a low-impedance path. During the negative half-cycle, the switching group switches to symmetrical operation with Q2 / Q4, Q22 / Q44, and Q222 / Q444, along with complementary transistors Q6, Q66, and Q666. This design, through the periodic role rotation of the power transistor group, allows the switching transistors / normally on transistors to alternate, thereby further dispersing the thermal stress of the circuit operation. Combined with synchronous control of a 120° phase difference, the three sets of currents achieve ripple phase cancellation in the coupled inductor, increasing the equivalent switching frequency to three times that of a single group. This significantly reduces the output filtering requirement and improves system efficiency while reducing the switching losses of a single power transistor.

[0041] Example 4 This embodiment provides a DC / AC inverter device, wherein the DC / AC inverter device is provided with any of the DC / AC inverter topologies provided in Embodiments 1 to 3.

[0042] Obviously, the embodiments of this utility model are merely examples for clearly illustrating the technical solution of this utility model, and are not intended to limit the specific implementation of this utility model. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the claims of this utility model should be included within the protection scope of the claims of this utility model.

Claims

1. A DC / AC inverter topology circuit based on coupled inductors, characterized in that, include: A power module includes at least two power groups, each power group containing no less than four power transistors. Each power group includes two parallel power group paths: a first path and a second path. Each power group path includes at least two power transistors connected in series. The drive control module includes several drive control units, each of which corresponds to one of the power groups and is independently controlled. In the power group, the DC side of each power group path is connected in parallel to the DC bus, and its AC side is connected to the AC output terminal through its corresponding coupling inductor. The drive control module provides drive control signals with the same waveform but with a certain phase difference to each power group. The connection points on the AC side of the power group path are located between the power transistors connected in series in each power group path. In the power module, the AC side of the first path in two adjacent power groups is simultaneously connected to the same side of the coupling inductor, and the AC side of the second path in two adjacent power groups is simultaneously connected to the same side of the coupling inductor.

2. The DC / AC inverter topology circuit according to claim 1, characterized in that, When the number of power groups is n, the number of coupled inductors is 2n-2.

3. The DC / AC inverter topology circuit according to claim 1, characterized in that, Within the same power group, two power group paths are connected by a pair of complementary switching power transistors.

4. The DC / AC inverter topology circuit according to claim 1, characterized in that, When the number of drive control units and power groups is N, the phase difference between the drive control signals received by the power groups is 360° / N.

5. The DC / AC inverter topology circuit according to claim 1, characterized in that, In the power module, all power groups have the same connection structure.

6. The DC / AC inverter topology circuit according to claim 1, characterized in that, It also includes an output filter capacitor, which is connected in parallel to the AC output terminal.

7. The DC / AC inverter topology circuit according to claim 1, characterized in that, All power groups connected to the corresponding coupling inductors have a consistent differential mode inductance value.

8. The DC / AC inverter topology circuit according to claim 1, characterized in that, In the drive control module, the drive control signal is an SPWM signal.

9. The DC / AC inverter topology circuit according to any one of claims 1-8, characterized in that, The power module includes a first power group and a second power group, and both the first power group and the second power group contain 6 power transistors. The drive control module includes two drive control units corresponding to the first power group and the second power group respectively, and transmits drive control signals to the first power group and the second power group respectively, and the drive control signal received by the second power group is 180° phase lagging behind the first power group. The first power group includes power transistors Q1, Q2, Q3, Q4, Q5, and Q6. The second power group includes power transistors Q11, Q22, Q33, Q44, Q55, and Q66. In the first power group, the input terminal of power transistor Q1 is connected to the positive terminal of the DC power supply, and the output terminal is connected to the input terminal of the coupling inductor L1. At the same time, the output terminal of power transistor Q1 is also connected to the input terminal of power transistor Q4 and further connected to the negative terminal of the DC power supply. The input terminal of power transistor Q2 is connected to the positive terminal of the DC power supply, and the output terminal is connected to the input terminal of the coupling inductor L2. At the same time, the output terminal of power transistor Q2 is also connected to the input terminal of power transistor Q3 and further connected to the negative terminal of the DC power supply. The output terminal of power transistor Q1 and the output terminal of power transistor Q2 are connected in series through power transistors Q6 and Q5. In the second power group, the input terminal of power transistor Q11 is connected to the positive terminal of the DC power supply, and the output terminal is connected to the input terminal of the coupling inductor L1. At the same time, the output terminal of power transistor Q11 is also connected to the input terminal of power transistor Q44 and further connected to the negative terminal of the DC power supply. The input terminal of power transistor Q22 is connected to the positive terminal of the DC power supply, and the output terminal is connected to the input terminal of the coupling inductor L2. At the same time, the output terminal of power transistor Q22 is also connected to the input terminal of power transistor Q33 and further connected to the negative terminal of the DC power supply. The output terminal of power transistor Q11 and the output terminal of power transistor Q22 are connected in series through power transistors Q66 and Q55. The output terminal of the coupling inductor L1 is connected to one end of the filter capacitor C1, and the output terminal of the coupling inductor L2 is connected to the other end of the filter capacitor C1.

10. A DC / AC inverter, characterized in that, It includes the DC / AC inverter topology circuit as described in any one of claims 1-9.

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