Interlock detector with self-diagnostic function for an interlock circuit and a method for self-diagnosis of the interlock detector.

Abstract

An interlock detector system with self-diagnostic function comprising an interlock circuit (60), an interlock generator (40), a microprocessor (30) and an interlock detector (50), which includes: a first input (48) for supplying an output signal of an interlock generator (40), an output (46) to provide an output signal to a microprocessor (30), a differential amplifier (20) whose first and second inputs are connected to the first input (48) of the interlock detector (50), a comparator circuit (10) whose input is connected to the output of the differential amplifier (20) and whose output is connected to the output (46) of the interlock detector (50), characterized in that the interlock detector (50) has at least one second input (44) for being supplied with a diagnostic signal, wherein the at least one second input (44) is connected to the input of the comparator circuit (10), between comparator circuit (10) and differential amplifier (20), and / or the diagnostic signal is connected to one of the first or second inputs of the differential amplifier (20) between the first input (48) of the interlock detector (50) and the differential amplifier (20), wherein the first input (48) of the interlock detector (50) is connected to the interlock generator (40) and the output (46) of the interlock detector (50) is connected to the microprocessor (30) for evaluating the output signals of the interlock detector (50), wherein the microprocessor (30) is connected to the at least one second input (41, 42, 43, 44) of the interlock detector (50) for providing a signal for diagnosing the interlock detector (50).

Description

[0001] The present invention relates to an interlock detector for an interlock circuit, implemented in a battery control unit, which enables a functional test / diagnosis of itself, even when the interlock circuit is interrupted and without the presence of external (generator) signals. State of the art

[0002] From DE 10 2010 031 456 a method for the safety-related shutdown of an electrical network is known, in which an interlock circuit (also called safety line loop, interlock or pilot line or interlock or pilot line) is used, upon the interruption of which an electrical energy source belonging to the electrical network is switched off or disconnected from the electrical network if there is a risk of danger to persons from live parts.

[0003] For example, in electrical networks, such as those in vehicles, with a nominal voltage exceeding 60 volts, an interlock circuit designed as a signal loop is used. The interlock signal is usually generated by an interlock generator in a power source (such as a battery) that supplies the electrical network with power. The signal is passed through all plugs in the electrical network and all components connected to the network, i.e., via passive and / or active interlock devices. The system is designed so that if a plug connection or a cover that prevents access to live parts is opened, the interlock circuit is automatically interrupted. The signal is evaluated by all network devices that act as a power source.If the interlock circuit is interrupted, each of these components shuts off the power supply to the grid and, if necessary, discharges the grid. The time typically required between the interruption of the interlock circuit and the shutdown of the grid protected by it is in the range of less than one second.

[0004] Usually, at the end or at another position of such an interlock circuit there is an interlock detector which is implemented in a battery control unit, evaluates the interlock signal and feeds this evaluation to the battery control unit.

[0005] Fig. Figure 1 shows a schematic diagram of such an interlock detector, implemented in a prior art interlock detector system. The interlock detector 50 is connected to an interlock circuit 60 and a microprocessor 30. An interlock generator 40 generates an interlock signal 26 in the interlock circuit 60, which is routed within the interlock circuit 60 via an interlock circuit resistor 14, a measuring resistor 4, and optionally additional active and / or passive interlock participants 7. The interlock signal 26 causes a defined voltage drop across the measuring resistor 4 of the interlock circuit 60.This defined voltage drop is tapped via a differential amplifier 20, consisting of an operational amplifier 12, which has a resistor 3, 6, 8 in each of its two input branches and in its feedback branch. If necessary, it is adjusted to the signal level to be evaluated using an offset voltage Uref1 at an input branch of the operational amplifier 12, and amplified. The amplified signal is fed to a comparator circuit 10 via the output 13 of the differential amplifier 20. The comparator circuit 10 consists of two operational amplifiers 16, 18, in which an input of one operational amplifier 16 is linked to an input of the other operational amplifier 18.The signal fed from the differential amplifier 20 to this link 13 is compared by the first operational amplifier 16 of the comparator circuit 10 with an upper limit value Uref2, which is fed to the unlinked input of the operational amplifier 16. The signal resulting from the evaluation of the comparison is fed directly to the microprocessor 30 via the output 9 of the operational amplifier 16 of the comparator circuit 10. The signal fed from the differential amplifier 20 to the link 13 is compared by the second operational amplifier 18 of the comparator circuit 10 with a lower limit value, which is fed to the unlinked input of the operational amplifier 18. The signal resulting from the evaluation of the comparison is fed directly to the microprocessor 30 via the output 24 of the operational amplifier 18 of the comparator circuit 10.In this, the received signals are then evaluated within a time interval and compared with a target value.

[0006] The document DE 10 2006 055 315 A1 discloses a monitoring device for a power line with a first line section and a second line section, wherein the first and the second line section are connected in series, comprising a measuring device which is designed to provide a first measuring signal depending on a current flowing through the first line section and a second measuring signal depending on a voltage drop across the second line section, an evaluation device which is designed to provide a monitoring signal depending on the first and the second measuring signal, wherein the monitoring signal can be used to indicate by means of a first monitoring value that the power line is free of faults and by means of a second monitoring value that the power line is faulty. Disclosure of the invention

[0007] The interlock detector according to the invention comprises a first input for receiving an output signal from an interlock generator, an output for providing an output signal to a microprocessor, a differential amplifier whose first and second inputs are connected to the first input of the interlock detector, and a comparator circuit whose input is connected to the output of the differential amplifier and whose output is connected to the output of the interlock detector. Furthermore, the interlock detector has at least one second input for receiving a diagnostic signal, wherein the at least one second input is connected to the input of the comparator circuit, between the comparator circuit and the differential amplifier, and / or is connected to one of the first or second inputs of the differential amplifier between the first input of the interlock detector and the differential amplifier.

[0008] The advantage of the interlock detector according to the invention lies in the ability to check the functionality or integrity of individual components or the entire interlock detector, even without a connection between the interlock detector and the interlock circuit or the interlock generator, by feeding diagnostic signals via the second inputs of the interlock detector. Circuit components of the interlock detector can be stimulated individually and continuously via the diagnostic signals, thus checking their functionality or integrity. This eliminates the need for the interlock detector to interact with the interlock generator for testing purposes, and the function of the interlock detector can be checked even when the battery is removed, i.e., when the interlock circuit is open.

[0009] In a preferred embodiment, the interlock detector has several, preferably four, second inputs, two of which are connected to the first or second input of the differential amplifier, between the first input of the interlock detector and the differential amplifier. A third second input is connected via the first or second input of the differential amplifier to the first input of the interlock detector or to the connector between the first input of the interlock detector and the inputs of the differential amplifier. The remaining second input is connected to the input of the comparator circuit, between the comparator circuit and the differential amplifier, or to the connector between the comparator circuit and the differential amplifier.With such an embodiment, the comparator thresholds of the comparator circuit can be specifically controlled in small steps, thus precisely testing the function of the comparator circuit. Using additional diagnostic signals, for example, the inputs of the differential amplifier and the interlock detector can be checked for functionality. Alternatively or additionally, the offset voltage fed to an input of the differential amplifier can be included in the test via a diagnostic signal. Via the connection between the second and first inputs of the interlock detector, the first input of the interlock detector, which in one embodiment can be implemented by a measuring resistor and the two inputs of the differential amplifier, can be checked for functionality or integrity.

[0010] Preferably, the connection between the input of the comparator circuit and the output of the differential amplifier can be interrupted via an additional switching means for diagnosing the comparator circuit.

[0011] Preferably, the additional switching means for interrupting the connection between the input of the comparator circuit and the output of the differential amplifier is located downstream of the output of the differential amplifier and upstream of the connection between the second input and the input of the comparator circuit. Opening the switching means between the input of the comparator circuit and the output of the differential amplifier ensures that the diagnostic signal fed into the input of the comparator circuit cannot be influenced by the differential amplifier or by interference signals emanating from it.

[0012] In a preferred embodiment, electrical connection paths between the second inputs of the interlock detector and the input of the comparator circuit and / or the inputs of the differential amplifier or the first input of the interlock detector are each provided with at least one switching device. Such a circuit arrangement offers a wide diagnostic scope, which can be reduced or increased by opening or closing the switching devices in the electrical connection paths. Thus, by closing the switching devices, individual diagnostic signals can be added and superimposed with other diagnostic signals, while opening the switching devices can exclude certain diagnostic signals from the diagnosis.

[0013] Preferably, an input of the differential amplifier has an additional terminal for applying an offset voltage. Such an offset voltage can be used to adjust the input signal of the differential amplifier to a specific signal level to be evaluated by the comparator circuit.

[0014] Preferably, the output of the interlock detector is formed by the two outputs of the comparator circuit, which are directly connected to the microprocessor. The advantage of such an implementation is the direct, low-loss transmission of the output signals of the comparator circuit to the microprocessor, without the need for any "post-processing" of the signals in intermediate units. The comparison of the signal received from a differential amplifier with, for example, a reference signal is thus performed entirely in the comparator circuit, saving the microprocessor computational effort and thus saving costs and space for the microprocessor implementation.

[0015] In a preferred embodiment, an interlock detector system is realized with an interlock circuit, an interlock generator, an interlock detector and a microprocessor, wherein the first input of the interlock detector is connected to the interlock generator and the output of the interlock detector is connected to the microprocessor for evaluating the output signals of the interlock detector, wherein the microprocessor is connected to the at least one second input of the interlock detector for providing a signal for diagnosing the interlock detector.

[0016] The advantage of such a system is that the generation of diagnostic signals and their evaluation are combined in a single digital signal processing system, the microprocessor. This allows for more precise evaluation, as fluctuations in the diagnostic signals themselves or in their generation can be taken into account during the evaluation. Furthermore, two data processing systems are not required in the circuitry, thus saving costs and space.

[0017] In a preferred further development of the above embodiment of the interlock detector system, the microprocessor is configured to generate the diagnostic signals for the interlock detector directly or to generate the diagnostic signals via pulse-width modulation signals and a low-pass filter between the microprocessor and the second input of the interlock detector. The advantage of generating the analog signal in this way lies in the type of signal generation itself. The analog signal is generated with low loss, via "low and high levels," which means less energy is required for signal generation.

[0018] Preferably, at least one switching device is located between the first input of the interlock detector and the interlock generator of the interlock detector system. By opening the switching device, the interlock detector can be decoupled from the interlock generator and the interlock circuit. This is advantageous, for example, during the input of a diagnostic signal, since interference with the diagnostic signal from the interlock circuit or the interlock generator can be excluded by opening the switching device.

[0019] Preferably, the first input of the interlock detector is formed by the two inputs of the differential amplifier, which tap the input voltage of the interlock detector via a measuring resistor located in the interlock circuit.

[0020] Furthermore, a method for self-diagnosis of an interlock detector system is provided, which comprises an interlock circuit, an interlock generator, an interlock detector having a first input for receiving an output signal from an interlock generator, an output for providing an output signal to a microprocessor, a differential amplifier whose first and second inputs are connected to the first input of the interlock detector, and a comparator circuit whose input is connected to the output of the differential amplifier and whose output is connected to the output of the interlock detector, and a microprocessor. The method comprises the following method steps: Isolating the interlock detector from the interlock circuit by opening at least one switching means. Generating a diagnostic signal for the interlock detector by the microprocessor.Feeding a diagnostic signal via at least a second input of the interlock detector into the input of the comparator circuit, between the comparator circuit and the differential amplifier and / or at least one input of the differential amplifier, between the differential amplifier and the first input of the interlock detector and evaluating the output signal of the interlock detector in the microprocessor.

[0021] In a preferred further development of the above method for self-diagnosis of an interlock detector system, the method further comprises the step of isolating the comparator circuit from the differential amplifier.

[0022] Preferably, a battery with an interlock detector according to the invention is implemented, with the battery particularly preferably being embodied as a lithium-ion battery. The advantage of lithium-ion batteries is their comparatively high energy density.

[0023] Preferably, a motor vehicle is realized with a battery having an interlock detector according to the invention, wherein the battery is connected to a drive system of the motor vehicle. Drawings

[0024] Embodiments of the invention are explained in more detail with reference to the drawings and the following description. They show: Fig. 1 a schematic diagram of an interlock detector, implemented in an interlock detector system according to the state of the art, Fig. 2 a schematic diagram of an interlock detector according to the invention, and Fig. 3 a special embodiment of the interlock detector system with interlock detector.

[0025] Fig. 2 shows a basic circuit diagram of an interlock detector 50 according to the invention. The interlock detector 50 has a first input 48, with which the output signal of an interlock generator can be tapped, and an output 46, with which the output signal can be transmitted to a microprocessor. The first input 48 is linked to the first and second inputs of a differential amplifier 20. The output of the differential amplifier 20 is connected to the input of a comparator circuit 10. The output of the comparator circuit 10 is connected to the output 46 of the interlock detector 50. Furthermore, the interlock detector 50 according to the invention shown has, purely by way of example, four further, second inputs 41, 42, 43, 44, via which diagnostic signals can be fed into the circuit.Two second inputs 41, 42 of the interlock detector 50 are connected to one of the first or second inputs of the differential amplifier 20 between the input 48 of the interlock detector 50 and the differential amplifier 20. A third second input 43 is connected via the first or second input of the differential amplifier 20 to the first input 48 of the interlock detector 50 or to the connecting piece between the first input 48 of the interlock detector 50 and the inputs of the differential amplifier 20. The remaining second input 44 is connected to the input of the comparator circuit 10 between the comparator circuit 10 and the differential amplifier 20 or to the connecting piece between the comparator circuit 10 and the differential amplifier 20. Optionally, the third second input 43 is connected directly to the first input 48 of the interlock detector 50.

[0026] The invention thus relates to an interlock detector 50, to whose first input 48 the output signal of an interlock generator is fed. The output signal of the interlock generator is transmitted to a differential amplifier 20, whose two inputs are connected to the first input 48 of the interlock detector 50. The output of the differential amplifier 20 is connected to the input of a comparator circuit 10, which compares the amplified input signal transmitted by the differential amplifier 20 with a reference value. The output of the comparator circuit 10 is connected to the output 46 of the interlock detector 50, to which the comparator circuit 10 transmits its output signal. Diagnostic signals can be fed to various points of the interlock detector 50 via four second inputs 41, 42, 43, 44 of the interlock detector 50.Two second inputs 41, 42 are preferably connected to one of the first or second inputs of the differential amplifier 20 between the first input 48 of the interlock detector 50 and the differential amplifier 20 and can be used to feed a diagnostic signal into the respective input of the differential amplifier 20. A third second input 43 is connected via the first or second input of the differential amplifier 20 to the first input 48 of the interlock detector 50 or to the connecting piece between the first input 48 of the interlock detector 50 and the two inputs of the differential amplifier 20. It can be used to diagnose this first input 48.Preferably, a second input 44 is connected to the input of the comparator circuit 10, between the comparator circuit 10 and the differential amplifier 20, or to the connecting piece between the comparator circuit 10 and the differential amplifier 20, for feeding a diagnostic signal into the input of the comparator circuit 10. However, there may also be only one second input, two second inputs, or three second inputs in any combination.

[0027] Fig. 3 shows a special embodiment of the interlock detector system with interlock detector 50. An interlock detector 50 according to the invention is shown in a special embodiment, including an interlock circuit 60 with interlock generator 40, interlock signal 26, interlock circuit resistor 14, two switching means 32, 33, with which the interlock circuit 60 can be decoupled from the interlock detector 50 and not shown interlock participant 7 as well as a microprocessor 30. The comparator circuit 10 and the differential amplifier 20 are as in Fig. 1. The output of the differential amplifier 20 is connected to the first end of a switching means 38, while the second end of the switching means 38 is connected to the input of the comparator circuit 10. The first input 48 and the output 46 of the interlock detector 50 are also connected as shown in Fig. 1, so that the interlock detector 50 is connected to the interlock circuit 60 via the measuring resistor 4 and the comparator circuit 10 is connected to the microprocessor 30 via the two outputs 9, 24 of the two operational amplifiers 16, 18. Furthermore, the Fig. 3, the interlock detector 50 has four further second inputs 41, 42, 43, 44, via which diagnostic signals are fed into the interlock detector system. Purely by way of example, two of the second inputs 41, 42 are each connected via a switching means 35, 36 to one of the first or second inputs of the differential amplifier 20, between the first input 48 of the interlock detector 50 and the differential amplifier 20. The third second input 43 is connected via a switching means 37 and via the first or second input of the differential amplifier 20 to the first input 48 of the interlock detector 50. The remaining second input 44 is connected via a switching means 34 to the input of the comparator circuit 10, between the comparator circuit 10 and the switching means 38, or to the connecting piece between the comparator circuit 10 and the differential amplifier 20.All second inputs 41, 42, 43, 44 of the interlock detector 50 are connected to the microprocessor 30 via a line resistor 70 and via specifically designed low-pass filters 72, 78. The low-pass filter in the connection to the two second inputs 41, 44 consists of a low-pass resistor 71 located in the connection and a capacitor 73, the first end of which is connected to ground and the second end of which is connected between the line resistor 70 and the low-pass resistor 71, to the respective connection. The low-pass filter in the connection to the other two second inputs 42, 43 consists of a parallel circuit of a low-pass resistor 77 and a capacitor 79, the first ends of which are connected to ground and the second ends of which are connected between the microprocessor 30 and the line resistor 70, to the respective connection.

[0028] For self-diagnosis, the switching means 32, 33 located in the interlock circuit 60 can first be opened, thus decoupling the interlock detector 50 from the interlock circuit 60. Pulse-width-modulated diagnostic signals are generated via the microprocessor 30, purely as an example, which are demodulated via the low-pass filters 72, 78 in the connections and fed to at least one of the second inputs 41, 42, 43, 44 of the interlock detector 50. When the switching means 35, 36 are closed, the diagnostic signals are fed into one of the first or second inputs of the differential amplifier 20, between the first input 48 and the differential amplifier 20. When the switching means 37 is closed, an additional diagnostic signal is fed into the first input 48 of the interlock detector 50, which in this specific embodiment is formed from a measuring resistor 4 and the two inputs of the differential amplifier 20.In this case, the switching means 38 is also closed, so that the diagnostic signal amplified by the differential amplifier 20 can be transmitted via the output of the differential amplifier 20 to the input of the comparator circuit 10. In the comparator circuit 10, the output signal of the differential amplifier 20 is compared with an upper and a lower limit value, and an output signal of the comparator circuit 10 corresponding to the result of the comparison is transmitted to the microprocessor 30. By closing the switching means 34, a diagnostic signal is alternatively or additionally fed into the input of the comparator circuit 10, between the comparator circuit 10 and the differential amplifier 20, or into the connecting piece between the comparator circuit 10 and the differential amplifier 20.If only the functionality of the comparator circuit is to be tested, the connection between comparator circuit 10 and differential amplifier 20 is interrupted by opening switching means 38. The output signal of comparator circuit 10 caused by the diagnostic signals is evaluated in microprocessor 30. Thus, second input 44 is used to test the functionality of comparator circuit 10. With it, for example, the comparator thresholds of comparator circuit 10 can be specifically controlled individually. Second input 41 is used to test the functionality of differential amplifier 20 or to test one of its inputs. Second input 42 can be used to test the other input of differential amplifier 20. Alternatively or additionally, it can also be used to include the offset voltage, which can be fed into the respective input of the differential amplifier, in the test.The second input 43 can be used to check the integrity of the first input of the interlock detector, which in this embodiment is implemented by a measuring resistor 4 and the inputs of the differential amplifier 20. Purely by way of example, . Fig. 3 shows four second inputs. However, there may also be only one second input, two second inputs, or three second inputs in any combination. Preferably, at least one second input 44 is provided for

[0029] Diagnosis of a comparator circuit 10, a second input 41 or 42 for diagnosis of the differential amplifier 20 and a second input 43 for diagnosis of the first input 48 of the interlock detector 50.

Claims

[1] An interlock detector system with self-diagnosis function comprising an interlock circuit (60), an interlock generator (40), a microprocessor (30) and an interlock detector (50), which comprises: a first input (48) for receiving an output signal from an interlock generator (40), an output (46) for providing an output signal to a microprocessor (30), a differential amplifier (20) whose first and second inputs are connected to the first input (48) of the interlock detector (50), a comparator circuit (10) whose input is connected to the output of the differential amplifier (20) and whose output is connected to the output (46) of the interlock detector (50), characterized by , that the interlock detector (50) has at least one second input (44) for applying a diagnostic signal, wherein the at least one second input (44) is connected to the input of the comparator circuit (10), between the comparator circuit (10) and the differential amplifier (20), and / or the diagnostic signal is connected to one of the first or second inputs of the differential amplifier (20) between the first input (48) of the interlock detector (50) and the differential amplifier (20), wherein the first input (48) of the interlock detector (50) is connected to the interlock generator (40) and the output (46) of the interlock detector (50) is connected to the microprocessor (30) for evaluating the output signals of the interlock detector (50), wherein the microprocessor (30) is connected to the at least one second input (41, 42, 43, 44) of the interlock detector (50) for providing a signal for diagnosing the interlock detector (50). [2] The interlock detector system according to claim 1, wherein the interlock detector (50) has a plurality of, preferably four, second inputs (44, 43, 42, 41), two of which (42, 41) are connected to the first or the second input of the differential amplifier (20), between the first input (48) of the interlock detector (50) and the differential amplifier (20), while a third second input (43) is connected to the first input (48) of the interlock detector (50) via the first or second input of the differential amplifier (20), and the remaining second input (44) is connected to the input of the comparator circuit (10), between the comparator circuit (10) and the differential amplifier (20). [3] The interlock detector system according to at least one of the preceding claims, wherein the connection between the input of the comparator circuit (10) and the output of the differential amplifier (20) can be interrupted via an additional switching means (38) for diagnosing the comparator circuit (10). [4] The interlock detector system according to claim 3, wherein the additional switching means (38) is located after the output of the differential amplifier (20) and before the connection of the second input (44) to the input of the comparator circuit (10). [5] The interlock detector system according to at least one of the preceding claims, wherein electrical connection paths between the second inputs (41, 42, 43, 44) of the interlock detector (50) and the input of the comparator circuit (10) and / or the inputs of the differential amplifier (20) are each provided with at least one switching means (34, 35, 36, 37). [6] The interlock detector system according to at least one of the preceding claims, wherein the microprocessor (30) is designed to generate the diagnostic signals for the interlock detector (50) directly or the diagnostic signals can be generated via pulse width modulation signals and a low-pass filter between the microprocessor (30) and the second input (41, 42, 43, 44) of the interlock detector (50). [7] The interlock detector system according to at least one of the preceding claims, wherein at least one switching means (32) is located between the first input (48) of the interlock detector (50) and the interlock generator (40). [8] A method for self-diagnosis of an interlock detector system, comprising an interlock circuit (60), an interlock generator (40), an interlock detector (50) having a first input (48) for receiving an output signal from an interlock generator (40), an output (46) for providing an output signal to a microprocessor (30), a differential amplifier (20) whose first and second inputs are connected to the first input (48) of the interlock detector (50) and a comparator circuit (10) whose input is connected to the output of the differential amplifier (20) and whose output is connected to the output (46) of the interlock detector (50), a microprocessor (30), the method comprising the following method steps: Separating the interlock detector (50) from the interlock circuit (60) by opening at least one switching means (32); Generating a diagnostic signal for the interlock detector (50) by the microprocessor (30); Feeding a diagnostic signal via at least one second input (41, 42, 43, 44) of the interlock detector (50) into the input of the comparator circuit (10), between the comparator circuit (10) and the differential amplifier (20) and / or at least one input of the differential amplifier (20), between the differential amplifier (20) and the first input (48) of the interlock detector (50); Evaluating the output signal of the interlock detector (50) in the microprocessor (30). [9] The method for self-diagnosing an interlock detector system according to claim 8, further comprising the step of isolating the comparator circuit (10) from the differential amplifier (20). [10] A battery with an interlock detector system according to any one of claims 1 to 7. [11] A motor vehicle having a battery according to claim 10, wherein the battery is connected to a drive system of the motor vehicle.

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