A METHOD FOR PRODUCING A SILICON CARBIDE SUBSTRATE FOR AN ELECTRIC SILICON CARBIDE DEVICE
The method of ion implantation and ion cutting allows for the production of silicon carbide substrates with exposed carbon crystal faces, addressing the challenge of high channel mobility and doping control, resulting in high-performance silicon carbide devices with reduced defects and costs.
Patent Information
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- INFINEON TECHNOLOGIES AG
- Filing Date
- 2014-03-14
- Publication Date
- 2026-06-11
AI Technical Summary
Existing silicon carbide device manufacturing processes face challenges in achieving high channel mobility and controlled doping on the carbon crystal face, which is necessary for devices like SiC MOSFETs, due to the high nitrogen incorporation and limited doping control on this surface.
A method involving ion implantation and high-energy ion cutting is used to create a silicon carbide substrate with an epitaxial layer on the silicon crystal face, which is then bonded and divided to expose a carbon crystal face, allowing for the fabrication of devices with low doping density and high channel mobility.
This approach enables the production of silicon carbide devices with enhanced channel mobility and reduced on-resistance, capable of achieving blocking voltages up to 1700 V, while reducing defects and material costs through efficient reuse of donor wafers.
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Abstract
Description
INVENTION AREA
[0001] Embodiments relate to silicon carbide devices and silicon carbide manufacturing processes, and in particular a method for producing a silicon carbide substrate for an electrical silicon carbide device, a silicon carbide substrate and an electrical silicon carbide device. BACKGROUND OF THE INVENTION
[0002] The crystal structure of silicon carbide materials can be described by a sequence of silicon-carbon (Si-C) bilayers along the crystallographic c-axis. Consequently, each SiC substrate wafer sawn perpendicular to the c-axis comprises a silicon face / silicon crystal face (0001) and a carbon face / carbon crystal face (000-1). The active layer required for devices (the drift layer) is typically deposited epitaxially on a silicon carbide substrate wafer. In this context, the thickness and doping can be tailored to the desired device characteristics. Silicon carbide devices (e.g., switches or diodes) are primarily fabricated on the silicon crystal face because doping control (e.g., nitrogen doping during epitaxy) can potentially be better controlled on this side due to site competition.The nitrogen incorporation coefficient, and thus the doping concentration, can be adjusted over a wide range during SiC deposition by the silicon-carbon ratio in the gas phase. A background doping of less than 1 x 10⁻⁶ is possible. 15 cm -3 This can be achieved in a standard SiC epitaxy system without much effort if deposition takes place on the silicon crystal surface. However, epitaxy on the carbon crystal surface of silicon carbide shows an approximately ten times higher nitrogen incorporation with no or only a low dependence on the carbon-silicon ratio, so that achieving the desired doping concentration below 1 x 10 16 cm -3 is only possible with great effort (e.g. very low process pressure and / or high process temperature) or even impossible.
[0003] However, devices manufactured on the C-surface allow (e.g., for a side-mounted SiC MOSFET, silicon carbide metal oxide semiconductor field-effect transistor) a higher channel mobility to be achieved compared to a silicon crystal-surface SiC MOSFET.
[0004] Documents EP 2 100 989 A1, EP 0 612 104 A2, EP 2 221 859 A1, EP 2 750 198 A1, WO 2013 / 031 172 A1, US 7 749 863 B1, US 2012 / 0 181 550 A1, US 2014 / 0 252 373 A1 and “TAKAHASHI, J. [et al.]: Influence of the Seed Face Polarity on the Sublimation Growth of α-SiC. In: Jpn. J. Appl. Phys., Vol. 34, 1995, pp. 4694–4698” describe known semiconductor devices. BRIEF DESCRIPTION OF THE INVENTION
[0005] There is a demand for the provision of a concept for an improved concept for a process for manufacturing a silicon carbide substrate for an electrical silicon carbide device, a silicon carbide substrate and an electrical silicon carbide device.
[0006] Such demand can be met by a method according to claim 1 and a silicon carbide substrate according to claim 20.
[0007] A method for producing a silicon carbide substrate for an electrical silicon carbide device according to one embodiment comprises providing a silicon carbide donor wafer comprising a silicon crystal face and a carbon crystal face. The method further comprises depositing a silicon carbide epitaxial layer on the silicon crystal face of the donor wafer and implanting ions with a predefined energy characteristic to form an implantation zone within the epitaxial layer, such that the ions are implemented at a mean depth within the epitaxial layer corresponding to a predetermined thickness of an epitaxial layer of the silicon carbide substrate to be produced. The method also comprises bonding an acceptor wafer to the epitaxial layer, such that the epitaxial layer is positioned between the donor wafer and the acceptor wafer.Furthermore, the process includes dividing the epitaxial layer along the implantation zone, so that a silicon carbide substrate represented by the acceptor wafer is obtained with an epitaxial layer of the intended thickness.
[0008] Embodiments can be based on the finding that a silicon carbide substrate with an epitaxial layer having a carbon crystal face can be made available for the fabrication of an electrical silicon carbide device by applying a high-energy ion cutting process to an epitaxial layer grown on the silicon face of a silicon carbide wafer and by bonding the silicon crystal face of the epitaxial layer to another wafer. In this way, a silicon carbide substrate with an exposed carbon crystal face of an epitaxial layer can be obtained, even though the epitaxial layer was deposited on a silicon crystal face of a silicon carbide wafer. Such a silicon carbide substrate can permit the fabrication of electrical silicon carbide devices on the carbon crystal face of an epitaxial layer, so that the channel mobility of such a device (e.g.,SiC MOSFET (silicon carbide metal oxide semiconductor field-effect transistor) can be significantly enlarged. Furthermore, a silicon carbide substrate, which has a carbon crystal surface on an epitaxial layer with low doping density (e.g., below 1*10⁻⁵), can be used. 16 cm -3 ) is provided for the manufacture of a device. For example, electrical silicon carbide devices with a blocking voltage exceeding 500 V can be realized based on such silicon carbide substrates.
[0009] In some embodiments, the epitaxial layer is divided by heating it to a temperature between 600 °C and 1300 °C. At such temperatures, the epitaxial layer can divide automatically along the implantation zone due to the merging of hydrogen gas bubbles.
[0010] Some embodiments further include implanting ions into the remaining epitaxial layer on the donor with a different or the same predefined energy characteristic to form another implantation zone within the epitaxial layer, so that the ions are implanted at a mean depth within the remaining epitaxial layer corresponding to a different or the same intended thickness of an epitaxial layer of a further silicon carbide substrate to be produced.Furthermore, the process can include bonding another acceptor wafer to the remaining epitaxial layer, so that the remaining epitaxial layer is positioned between the donor wafer and the additional acceptor wafer, and portions of the remaining epitaxial layer along the implantation zone, thus obtaining another silicon carbide substrate represented by the additional acceptor wafer with an epitaxial layer of the other or the same intended thickness. In this way, a thick epitaxial layer can be deposited initially. This thick epitaxial layer can be used to fabricate two or more silicon carbide substrates. Therefore, it may be sufficient to deposit only one epitaxial layer to fabricate multiple silicon carbide substrates. Additionally, an intermediate surface conditioning step (e.g., CMP) can be performed between two transfer steps.
[0011] In some embodiments, the silicon carbide epitaxial layer can be deposited in such a way that the epitaxial layer has a dopant density of less than 1*10 16 cm -3 This includes [the following]. Devices with high channel mobility and high blocking voltages can be realized on the basis of such a silicon carbide substrate.
[0012] Further embodiments relate to a method for fabricating an electrical silicon carbide device, comprising providing or fabricating a silicon carbide substrate produced according to the concept described above and fabricating the electrical silicon carbide device on the carbon crystal surface of the epitaxial layer of the silicon carbide substrate. In this way, electrical silicon carbide devices with high channel mobility can be obtained.
[0013] Other embodiments relate to a silicon carbide substrate comprising a support wafer, which is a tungsten wafer, a polycrystalline silicon carbide wafer, or a silicon carbide-coated graphite wafer. The silicon carbide substrate further comprises a silicon carbide epitaxial layer attached to the support wafer, which includes a carbon crystal surface facing the support wafer, such that an electrical silicon carbide device can be fabricated on the carbon crystal surface of the epitaxial layer.
[0014] Further embodiments relate to silicon carbide electronic devices comprising a support wafer, a silicon carbide epitaxial layer, and a silicon carbide electronic device structure. The silicon carbide epitaxial layer is attached to the support wafer and comprises a carbon crystal face facing the support wafer and a silicon crystal face opposite the support wafer. The silicon carbide electronic device structure is further fabricated on the carbon crystal face of the epitaxial layer. Such a silicon carbide electronic device can incorporate high channel mobility. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] Some embodiments of devices and / or methods are described below only as examples and with reference to the accompanying figures. These show: Fig. 1 a flowchart of a process for producing a silicon carbide substrate; Fig. 2A a schematic representation of a silicon carbide epitaxy layer deposited on a silicon carbide donor wafer; Fig. 2B a schematic representation of an ion implantation; Fig. 2C a schematic representation of an acceptor wafer bonded to the epitaxial layer; Fig. 2D a schematic representation of a split epitaxial layer; Fig. 2E a schematic representation of a silicon carbide donor wafer with remaining epitaxial layer and a fabricated silicon carbide substrate; Fig. 3 a flowchart of a process for producing a silicon carbide substrate; Fig. 4 a flowchart of a process for manufacturing an electrical silicon carbide device; Fig. 5 a schematic representation of a silicon carbide substrate and Fig. 6 a schematic representation of an electrical silicon carbide device. DETAILED DESCRIPTION
[0016] Several embodiments are now described in more detail with reference to the accompanying drawings, in which some of these embodiments are illustrated. For the sake of clarity, the thicknesses of lines, layers, and / or areas may be exaggerated in the figures.
[0017] While exemplary embodiments are capable of various modifications and alternative forms, corresponding embodiments are shown by way of example in the figures and are described in detail here. In the description of the figures, identical numbers consistently refer to identical or similar elements.
[0018] It is understood that when an element is described as "connected" or "coupled" to another element, it may be directly connected or coupled to that other element, or there may be intermediate elements. Conversely, when an element is described as "directly connected" or "directly coupled" to another element, there are no intermediate elements. Other words used to describe the relationship between elements should be interpreted similarly (e.g., "between" versus "directly between," "at" versus "directly at," etc.).
[0019] The terminology used herein serves the purpose of describing only certain embodiments and is not intended to limit exemplary embodiments. As used herein, the singular forms "a" and "the" are to include the plural forms unless the context clearly indicates otherwise. It is further understood that the expressions "comprises," "comprehensive," "contains," and / or "containing," when used herein, specify the presence of the aforementioned features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.
[0020] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as they would normally be understood by a person skilled in the art in the field to which the embodiments belong. Furthermore, terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology and are not to be interpreted in an idealized or overly formal sense, unless expressly defined otherwise herein.
[0021] Silicon carbide (SiC) occurs in many different crystal structures, also called polytypes. Despite the fact that ideal silicon carbide polytypes chemically comprise 50% carbon atoms and 50% silicon atoms, each silicon carbide polytype exhibits different electrical properties. Although there is a wide variety of polytypes, the most common polytypes used in electronics are cubic 3C-SiC, hexagonal 4H-SiC and 6H-SiC, and rhombohedral 15R-SiC, for example. These polytypes can be characterized by the stacking sequence of the reciprocal layers of the silicon carbide structure.
[0022] For cubic crystals, three Miller indices, hkl, are used to describe the directions and planes within the crystal. These are integers in the same ratio as the reciprocals of the sections with the x, y, and z axes, respectively. For hexagonal structures, four principal axes can be used (a1, a2, a3, and c). However, only three may be necessary to uniquely identify a plane or direction. The three a-vectors, with 120° angles between them, can all lie in the tightly packed plane, called the c-plane, while the c-axis is perpendicular to this plane.
[0023] In this way, the crystal structure of silicon carbide crystals can be explained by a sequence of silicon-carbon bilayers in the direction of the crystallographic c-axis. Consequently, each silicon carbide wafer sawn perpendicular to the c-axis comprises a silicon crystal face with Miller indices 0001, meaning that the final layer is essentially a layer of silicon atoms (a large proportion of silicon atoms build up on the surface on this side of the wafer) and a carbon crystal face with Miller indices 000-1, meaning that essentially a layer of carbon atoms builds up the surface (e.g., a large proportion of carbon atoms build up the surface on this side of the wafer).
[0024] However, silicon carbide wafers are often sawn with a slight inclination to a crystal plane perpendicular to the c-axis. This allows for significantly better doping control at the silicon crystal face. For example, the inclination between the wafer surface and a crystal plane perpendicular to the c-axis of the silicon carbide crystal can be less than 10° (e.g., between 2° and 8°). Even such slightly inclined wafers, however, still contain both a silicon crystal face and a carbon crystal face, since on one side the silicon atoms constitute the majority (e.g., more than 70%, more than 80%, more than 90%, or more than 97% of the atoms at the surface) of the atoms that make up the surface on that side, and on the opposite side the carbon atoms constitute the majority (e.g.,more than 70%, more than 80%, more than 90% or more than 97% of the atoms on the surface) represent the atoms that make up the surface of the wafer on this side.
[0025] In other words, a carbon crystal face (C-face, carbon site) of a silicon carbide wafer can be a surface of the silicon carbide wafer corresponding to a 000-1 plane of a silicon carbide crystal with a slight inclination of less than 10° (or less than 8°, 5°, or 2°) to a crystal plane perpendicular to the c-axis of the silicon carbide crystal. Consequently, a silicon crystal face (Si-face, silicon site) can be a surface of the silicon carbide wafer corresponding to a 0001 plane of a silicon carbide crystal with a slight inclination of less than 10° (or 8°, 5°, or 2°) to a plane perpendicular to the c-axis of the silicon carbide crystal. However, a silicon carbide wafer without any inclination (planes of the wafer perpendicular to the c-axis) can also be used.
[0026] Fig. Figure 1 shows a flowchart of a process for producing a silicon carbide substrate for an electrical silicon carbide device according to one embodiment. The process 100 comprises providing 110 a silicon carbide donor wafer comprising a silicon crystal face and a carbon crystal face, and depositing 120 a silicon carbide epitaxial layer on the silicon crystal face of the donor wafer. The process 100 further comprises implanting 130 ions with a predefined energy characteristic to form an implantation zone within the epitaxial layer, such that the ions are implanted at a mean depth within the epitaxial layer corresponding to a predetermined thickness of an epitaxial layer of the silicon carbide substrate to be produced. The process 100 further comprises bonding 140 an acceptor wafer to the epitaxial layer, such that the epitaxial layer is positioned between the donor wafer and the acceptor wafer.Furthermore, the process includes 100 parts of the epitaxial layer along the implantation zone, so that a silicon carbide substrate, represented by the acceptor wafer, which carries an epitaxial layer of the intended thickness, is obtained, so that the carbon crystal surface is exposed as a new surface (e.g. directly or after a surface treatment process, e.g. CMP, chemical-mechanical polishing).
[0027] In this way, a silicon carbide substrate can be provided with an epitaxial layer containing a carbon crystal surface for fabricating an electrical silicon carbide device (e.g., a switch, diode, or MOSFET). This can allow the fabrication of silicon carbide devices with significantly higher channel mobility, which can significantly reduce the on-resistance of such devices. Furthermore, a silicon carbide substrate can be provided with the available carbon crystal surface and with doping concentrations of an epitaxial layer deposited on a silicon crystal surface. In this way, significantly lower doping concentrations or densities can be achieved (e.g., less than 1 × 10⁻⁶). 16 cm -3 or less than 1*10 15 cm -3can be achieved). Therefore, high-voltage silicon carbide electrical devices (e.g., 600 V to 1700 V) can be realized on such silicon carbide substrates. Furthermore, the defect density can be significantly reduced because some epitaxial defects occur with a higher concentration on the silicon crystal surface, whereas they do not occur or occur less frequently on the carbon crystal surface (e.g., step bunching, i.e., the formation of steps on the surface of the epitaxial layer).
[0028] The donor wafer is a silicon carbide wafer and can provide a nucleation surface for the deposition of the silicon carbide epitaxy layer, for example. It is called a donor wafer because it donates at least part of the deposited silicon carbide epitaxy layer to the acceptor wafer during the fabrication of the silicon carbide substrate. Similarly, the acceptor wafer is called an acceptor wafer because it is bonded to the epitaxy layer and at least partially accepts the epitaxy layer after it has been divided along the implantation zone.
[0029] The silicon carbide donor wafer comprises a silicon crystal face and a carbon crystal face, as mentioned above. The silicon carbide epitaxial layer is deposited onto the silicon crystal face of the donor wafer in such a way that the doping concentration can be varied over a wide range. Consequently, the deposition of the silicon carbide epitaxial layer terminates in a silicon crystal face.
[0030] Ionized hydrogen atoms or molecules can be used as ion implantation species. In addition to hydrogen ions, one or more other ionized noble gases, such as helium, can also serve as ion implantation species. Furthermore, a combination of hydrogen ions and an ionized noble gas species can be selected. In the latter case of co-implantation, the different ion implantation species can be implanted individually, for example, first the hydrogen ion implantation, followed by the noble gas ion implantation. Additionally, a low-dose pre-implantation of a precursor such as boron can be added to the implantation sequence.
[0031] Furthermore, ions with a predefined energy profile are implanted. The energy of an ion depends on its velocity and / or mass when it collides with the surface of the epitaxial layer, thus determining the mean depth at which the ion stops. The predefined energy profile can specify a mean energy and / or energy distribution of the ions to be implanted. The mean depth of the ions within the epitaxial layer can result from their mean energy and thus defines the mean depth of the implantation zone. Additionally, the energy dissipation or variation of the ions around the mean energy can determine or define the vertical extent of the implantation zone, e.g., its thickness. A low-energy variation can lead to a small implantation zone, and vice versa.In the case of an ion implantation sequence with other ion implantation species, the energy characteristics can differ for each ion implantation species. Implantation doses can range from 1 x 10⁻⁶. 15 and 1.5 x 10 17 cm -2 lay.
[0032] The energy characteristics can be predefined such that the implantation zone has a distance from the surface of the epitaxial layer corresponding to a predetermined thickness of the epitaxial layer of the silicon carbide substrate to be produced. The predetermined thickness can be varied within a wide range and can, for example, be selected according to the requirements of an electrical silicon carbide device to be subsequently produced on the silicon carbide substrate.
[0033] For example, the predefined energy characteristic can optionally be chosen such that the intended thickness of the epitaxial layer of the silicon carbide substrate to be produced is greater than or equal to an intended drift layer of an electrical silicon carbide device.
[0034] The epitaxial layer is divided along the implantation zone. This can be achieved in various ways. For example, the epitaxial layer is heated to a temperature between 600 °C and 1300 °C (or between 700 °C and 1200 °C or between 900 °C and 1000 °C) so that the epitaxial layer ruptures due to hydrogen gas bubbles coalescing within the implantation zone. If ions other than hydrogen are implanted, hydrogen atoms can additionally diffuse in after the implantation step to enhance the division process.
[0035] Alternatively, external forces can be applied to the donor wafer and the acceptor wafer, causing the epitaxial layer to break up along the implantation zone, as the crystal bonds in the implantation zone may be weakened by the implanted ions.
[0036] Splitting the epitaxial layer along the implantation zone results in two separate wafers. The first separate wafer comprises the silicon carbide donor wafer and the remaining epitaxial layer, while the second separate wafer comprises the acceptor wafer and the epitaxial layer of the specified thickness. The acceptor wafer with the attached epitaxial layer of the specified thickness represents the silicon carbide substrate to be produced.
[0037] In other words, the epitaxial layer can be divided such that the epitaxial layer of the silicon carbide substrate, with the intended thickness, encompasses a carbon crystal surface that is accessible, for example, for the fabrication of an electrical silicon carbide device.
[0038] Fig. Figures 2A to 2E show a schematic representation of the production of a silicon carbide substrate. Fig. Figure 2A shows a silicon carbide donor wafer 210 comprising a silicon crystal face 212 and a carbon crystal face 214. A deposited silicon carbide epitaxial layer 220 on the silicon crystal face 212 of the donor wafer 210 is also shown. Since the epitaxial layer is deposited on the silicon crystal face of the silicon carbide donor wafer, the silicon carbide epitaxial layer also terminates at a silicon crystal face 222. Furthermore, it shows... Fig. 2B the implantation of ions 230, which form an implantation zone 240 within the epitaxial layer 220. Fig. Figure 2C shows an acceptor wafer 250 bonded to the epitaxial layer 220. The acceptor wafer 250 can also be referred to as the carrier wafer. The acceptor wafer 250 is bonded to the epitaxial layer 220 along a bonding interface 252. Subsequently, the epitaxial layer 220 is divided along the implantation zone 240, which is divided into Fig. Figure 2D shows the epitaxial layer 260 with the specified thickness, which can form a drift layer of a silicon carbide device to be subsequently fabricated on this epitaxial layer. The epitaxial layer 260 exposes a carbon crystal face, and the remaining epitaxial layer 270 exposes a silicon crystal face. Finally, Figure 270 shows the epitaxial layer 260 with the specified thickness. Fig. 2E the separated acceptor wafer (or carrier wafer) 250 with the epitaxial layer 260 of the intended thickness and the donor wafer 210 with the remaining epitaxial layer 270.
[0039] The acceptor wafer can comprise or consist of any material that has a coefficient of thermal expansion close to SiC (e.g., within a range of + / - 30%, 20%, 10%, or 5% of the coefficient of thermal expansion of SiC) that can be bonded to or attached to a silicon carbide epitaxial layer. For example, the acceptor wafer can be a tungsten wafer, a polycrystalline silicon carbide wafer, or a silicon carbide-coated graphite wafer.A tungsten wafer can contain or consist of more than 50% (or more than 70% or more than 90%) tungsten (neglecting impurities), a polycrystalline silicon carbide wafer can contain or consist of more than 50% (or more than 70% or more than 90%) polycrystalline silicon carbide (neglecting impurities), and a graphite wafer can contain or consist of more than 50% (or more than 70% or more than 90%) graphite (neglecting impurities).Since the acceptor wafer is not necessarily a wafer with properties for the deposition of an epitaxial layer (as is the donor wafer), the material of the acceptor wafer can be selected to reduce material costs or to choose a material with desired or required properties for an electrical silicon carbide device to be manufactured on the silicon carbide substrate.
[0040] In other words, it shows Fig. 2A a silicon crystal face epitaxy, Fig. 2B a high-energy proton implantation, Fig. 2C a wafer bonding, Fig. 2D a healing and drift layer transfer and Fig. 2E further processing and possible recovery of the silicon carbide donor wafer, as an example. Fig. Figures 2A to 2E show an epitaxial layer with a C-surface surface for a silicon carbide device by high-energy implantation and ion cutting, as an example.
[0041] The silicon carbide substrate to be produced is obtained by sectioning the epitaxial layer along the implantation zone, so the silicon carbide donor wafer with its remaining epitaxial layer may still be available. Therefore, optionally or additionally, one or more silicon carbide substrates can be produced by utilizing the remaining epitaxial layer on the donor wafer without depositing further epitaxial silicon carbide. A surface conditioning step (e.g., CMP) could be performed to ensure the surface quality required for subsequent processing steps.For example, additional ions with a different or the same predefined energy characteristic can be formed in the remaining epitaxial layer on the donor wafer, creating a different implantation zone within the epitaxial layer. This allows the ions to be implanted at a medium depth within the remaining epitaxial layer, corresponding to a different or the same intended thickness of an epitaxial layer of a further silicon carbide substrate to be produced. Furthermore, another acceptor wafer can be bonded to the remaining epitaxial layer, so that the remaining epitaxial layer is positioned between the donor wafer and the further acceptor wafer. The remaining epitaxial layer can be split along the implantation zone, resulting in another silicon carbide substrate represented by the further acceptor wafer with an epitaxial layer of a different or the same intended thickness.In this way, the donor wafer with the deposited epitaxial layer can be used several times to produce multiple silicon carbide substrates, while possibly only one time-consuming and expensive deposition of the epitaxial layer is necessary (with a thickness that is several times the intended thickness of the epitaxial layer of the silicon carbide substrates to be produced).
[0042] Alternatively, at least the donor wafer can optionally be reused. A surface conditioning step (e.g., CMP) could be performed to ensure the surface quality required for subsequent processing steps. For example, additional silicon carbide can be epitaxially deposited onto the remaining epitaxial layer (or onto the silicon carbide donor wafer) to increase the thickness of the remaining epitaxial layer.Furthermore, ions with a different or the same predefined energy characteristic can be implanted to form an implantation zone within either the remaining epitaxial layer or the deposited additional silicon carbide epitaxial layer. This allows the ions to be implanted at a medium depth within the remaining or deposited additional silicon carbide epitaxial layer with an increased thickness corresponding to a different or the same intended thickness of a further silicon carbide substrate to be produced. Additionally, another acceptor wafer can be bonded to the deposited additional epitaxial layer, so that the deposited additional epitaxial layer is positioned between the donor wafer and the additional acceptor wafer.The remaining epitaxial layer or the deposited additional silicon carbide layer can be split along the implantation zone, resulting in another silicon carbide substrate represented by the additional acceptor wafer, with an epitaxial layer of the same or different intended thickness. In this way, the expensive donor wafer can be reused multiple times. If additional silicon carbide of a suitable thickness is deposited on the silicon carbide donor wafer, this donor wafer can, for example, be used for a virtually unlimited number of wafers.
[0043] Due to the deposition of the epitaxial layer on the silicon crystal surface of the donor wafer, the dopant density or dopant concentration can be varied over a wide range. For example, the silicon carbide epitaxial layer can be deposited in such a way that the epitaxial layer has a dopant density of less than 1 × 10⁻⁶. 16 cm-3 or less than 1*10 15 cm -3 includes, or the epitaxial layer can have a dopant density between 1*10 16 cm -3 and 4*10 15 cm -3 This includes a wide variety of electrical silicon carbide devices. Therefore, a large number of these devices can be realized on such silicon carbide substrates. For example, electrical silicon carbide devices with high electron channel mobility and high blocking voltage (e.g., 600 V to 1700 V) can be implemented.
[0044] Optionally or additionally, further dopants can be implanted onto the silicon crystal surface of the epitaxial layer before the acceptor wafer is bonded to the epitaxial layer to create a defined dopant distribution for the subsequent back surface of a silicon carbide device fabricated on the silicon carbide substrate. In other words, optionally, additionally, or alternatively, a defined dopant distribution can be implanted within the epitaxial layer, corresponding to a required dopant distribution, on a silicon crystal surface of the epitaxial layer for an electrical silicon carbide device to be fabricated on the carbon crystal surface of the epitaxial layer of the silicon carbide substrate. This avoids the need for additional dopants during the subsequent fabrication of an electrical silicon carbide device.In particular, with silicon carbide devices, it is possible that the designated dopant distribution, which may represent an emitter layer and / or a field stop layer, does not change significantly during the subsequent high-temperature steps due to the small diffusion coefficients of dopant atoms in silicon carbide.
[0045] Optionally or additionally, the manufacturing process may further include one or more surface treatment steps (e.g. polishing or cleaning).
[0046] Some embodiments relate to a method for producing a silicon carbide substrate for an electrical silicon carbide device, comprising providing a silicon carbide donor wafer comprising a silicon crystal face and a carbon crystal face. The silicon crystal face is formed by the surface of an epitaxial layer of the silicon carbide donor wafer. The method further comprises the use of a high-energy ion cutting process to section the epitaxial layer along an implantation zone, such that a silicon carbide substrate is obtained consisting of an acceptor wafer bonded to the epitaxial layer of the silicon carbide donor wafer and an epitaxial layer of a predetermined thickness.
[0047] Furthermore, the procedure may include one or more additional, optional features that implement one or more aspects of the concept described above.
[0048] Fig. Figure 3 shows a flowchart of a process for producing a silicon carbide substrate for an electrical silicon carbide device according to one embodiment. The process 300 comprises providing 310 a silicon carbide donor wafer comprising a silicon crystal face and a carbon crystal face, and depositing 320 a silicon carbide epitaxial layer on the silicon crystal face of the donor wafer such that the epitaxial layer has a dopant density of less than 1 × 10 16 cm -3The process 300 further comprises the implantation 330 of ions with a predefined energy characteristic to form an implantation zone within the epitaxial layer, such that the ions are implanted at a mean depth within the epitaxial layer corresponding to a predetermined thickness of an epitaxial layer of the silicon carbide substrate to be produced. The process 300 further comprises the bonding 340 of an acceptor wafer to the epitaxial layer, such that the epitaxial layer is positioned between the donor wafer and the acceptor wafer. The epitaxial layer is split along the implantation zone by heating the epitaxial layer to a temperature between 600 °C and 1300 °C (or between 700 °C and 1200 °C), so that a silicon carbide substrate represented by the acceptor wafer with an epitaxial layer of the predetermined thickness is obtained.
[0049] Furthermore, the procedure 300 may include one or more additional, optional features that implement one or more aspects of the concept described above (e.g., in conjunction with Fig. 1 and Fig. 2).
[0050] Based on a silicon carbide substrate produced according to the described concept or one of the described embodiments, one or more electrical silicon carbide devices can be produced on the carbon crystal surface of the epitaxial layer of the silicon carbide substrate. Fig. Figure 4 shows a flowchart of a method for manufacturing an electrical silicon carbide device according to one embodiment. The method 400 comprises manufacturing 110, 120, 130, 140, 150 a silicon carbide substrate according to the concept or according to one of the embodiments described above. Alternatively, such a silicon carbide substrate is provided. Furthermore, the method 400 comprises manufacturing 460 the electrical silicon carbide device on the carbon crystal surface of the epitaxial layer of the silicon carbide substrate.
[0051] In this way, an electric silicon carbide device with high channel mobility can be realized. Furthermore, an electric silicon carbide device with high blocking voltage can be enabled.
[0052] The manufactured electrical silicon carbide device can be, for example, a switch, a diode, a transistor, a MOSFET, or an electrical circuit comprising several electrical elements.
[0053] The fabrication of the silicon carbide electrical device can include, among other things, the implantation of active areas, the generation of oxides (e.g., gate oxide, intermetal oxide), and / or the deposition of gates, contacts, metal conductors, or vias. Backside metallization or similar processes or structures on the back of the silicon carbide electrical device can be implemented subsequently.
[0054] Furthermore, the method 400 may include one or more additional, optional features that encompass one or more aspects of the concept or one of the embodiments described above (e.g. Fig. 1, Fig. 2 to Fig. 3) realize.
[0055] For example, the fabricated silicon carbide electrical device can have a blocking voltage above 500 V (or above 600 V, above 1000 V, above 1500 V, above 1700 V, or above 2000 V, or between 600 V and 1700 V). In other words, the epitaxial layer can be deposited to obtain an epitaxial layer with a predefined dopant density, making it possible to fabricate a silicon carbide electrical device with a high blocking voltage.
[0056] Some silicon carbide electrical devices may require back-side metallization for contacting the device. Depending on the acceptor wafer material, the back side of the acceptor wafer may be used for such contact. For this purpose, a conductive bonding layer may be placed between the acceptor wafer and the epitaxial layer (e.g., by reactive metal-silicide bonding). However, the acceptor wafer may also be removed from the epitaxial layer to access the back side (silicon crystal face) of the epitaxial layer. In other words, Method 400 may further involve attaching the silicon carbide substrate with the fabricated silicon carbide electrical device to a support wafer facing the silicon carbide electrical device and removing the acceptor wafer from the epitaxial layer encompassing the silicon carbide electrical device attached to the support wafer.The acceptor wafer can be reused for other silicon carbide substrates. Access to the silicon crystal surface of the epitaxial layer may be sufficient to achieve the required backside contact.
[0057] The carrier wafer can be attached to an insulator (e.g., silicon dioxide) or passivation (e.g., silicon nitride) on one or more metal layers, which implement the wiring of the silicon carbide device, so that the acceptor wafer can be electrically isolated from the electrical silicon carbide device. Alternatively or optionally, the carrier wafer can connect to one or more contact areas (e.g., pads) of the electrical silicon carbide device.
[0058] Optionally or additionally, a metal layer can be produced on the back side of the epitaxial layer. In other words, Method 400 can further include producing a back-side metal layer on the back side of the epitaxial layer encompassing the electrical silicon carbide device. In this way, a metal contact can be realized on the side of the epitaxial layer opposite (located on the far side) the produced electrical silicon carbide device.
[0059] Optionally or additionally, the back side of the electrical silicon carbide device can be attached to an electrically conductive wafer after the backside metal contact or backside layer has been fabricated, and the support wafer can then be removed. In this way, a reliable backside contact can be established, and the front side is available for connecting one or more input and / or output structures (e.g., pads) of the electrical silicon carbide.
[0060] Fig. Figure 5 shows a schematic representation of a silicon carbide substrate 500 according to one embodiment. The silicon carbide substrate 500 comprises a support wafer 510, which is a tungsten wafer, a polycrystalline silicon wafer, or a silicon carbide-coated graphite wafer. The silicon carbide substrate 500 further comprises a silicon carbide epitaxial layer 520 attached to the support wafer 510 and comprising a carbon crystal surface 530 opposite (arranged on the far side of) the support wafer, such that an electrical silicon carbide device can be manufactured or produced on the carbon crystal surface 530 of the epitaxial layer 520.
[0061] The silicon carbide substrate 500 may include additional, optional features according to one or more aspects of the concept or one or more embodiments described above.
[0062] Furthermore, it shows Fig.Figure 6 shows a schematic representation of an electrical silicon carbide device 600 according to one embodiment. The electrical silicon carbide device 600 comprises a support wafer 610, a silicon carbide epitaxial layer 620, and an electrical silicon carbide device structure 630. The silicon carbide epitaxial layer 620 is attached to the support wafer and comprises a carbon crystal surface 622 facing the support wafer 610 and a silicon crystal surface 624 opposite (arranged on the opposite side) the support wafer 610. The electrical silicon carbide device structure 630 is fabricated on the carbon crystal surface 622 of the epitaxial layer 620.
[0063] In this way, the back side of the epitaxial layer 620 is accessible, for example, for a posterior contact.
[0064] The electric silicon carbide device 600 may include additional, optional features according to one or more aspects of the described concept or one of the embodiments described above.
[0065] Some embodiments involve a carbon side of a SiC device for reverse transfer of an epitaxial layer by an ion-cutting process with high-energy ion implantation. For the fabrication of suitable side-mounted carbon-surface SiC MOSFETs with a voltage range of 600 V to 1700 V, silicon crystal surface epitaxy with doping concentrations in the range of 1 × 10⁻⁶ is potentially suitable. 16 cm -3 and 4*10 15 cm -3 required. For higher blocking voltages, even lower doping levels may be necessary. Such carbon crystal surface epitaxial layers can be produced using the described concept.
[0066] Compared to SiC devices fabricated on a silicon crystal surface, fabricating such devices on the carbon crystal surface results in significantly better channel mobility and therefore also in better forward current characteristics and lower on-resistance for a side-mounted SiC MOSFET, for example. Furthermore, several surface epitaxy defects occur on the carbon crystal surface at a lower concentration compared to the silicon crystal surface, or do not appear at all (e.g., step-bunching, i.e., the formation of steps on the surface of the epitaxial layer).
[0067] The proposed concept utilizes ion cutting technology combined with high-energy ion implantation and a reverse transfer of the SiC epitaxial layer previously produced on the silicon crystal face. Specifically, an epitaxial layer with the desired doping and a thickness (slightly) greater than that required for the device is added to the silicon crystal face of a silicon carbide wafer. Subsequently, high-energy proton implantation takes place, during which the ion energy and the resulting penetration depth of the implanting species in the silicon carbide epitaxial layer are (precisely or essentially) adjusted to the thickness of the desired drift layer. The epitaxially processed and ion-implanted wafer is then transferred to an acceptor wafer via wafer bonding (e.g., reactive and / or conductive bonding through a metal silicide reaction zone).This acceptor wafer comprises or consists of a material compatible with SiC technology (e.g., tungsten, polycrystalline silicon carbide, silicon carbide-coated graphite wafer). After bonding at moderate bonding temperatures (e.g., below 700 °C), the sandwich of the carrier wafer (acceptor wafer) and the silicon carbide wafer can be heated to a temperature between 700 °C and 1200 °C. During this time, highly compressed hydrogen gas bubbles form and coalesce within the ion implantation zone, ultimately causing a rupture of the entire epitaxial layer along the ion implantation zone. This transfers the silicon carbide epitaxial layer to the carrier wafer (acceptor wafer), effectively flipping the drift layer (from top to bottom).Therefore, the desired carbon crystal face remains on the surface during subsequent processing, eliminating the need for further epitaxy processes. During the further course of processing, the front face of the device (including doping implantation, metallization, and machining edge passivation) can be completed. The acceptor wafer can then be removed (e.g., mechanically, chemically, by laser lifting, or by recovering the acceptor wafer). Attaching a support wafer to the front face may be possible for mechanical stabilization, as the resulting thickness of the removed device structure may be too thin for independent handling. The next steps could involve depositing and curing a back-side metal.
[0068] Alternatively, the acceptor wafer can be retained for further processing. This can be of interest, for example, if the acceptor wafer is conductively connected to the transferred layer and exhibits good thermal conductivity.
[0069] The donor wafer on which the epitaxial layer was produced can be used for further processes without material loss, resulting in high potential for cost reductions.
[0070] One aspect of the described concept is the provision of a SiC-based substrate with a specific thickness and doping concentration, designed for drift layering of the devices to be manufactured. This substrate can incorporate a 000-1 orientation of the surface to be machined (carbon crystal face). The substrate can be fabricated by a high-energy ion-cutting process following an epitaxial process on the silicon crystal face.
[0071] The expensive SiC substrate can be reused repeatedly, as its original thickness can essentially be kept the same, thus significantly reducing costs.
[0072] For example, it is also possible to produce the epitaxial layer on the silicon crystal surface with a thickness several times greater than the desired or intended drift layer thickness. In this way, the epitaxial layer can be subjected to an ion cutting process multiple times, and several drift layers can be transferred to different acceptor wafers. This allows for a significant reduction in the costs of the expensive epitaxial process (long heating and cooling times can be avoided).
[0073] Furthermore, optional processing of the silicon crystal surface can be carried out before the transfer of the epitaxial layer to the acceptor wafer with the aim of specifically configuring the subsequent device back side (e.g. with total or selective ion implantation for better contacting or for the implementation of emitter structures).
[0074] Embodiments may further provide a computer program with program code for performing one of the above methods when the computer program is executed on a computer or processor. A person skilled in the art would readily recognize that steps of various methods described above can be performed by programmed computers. Some embodiments are intended to also include program storage devices, such as machine- or computer-readable digital storage media, which encode machine-executable or computer-executable programs of instructions, wherein the instructions perform some or all of the steps of the methods described above. The program storage devices may be, for example, digital storage media, magnetic storage media such as magnetic disks and magnetic tapes, hard disk drives, or optically readable digital storage media.The embodiments are also intended to cover computers programmed to perform the steps of the procedures described above, or (field-)programmable logic arrays ((F)PLAs) or (field-)programmable gate arrays ((F)PGAs) programmed to perform the steps of the procedures described above.
[0075] Functional blocks described as "means for..." (performing a certain function) should be understood as functional blocks comprising a circuit arrangement designed to perform a specific function. Thus, a "means for something" can just as easily be understood as a "means designed or suitable for something." A means designed for performing a particular function therefore does not necessarily imply that this means will perform the function (at any given time).
[0076] The function of various elements shown in the figures, including any functional blocks designated as "means," "means for supplying a sensor signal," "means for generating a transmit signal," etc., can be provided by the use of special hardware, such as "a signal supplier," "a signal processing unit," "a processor," "a controller," etc., as well as hardware capable of executing software in association with appropriate software. Furthermore, any entity described herein as "means" can correspond to or be implemented as "one or more modules," "one or more devices," "one or more units," etc. When provided by a processor, the functions can be provided by a single special processor, by a single common processor, or by multiple individual processors, some of which may be shared.Furthermore, the explicit use of the terms "processor" or "controller" should not be interpreted as referring exclusively to hardware that executes software, and may implicitly include, among other things, digital signal processor (DSP) hardware, a network processor, an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), read-only memory (ROM) for storing software, random-access memory (RAM), and non-volatile storage. Other hardware, conventional and / or custom, may also be included.
Claims
[1] Method (400) for manufacturing an electrical silicon carbide device, the method comprising: Providing (110) a silicon carbide donor wafer (210) having a silicon crystal face and a carbon crystal face; Deposition (120) of a silicon carbide epitaxial layer (220) on the silicon crystal surface of the donor wafer, such that the silicon carbide epitaxial layer (220) has a silicon crystal surface; Implanting a specific dopant distribution within the silicon carbide epitaxy layer (220) according to a required dopant distribution on the silicon crystal surface of the deposited silicon carbide epitaxy layer (220) for an electrical silicon carbide device to be implemented on a carbon crystal surface of the silicon carbide substrate to be produced; Implanting (130) ions (230) with a predefined energy characteristic to form an implantation zone (240) within the silicon carbide epitaxy layer (220), wherein the ions are implanted at a mean depth within the silicon carbide epitaxy layer (220) corresponding to a predetermined thickness of an epitaxy layer (260) of the silicon carbide substrate to be produced; Bonding (140) of an acceptor wafer (250) to the silicon carbide epitaxy layer (220) such that the silicon carbide epitaxy layer (220) is arranged between the donor wafer and the acceptor wafer (250), wherein the implantation of the specific dopant distribution takes place before bonding the acceptor wafer (250); Dividing (150) the silicon carbide epitaxy layer (220) along the implantation zone (240) such that a silicon carbide substrate is obtained which is represented by the acceptor wafer (250) with an epitaxy layer (260) of the intended thickness, wherein the silicon carbide epitaxy layer (220) is divided such that the The epitaxial layer (260) of the silicon carbide substrate has a carbon crystal surface of the specified thickness; and Manufacturing (460) the electrical silicon carbide device on the carbon crystal surface of the epitaxial layer (260) of the silicon carbide substrate. [2] Method according to claim 1, wherein the dividing (150) of the silicon carbide epitaxy layer (220) comprises heating the silicon carbide epitaxy layer (220) to a temperature between 600 °C and 1300 °C. [3] Method according to claim 1 or 2, wherein the acceptor wafer (250) is a tungsten wafer, a polycrystalline silicon carbide wafer or a silicon carbide-coated graphite wafer. [4] A method according to any of the preceding claims, further comprising: Implanting ions into the remaining silicon carbide epitaxy layer (270) on the donor wafer (210) with a different or the same predefined energy characteristic to form another implantation zone (240) within the remaining silicon carbide epitaxy layer (270), so that the ions are implanted at a medium depth within the remaining silicon carbide epitaxy layer (270) corresponding to a different or the same intended thickness of an epitaxy layer of another silicon carbide substrate to be produced; Bonding of another acceptor wafer (250) to the remaining silicon carbide epitaxy layer (270), such that the remaining silicon carbide epitaxy layer (270) is positioned between the donor wafer and the further acceptor wafer (250); and Parts of the remaining silicon carbide epitaxy layer (270) along the other implantation zone (240) are obtained, such that a further silicon carbide substrate represented by the further acceptor wafer (250) is obtained with an epitaxy layer of the other or the same intended thickness. [5] A method according to any of the preceding claims, further comprising: Deposition of further silicon carbide by epitaxy on the remaining silicon carbide epitaxy layer (270) on the donor wafer (210); Implanting ions with a different or the same predefined energy characteristic to form another implantation zone (240) either within the remaining silicon carbide epitaxy layer (270) or the deposited further silicon carbide epitaxy layer, so that the ions are implanted at a medium depth within the remaining silicon carbide epitaxy layer (270) or the deposited further silicon carbide epitaxy layer according to a different or the same intended thickness of an epitaxy layer of a further silicon carbide substrate to be produced; Bonding of another acceptor wafer (250) to the deposited further silicon carbide epitaxial layer, such that the deposited further silicon carbide epitaxial layer is arranged between the donor wafer (210) and the further acceptor wafer (250); and Parts of the remaining silicon carbide epitaxy layer (270) or the deposited further silicon carbide epitaxy layer along the implantation zone (240) are obtained, such that a further silicon carbide substrate represented by the further acceptor wafer (250) is obtained with an epitaxy layer of the other or the same intended thickness. [6] Method according to any of the preceding claims, wherein the silicon carbide epitaxial layer (220) is deposited such that the silicon carbide epitaxial layer (220) has a dopant density of less than 1*10 16 cm -3 includes. [7] Method according to any of the preceding claims, wherein the silicon carbide epitaxial layer (220) is deposited such that the silicon carbide epitaxial layer (220) has a dopant density of less than 1*10 15 cm -3 includes. [8] Method according to any one of claims 1 to 6, wherein the silicon carbide epitaxial layer (220) is deposited such that the silicon carbide epitaxial layer (220) has a dopant density between 1*10 16 cm -3 and 4*10 15 cm -3 includes. [9] Method according to one of the preceding claims, wherein the predefined energy characteristic is selected such that the intended thickness of the epitaxial layer (260) of the silicon carbide substrate to be produced is greater than or equal to an intended drift layer of an electrical silicon carbide device. [10] A method according to any of the preceding claims, further comprising: Attaching the silicon carbide substrate with the fabricated electrical silicon carbide device to a carrier wafer, facing the electrical silicon carbide device; and Removal of the acceptor wafer (250) from the epitaxial layer comprising the silicon carbide electrical device attached to the carrier wafer. [11] Method according to claim 10, further comprising producing a rear metal layer on a rear side of the epitaxial layer (260) comprising the electrical silicon carbide device. [12] Method according to one of the preceding claims, wherein the electrical silicon carbide device has a blocking voltage above 500 V [13] Method according to any of the preceding claims, wherein ionized hydrogen atoms, ionized hydrogen molecules, an ionized noble gas or a combination of hydrogen ions and an ionized noble gas species are used to implant ions (230) with a predefined energy characteristic to form an implantation zone (240) within the epitaxial layer (220). [14] Method according to claim 13, wherein hydrogen atoms can additionally diffuse in after the implantation step to enhance the division process if ions other than hydrogen (230) are implanted.