TFT matrix substrate, display field and display device

Abstract

A TFT matrix substrate (2, 3) comprising: a substrate (301); a display area (A) and a border area (P) surrounding the display area (A), both arranged on the substrate (301); wherein the border area (P) comprises a signal line (23, a) and a shielding layer (24, 35) arranged on the signal line (23, a), and the shielding layer (24, 35) covers the signal line (23, a) to shield against EMI (electromagnetic interference) caused by a signal output through the signal line (23, a); and wherein the display area (A) comprises a common electrode layer (31) extending to the border area (P), wherein the common electrode layer (31) and the shielding layer (35) are formed by a common film layer and are electrically connected to each other, wherein the common electrode layer (31) extends regionally between a pixel electrode (3010) and a TFT switching device.

Description

Technical FieldThe present disclosure relates to the field of display technologies, and more particularly, to a thin film transistor (TFT) array substrate, a display panel, and a display device.Background ArtDue to its advantages such as low voltage, low power consumption, a large amount of displayed information, and easy colorization, thin film transistor liquid crystal displays (TFT LCDs) have become the main stream in the present display area, and have been widely used in various electronic devices such as computers, laptops, mobile phones, cameras, and high-definition televisions.Currently, liquid crystal display panels are present in fringe field switching (FFS) mode and in-plane switching (IPS) mode in TFT LCD products.In the related art, the liquid crystal display panel includes a matrix substrate and a color filter substrate disposed opposite to the matrix substrate, and a liquid crystal material is filled between the matrix substrate and the color filter substrate. The array substrate has a display area A for display and a peripheral area P surrounding the display area A. FIG. 1 is a schematic diagram showing a matrix substrate in the related art. As shown in FIG. 1, the array substrate 1 has the display area A and the peripheral area P surrounding the display area A where the peripheral area P is formed by an area between an outer edge of the array substrate 1 and a boundary of the display area A, and is configured with an integrated circuit (IC) 11, an IC signal line area 12, and a multipath selector area 13 electrically connected to each other. A planar common electrode 14 is provided within the display area A of the array substrate. The planar common electrode 14, which may generally be formed by a transparent conductive layer, may be deposited in a film forming manner within the entire area of the display area (as shown in FIG. 1 ) or within a portion of the display area A. In the related art, a closed ground line (GND) 15 generally used by a metal wire is provided inside the peripheral portion to shield electromagnetic interference (EMI) of the environment with the display panel. However, the inventors revealed that the display panel will be exposed to intense EMI in the manufacturing process, particularly a clock signal line will be exposed to the most intense EMI when a signal input from the IC signal line in the edge region P to the display region A fluctuates, thus significantly adversely affecting stability and reliability of the display panel. When the display panel is a liquid crystal display panel, if the EMI is not eliminated from the signal line, fringe interference is caused on an image displayed in the liquid crystal display panel, or even color shift is caused on the image, or the liquid crystal display becomes an empty screen when the electronic device starts up, or further, the electronic device does not operate. When the display panel is used in the manufacture of an electronic device such as a mobile phone, a signal transmitted in the display panel will generate severe EMI for radio frequency signals in the mobile phone, thereby seriously degrading a definition of a signal received by the mobile phone.CN 102681278 B describes an array substrate for an LCD display with a shielding layer covering the external signal lines of drive lines.US 2008 0204619 A1 discloses a display display device which has a shielding film which is connected to a counterelectrode which has a fixed potential.Summary of the DisclosureThe invention is defined in claim 1. Advantageous embodiments are evident from the dependent claims.In view of the above problems, embodiments of the present disclosure provide a TFT array substrate, a display panel, and a display device to cause a problem that the signal EMI output by the signal lines in the edge portion causes the display panel or another signal of an electronic device having the display panel (such as a communication signal of the mobile phone).In a first aspect, an embodiment of the present disclosure provides a TFT array substrate including: a substrate; a display area and a peripheral area surrounding the display area, both disposed on the substrate; where the peripheral area includes a signal line and a shielding layer disposed above the signal line, and the shielding layer covers the signal line to shield EMI caused by a signal outputted by the signal line.In a second aspect, an embodiment of the present disclosure provides a display panel including the TFT array substrate in the first aspect.In a third aspect, an embodiment of the present disclosure provides a display device including the display panel in the second aspect.In the TFT array substrate, the display panel, and the display device according to embodiments of the present disclosure, a shield layer covering the signal lines in the edge region is disposed above the signal lines to shield the EMI caused by the signal outputted by the signal lines, thereby improving stability and reliability of the display panel and improving definition of another signal received by an electric device having the display panel (such as the communication signal received by the mobile phone).DESCRIPTION OF THE DRAWINGSFor a better understanding of the above and other features and advantages of the present disclosure, exemplary embodiments of the present disclosure will be described below in detail by those skilled in the art with reference to the accompanying drawings, wherein: FIG. 1 is a schematic diagram of a matrix substrate in the prior art. FIG. 2 is a schematic diagram of a TFT array substrate according to an embodiment of the present disclosure. FIG. 3 is a schematic cross-sectional view of the TFT array substrate taken along a line AA 1 in FIG. 2 according to the embodiment of the present disclosure. FIG. 4 is a schematic diagram of a TFT array substrate according to an embodiment of the present disclosure. FIG. 5 is a schematic cross-sectional view of the TFT array substrate taken along a line BB 1 in FIG. 4 according to the embodiment of the present disclosure. FIG. 6 is a schematic diagram of a TFT array substrate according to an embodiment of the present disclosure. FIG. 7 is a schematic cross-sectional view of the TFT array substrate taken along a line CC 1 in FIG. 6 according to the embodiment of the present disclosure.DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTSThe present disclosure will be further illustrated in detail by the following embodiments in conjunction with the accompanying drawings. It can be understood that specific embodiments described herein are only for explaining the present disclosure rather than limiting the present disclosure. In addition, it should be noted that, for convenience of description in the accompanying drawings, only partial content related to the present disclosure is illustrated instead of all the contents, and the size and scale of the structure shown in the accompanying drawings are not necessarily actual or proportional to the actual size and scale of the structure.FIGS. 2 and 3 show a TFT array substrate according to an embodiment of the present disclosure.FIG. 2 is a schematic diagram of the TFT array substrate according to an embodiment of the present disclosure, FIG. 3 is a schematic cross-sectional view of the TFT array substrate taken along a line AA 1 in FIG. 2 according to the embodiment of the present disclosure, and description of an embodiment of the present disclosure will now be described in detail below with reference to FIGS. 2 and 3.Referring to FIGS. 2 and 3, the TFT array substrate 2 has a display area A and an edge area P surrounding the display area A, that is, the edge area P is formed by an area between an outer edge of the TFT array substrate 2 and a boundary of the display area 2. Wherein, wiring or other elements such as a flexible printed circuit (FCP) 21, an integrated circuit (IC) 22, and various signal lines 23 (not shown in FIG. 2 ) may be provided in the peripheral area P. In addition, the peripheral portion P further includes a shield layer 24 formed above a portion in which the signal lines 23 are arranged, and the shield layer 24 covers the portion in which the signal lines are arranged. When the peripheral portion P includes the flexible printed circuit 21 or the integrated circuit 22, the flexible printed circuit 21 or the integrated circuit 22 may be electrically connected to the shield layer 24 to provide an electric potential to the shield layer 24.In the present embodiment, when the signal on the signal lines 23 is switched from a logic high level to a logic low level or from the logic low level to the logic high level, the signal lines generate an electric field and a magnetic field, causing the EMI for the TFT array substrate. The shield layer 24 can shield a signal from the signal lines 23 below the shield layer 24, and thereby accurately protect the display panel from the EMI caused by the signal or by changing the signal.The electrical connection of the flexible printed circuit 21 or the integrated circuit 22 to the TFT array substrate may be implemented by a direct or indirect electrical connection between the flexible printed circuit 21 or the integrated circuit 22 and the TFT array substrate. In one implementation, the shielding layer 24 may be electrically connected to another electrical potential for better shielding effect. When the TFT array substrate is electrically directly connected to the flexible printed circuit 21 or the integrated circuit 22, the flexible printed circuit 21 may be electrically directly connected to the shield layer 24 to provide an electric potential for the shield layer 24; alternatively, the electric potential for the shield layer 24 may be provided by an indirect electric connection, for example, the flexible electric circuit 21 is electrically connected to another portion of the TFT array substrate to provide the electric potential for the shield layer 24 by a through hole, and the like. Preferably, in the present embodiment, the flexible printed circuit 21 or the integrated circuit 22 is electrically directly connected to the shield layer 24 to provide an electric potential to the shield layer 24.In one implementation, the electrical potential provided to the shield layer 24 may be in a range from +0.5 V to -0.5 V. In another implementation, the electric potential provided to the shield layer 24 is 0 V. At this time, based on research by the inventors, the shield layer is good in shielding the EMI caused by the signal from the signal lines without increasing power consumption of the TFT array substrate.Optionally, the peripheral portion P of the TFT array substrate may further include a GND line (ground line) 25 (not shown in FIG. 3 ) which is a closed wiring surrounding the display portion A to further shield the EMI. The display panel can be better protected from the EMI caused by the signal from the signal lines based on the above structure using the GND line.It can be understood by those skilled in the art that the TFT array substrate described herein is only for explaining the present disclosure rather than limiting the present disclosure. The peripheral region P of the TFT array substrate used may include, but is not limited to, or necessarily includes the flexible printed circuit 21, the integrated circuit 22, and various signal lines 23. The present embodiment is only an exemplary embodiment, and all the existing structures of the TFT array substrate can be adapted to the present disclosure. Alternatively, FIGS. 2 and 3 only show a usable type of the structure and wiring of the TFT array substrate, but the TFT array substrate is not necessarily of this specific structure and does not necessarily have each element shown in figures, or the TFT array substrate does not necessarily employ only such wiring, thus the exemplary structure of the TFT array substrate in FIG. 2 or 3 should not limit the embodiment of the present disclosure.It is noted that the signal line 23 is schematically illustrated below the shield layer 24 in FIG. 3. Accordingly, considering that the TFT array substrate may have various structures, the TFT array substrate may have diversified film layers. Specific film layers or structures around the signal line are not defined in the present embodiment, while the shield layer 24 is disposed above the signal lines 23 and electrically insulated from the signal lines 23. Therefore, FIG. 3 should not limit the structure of the present embodiment. Accordingly, in order to clearly show the center of gravity of the present embodiment, insignificant film layers in the display area A of the TFT array substrate in FIGS. 2 and 3 are omitted, which should not limit the present embodiment.The present embodiment further provides a display panel including the TFT array substrate described in any one of the above embodiments. In one implementation, the display panel is a liquid crystal display panel. When the display panel having the TFT array substrate described in any one of the above embodiments is used in manufacturing an electronic device such as a mobile phone, EMI caused for communication signals in the electronic device can be reduced, and thereby definition of the communication signal of the mobile phone can be improved.Moreover, the present embodiment further provides a display device including the display panel described in any one of the above embodiments. In one implementation, the display device is a liquid crystal display device having the display panel and a backlight unit, it goes without saying that the display device may be of another type, for example a display device without a backlight unit.In the TFT array substrate, the display panel, and the display device according to the embodiment of the present disclosure, a shield layer covering the signal lines in the edge region is disposed above the signal lines to shield the EMI caused by the signal on the signal lines, and thereby improve stability and reliability of the TFT array substrate, the display panel, and the display device.FIGS. 4 and 5 show a TFT array substrate according to an embodiment of the present disclosure. The embodiment will be described in more detail with respect to the structure in the above embodiment.FIG. 4 is a schematic diagram of the TFT array substrate according to the present disclosure, FIG. 5 is a schematic cross-sectional view of the TFT array substrate taken along a line BB 1 in FIG. 4 according to the embodiment of the present disclosure, and the description of the embodiment of the present disclosure will now be described in detail below with reference to FIGS. 4 and 5.Referring to FIG. 4, a TFT array substrate 3 has a display area A and an edge area P surrounding the display area A, that is, the edge area P is formed by an area between an outer edge of the TFT array substrate 3 and a boundary of the display area A. Wirings or other elements such as a flexible printed circuit 32, an integrated circuit 33, and various signal lines (not shown in FIG. 4 ) are arranged in the peripheral region P. In addition, the peripheral portion P further includes a shield layer 35 formed above a region where the signal lines are arranged, and the shield layer 35 covers the region where the signal lines 305 are arranged to protect the display panel from the EMI caused by the signal from each of the signal lines within the region where the signal lines are arranged. In the embodiment of the present invention, referring to FIG. 5, the display region A further includes a common electrode layer 31, and an electric potential of the shield layer 35 is equal to that of the common electrode layer 31. In another implementation, as shown in FIG. 5, a part of the common electrode layer 31 within the display area A may extend to the edge area P to form the shield layer 35, that is, the shield layer within the edge area P and the common electrode layer 31 within the display area A are formed by a common film layer and may be formed by a common process, whereby the electric potential of the shield layer 35 is the same as that of the common electrode layer 31.Specifically, referring to FIG. 5, the array substrate includes: a substrate 301; a planarization layer 308 disposed above the substrate 301 where the planarization layer 308 covers the display region A and the edge region P; and a common electrode layer 31 disposed on the planarization layer 308, the common electrode layer 31 is disposed in the display region A and extends from the display region A to the edge region P to shield a signal from the signal line a below the planarization layer 308. The array substrate further includes a first insulating layer 309 disposed on the common electrode layer 31 and covering the display region A and the edge region P; and a pixel electrode layer 3010 disposed on the first insulating layer 309 and electrically connected to a switching device below the planarization layer 308 through a through hole 3011.In an implementation of the present embodiment, the switching device is a TFT switching device. In the present embodiment, the common electrode layer 31 within the display area A extends to the edge area P to form the shield layer 35, that is, the common electrode layer 31 within the display area A and the shield layer 35 in the edge area P are formed in a common layer and by the same material, and are formed in the same process, in particular, so that the electric potential of the shield layer 35 is the same as that of the common electrode layer 31. The shield layer 35 can shield the signal from the signal line a below the shield layer 35, thereby protecting the field from the EMI caused by the signal.In an implementation, the array substrate between the substrate 301 and the planarization layer 308 further includes: a buffer layer 302 on the substrate 301; a polysilicon layer 303 on the buffer layer 302; a gate insulation layer 304 covering the polysilicon layer 303; a first electrode 305 on the gate insulation layer 304; a second insulation layer 306 covering the first electrode 305; and a second electrode 307 on the second insulation layer 306, where the second electrode 307 includes a source 3071 and / or a drain 3072 of the TFT switching device, the source 3071 and / or the drain 3072 is electrically connected to the polysilicon layer 303 through a through hole extending through the second insulation layer 306 and the gate insulation layer 304, and the planarization layer 308 covers the second electrode 307 and the second insulation layer 306. The first electrode 305 includes a gate 3051 of the TFT switching device, and the pixel electrode 3010 is electrically connected to the drain 3072 of the TFT switching device through a through hole 3011 extending through the first insulating layer 309, the common electrode layer 31, and the planarization layer 308. It is noted that the buffer layer 302 may be omitted and the polysilicon layer 303 may be directly disposed on the substrate 301.Note that FIG. 5, which is a schematic diagram of the structures of different film layers, schematically shows the structures of two TFT switching devices. In general, a TFT switching device electrically connected to the pixel electrode 3010 within the display area A is configured to control display of an image, and a TFT switching device within the edge area P is configured to control a signal. In addition, in the present embodiment, the signal line a may be a metal electrode that is either the first electrode 305 or the second electrode 307, i.e., the signal line a may be formed on one of two film layers (i.e., on the gate insulating layer or the second insulating layer) in the edge region P, and may be certainly disposed at some positions on the two film layers as desired, as indicated in FIG. 5. The signal from the signal lines may be a signal having a pulse waveform, and more specifically, a clock signal, and the clock signal may be a horizontal clock signal (CKH) or a vertical clock signal (CKV). The shield layer 35 can shield the signal from the signal line a below the shield layer 35, thereby protecting the field from the EMI caused by the signal.Referring to FIG. 4, the peripheral region P of the TFT array substrate may further optionally include a GND line 36, which may be a closed GND line surrounding the display region A to further shield the EMI. The display panel can be better protected from the EMI caused by the signal from the signal lines based on the above structure using the GND line.The present embodiment further provides a display panel including the TFT array substrate described in any of the above embodiments. In one implementation, the display panel is a liquid crystal display panel. When the display panel having the TFT array substrate described in any of the above embodiments is used in manufacturing an electronic device such as a mobile phone, EMI in the mobile phone caused for a communication signal of the mobile phone can be reduced, thereby enhancing a definition of the communication signal of the mobile phone.Moreover, the present embodiment further provides a display device including the display panel described in any one of the above embodiments. In one implementation, the display device is a liquid crystal display device having the display panel and a backlight unit, it goes without saying that the display device may be of another type, for example a display device without a backlight unit.In the TFT array substrate, the display panel, and the display device according to the above embodiment of the present disclosure, the common electrode layer extends to the edge portion within the display region to form a shield layer covering the signal lines in the edge portion, to shield the EMI caused by the signal from the signal lines, thereby improving stability and reliability of the TFT array substrate, the display panel, and the display device.FIGS. 6 and 7 show a TFT array substrate according to an embodiment of the present disclosure. The embodiment will be described in more detail with respect to the above embodiment.FIG. 6 is a schematic diagram of the TFT array substrate according to the embodiment of the present disclosure, FIG. 7 is a schematic cross-sectional view of the TFT array substrate taken along a line CC 1 in FIG. 6 according to the third embodiment of the present disclosure, and the description of the embodiment of the present disclosure will now be made below by combining FIGS. 6 and 7.As shown in FIG. 6, the TFT array substrate 4 has a display area A and an edge area P surrounding the display area A, that is, the edge area P is formed by an area between an outer edge of the TFT array substrate 4 and a boundary of the display area A. Wirings or other elements such as a flexible printed circuit 41, an integrated circuit 42, and various signal lines (not shown in FIG. 6 ) are arranged in the peripheral region P. In addition, the peripheral portion P further includes a shield layer 44 formed above a region in which the signal lines are arranged, and the shield layer 44 covers the region in which the signal lines are arranged to protect the display panel from the EMI caused by the signal from each of the signal lines within the region in which the signal lines are arranged. In the present embodiment, the peripheral portion P further includes a GND line 45, and the shield layer 44 may be electrically connected to the GND line 45.Referring specifically to FIG. 7, the array substrate includes: a substrate 401; a planarization layer 408 above the substrate 401 where the planarization layer 408 covers the display region A and the edge region P; a common electrode layer 409 disposed on the planarization layer 408 and in the display region A; a first insulating layer 4010 covering the planarization layer 408 and the common electrode layer 409 where the first insulating layer 4010 covers the display region A and the edge region P; a shield layer 44 disposed on the first insulating layer 4010 and electrically connected to the GND line 45 below the planarization layer 408 through a via hole 4012; and a pixel electrode 4011 disposed on the first insulating layer 4010 and electrically connected to a switching device below the planarization layer 408 through a via hole 4013.In the present embodiment, the switching device may be a TFT switching device. In the present embodiment, the shield layer 44 is electrically connected to the GND line 45 in the peripheral region P so that the electric potential of the shield layer 44 is 0 V, and the signal can be shielded from the signal line a below the shield layer 35, thereby protecting the field from the EMI caused by the signal.In one implementation, the array substrate between the substrate 401 and the planarization layer 408 may further specifically include: a buffer layer 402 on the substrate 401; a polysilicon layer 403 on the buffer layer 402; a gate insulation layer 404 covering the polysilicon layer 403; a first electrode 405 on the gate insulation layer 404; a second insulation layer 406 covering the first electrode 405; and a second electrode 407 on the second insulation layer 406 where the second electrode 407 includes a source 4071 and / or a drain 4072 of the TFT switching device, the source 4071 or the drain 4072 is electrically connected to the polysilicon layer 403 through a through hole extending through the second insulation layer 406 and the gate insulation layer 404, and the planarization layer 408 covers the second electrode 407 and the second insulation layer 406. The first electrode 405 includes a gate 4051 of the TFT switching device, the second electrode 407 may include the GND line 45, the shield layer 44 is electrically connected to the GND line through the through hole 4012 extending through the first insulating layer 4010 and the planarization layer 408, and the pixel electrode 4011 may be electrically connected to the drain 4072 of the TFT switching device through the through hole 4013 extending through the first insulating layer 4010, the common electrode layer 409, and the planarization layer 408. In one implementation, the pixel electrode 4011 is made of a conductive material and the shield layer 44 may be made of the same material as the pixel electrode 4011 or another conductive material, but the present disclosure is not limited thereto. As a variant of the embodiment, the pixel electrode 4011 and the shield layer 44 may be formed in the common process by using the same material to simplify the process of forming the pixel electrode 4011 and the shield layer 44. It is noted that the buffer layer 402 may be omitted, i.e., the polysilicon layer 403 may be directly disposed on the substrate 401.In the present embodiment, the signal line a may be a metal electrode that is either the first electrode 405 or the second electrode 407, i.e., the signal line a may be formed on one of two film layers (i.e., on the gate insulating layer or the second insulating layer) in the edge region P (for example, the signal line a is formed in the first electrode 405 as shown in FIG. 7 ), or may be disposed on both of the two film layers. The signal from the signal lines may be a signal having a pulse waveform, and more specifically, a clock signal, and the clock signal may be a horizontal clock signal (CKH) or a vertical clock signal (CKV). The shield layer 44 may shield the pulse signal or the clock signal from the signal line a below the shield layer 44, thereby protecting the field from the EMI caused by the pulse signal or the clock signal.The present embodiment further provides a display panel including the TFT array substrate described in any of the above embodiments. In one implementation, the display panel may be a liquid crystal display panel. When the display panel having the TFT array substrate described in any of the above embodiments is used in manufacturing an electronic device such as a mobile phone, EMI in the mobile phone caused for a communication signal of the mobile phone can be reduced, thereby enhancing a definition of the communication signal of the mobile phone.Moreover, the present embodiment further provides a display device including the display panel described in any one of the above embodiments. In one implementation, the display device may be a liquid crystal display device including the display panel and a backlight unit, and may be another display device, for example, a display device without a backlight unit.In the TFT array substrate, the display panel, and the display device according to the third embodiment of the present disclosure, a shielding layer is electrically connected to the GND line and covers the signal lines in the peripheral area to shield the EMI caused by the signal on the signal lines, thereby improving stability and reliability of the TFT array substrate, the display panel, and the display device.

Claims

A TFT array substrate (2, 3) comprising: a substrate (301); a display area (A) and a peripheral area (P) surrounding the display area (A), both disposed on the substrate (301); wherein the peripheral portion (P) comprises a signal line (23, a) and a shielding layer (24, 35) disposed on the signal line (23, a), and the shielding layer (24, 35) covers the signal line (23, a) to shield EMI (electromagnetic interference) caused by a signal outputted by the signal line (23, a), and wherein the display portion (A) comprises a common electrode layer (31) extending to the peripheral portion (P), wherein the common electrode layer (31) and the shielding layer (35) are formed by a common film layer and electrically connected to each other, wherein the common electrode layer (31) is located between a pixel electrode (3010) and a TFT switching device in portions.The TFT array substrate of claim 1, wherein the shield layer (24, 35) is electrically connected to an electric potential in a range of +0.5 V to -0.5 V.The TFT array substrate of claim 2, wherein the peripheral portion (P) further comprises an integrated circuit (22, 33) or a flexible printed circuit (21, 32) electrically connected to the substrate (301), and the electric potential of the shield layer (24, 35) is provided by the integrated circuit (22, 33) or the flexible printed circuit (21, 32).The TFT array substrate of claim 2, wherein the electric potential of the shield layer (24, 35) is equal to that of the common electrode layer (31).The TFT array substrate of claim 2, wherein the TFT array substrate (2, 3) further comprises a GND line (36) in the peripheral region (P).The TFT array substrate of claim 5, wherein the array substrate (2, 3) comprises: a planarization layer (308) disposed on the substrate (301) and covering the display region (A) and the edge region (P); the common electrode layer (31) disposed on the planarization layer (308) and in the display region (A); a first insulation layer (309) covering the planarization layer (308) and the common electrode layer (31) and covering the display region (A) and the edge region (P); the shield layer (24, 35) disposed on the first insulation layer (309) and electrically connected to a switching device below the planarization layer (308) through a through hole;The TFT array substrate of claim 6, wherein between the substrate (301) and the planarization layer (308), further comprising: a polysilicon layer (303) above the substrate (301); a gate insulation layer (304) covering the polysilicon layer (303); a first electrode (305) disposed on the gate insulation layer (304); a second insulation layer (306) covering the first electrode (305); a second electrode (307) disposed on the second insulation layer (306) and comprising a source (3071) or a drain (3072) of the TFT switching device, wherein the source (3071) or the drain (3072) is electrically connected to the polysilicon layer (303) through a through hole (3011) extending through the second insulation layer (306) and the gate insulation layer (304); the planarization layer (308) covering the second electrode (307) and the second insulation layer (306), and wherein the second electrode (307) comprises the GND line (36); and the pixel electrode (3010) electrically connected through a via hole (3011) to the drain (3072) of the TFT switching device, which extends through the first insulation layer (309), the common electrode layer (31), and the planarization layer (308).A display panel comprising the TFT array substrate (2, 3) of any one of claims 1-7.A display device comprising the display panel of claim 8.

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