A device and a method for processing a signal that depends on a received radio frequency signal

Abstract

A device (200, 300) for processing a signal dependent on a received radio frequency signal (199), comprising: a first semiconductor circuit (210) comprising a first part of a radio frequency receiver (240) and a first data converter (250) configured to convert a data value of the signal, which depends on the received radio frequency signal, from a first data format into a second data format; a second semiconductor circuit (230) comprising a second part of the radio frequency receiver (270) and a second data converter (260) configured to convert data representing the data value in the second data format into the first data format, wherein the second part of the radio frequency receiver (270) comprises at least one sampling rate converter (271) configured to convert a sampling rate based on the signal dependent on the received radio frequency signal into a sampling rate dependent on a sampling rate of the baseband processing unit (280); and a digital interface (220) configured to transmit data relating to the signal dependent on the received radio frequency signal from the first semiconductor circuit (210) to the second semiconductor circuit (230), wherein the first data converter (250) is configured to provide the data representing the data value in the second data format to the digital interface (220).

Description

Area

[0001] Examples refer to devices and methods for processing a signal that depends on a received radio frequency signal. background

[0002] US 7,787,525 B1 relates to a method for transmitting well drilling data over multiple carrier frequencies.

[0003] US 2012 / 0250740A1 relates to a method and apparatus that provide OFDM signal compression for transmission over serial data links in a baseline transceiver system (BTS) of a wireless communications network. For the uplink, an RF unit of the BTS applies OFDM cyclic prefix removal and OFDM frequency transformation to the baseband signal samples, followed by frequency domain compression of the baseband signal samples resulting from analog-to-digital conversion of the received analog signals, followed by digital downconversion, which forms compressed coefficients. After transmission over the serial data link, the baseband processor applies frequency domain decompression to the compressed coefficients before further signal processing.For the downward connection, the RF unit performs a frequency domain decompression of the compressed coefficients and applies an inverse OFDM frequency transformation of the decompressed coefficients and a cyclic OFDM prefix insertion before performing a digital up-conversion and a digital-to-analog conversion to generate the analog signal for transmission over the antenna.

[0004] In mobile communication devices, radio frequency receivers (RF receivers; RE = Radio Frequency) or RF transceivers and baseband processing units can be provided on separate semiconductor chips or dies connected via an interface, such as a digital interface. RF receivers or radio frequency transceivers can be very complex and limited in terms of available space on the die. Furthermore, the die that carries the RF receiver or transceiver may be located on a less advanced design node than the die that carries the baseband processing unit; for example, the die containing the baseband processing unit may be located on a 5- to 14-nm design node, whereas the die containing the RF receiver or transceiver may be located on a 28-nm, 40-nm, or 65-nm design node, or even a larger design node.

[0005] RF signals received by the RF receiver or transceiver can be digitally processed within the receiver or transceiver. For transmission of the digital signal via a digital interface, the signal may be scaled to a target value close to the saturation level of the digital interface to prevent signal quality loss if the digital interface has a lower resolution than the RF transceiver and / or the baseband processing unit. The required signal gain can be determined based on the strength of the received signal. However, the strength of the received signal can vary dynamically and too rapidly for an accurate determination of the required gain.Therefore, the digital signal can be scaled to values ​​above the saturation level of the digital interface, so the waveform of the digital signal is not preserved. This effect is known as clipping. Consequently, data transmission over the digital interface can cause throughput degradation in the case of dynamically varying signal strength. Thus, there may be a desire for improved processing of a received radio frequency signal. Brief description of the characters

[0006] Some exemplary embodiments of devices and / or methods are described below only by way of example and with reference to the accompanying figures, in which Fig. 1 represents a device comprising a radio frequency receiver and a baseband processing unit connected via a digital interface; Fig. 2 represents an example of a device for processing a signal that depends on a received radio frequency signal; Fig. 3 represents an example of an integer-floating-point-integer conversion; Fig. 4 represents another example of an integer-floating-point-integer conversion; Fig. 5 examples of a data stream; Fig. 6 represents another example of a data stream; Fig. 7 presents an example of a device for processing a signal that depends on a received radio frequency signal, based on the example of Fig. 2; Fig. 8 an example of a device based on the example of Fig. 7 represents; Fig. 9 represents an example of a mobile communications device which includes an example of a device for processing a signal that depends on a received radio frequency signal; and Fig. Figure 10 shows a flowchart of an example of a procedure for processing a signal that depends on a received radio frequency signal. Detailed description

[0007] Several examples will now be described in more detail with reference to the accompanying drawings, which illustrate some of these examples. For the sake of clarity, the thickness of the lines, layers, and / or regions in the figures may be exaggerated.

[0008] While various modifications and alternative forms of further examples are possible, some examples are shown in the figures and described in detail here. It is understood, however, that the intention is not to limit examples to the specific revealed forms, but rather that the examples should encompass all modifications, correspondences, and alternatives falling within the scope of revelation. Throughout the description of the figures, identical numbers refer to the same or similar elements.

[0009] It is understood that when an element is described as "connected" or "coupled" to another element, it may be directly connected or coupled to the other element, or there may be intermediate elements. Conversely, when an element is described as "directly" "connected" or "coupled" to another element, there are no intermediate elements. Other words used to describe the relationship between elements should be interpreted similarly (e.g., "between" versus "directly between," "adjacent" versus "directly adjacent," etc.).

[0010] The terminology used here is intended only to describe specific examples and is not meant to be limiting to further examples. According to our usage, the single forms "ein, eine" and "das, der, die" should also include the plural forms unless the context clearly indicates otherwise. Furthermore, it is understood that the terms "umfasst," "umfassend," "aufweisen," and / or "aufweisend," as used here, indicate the presence of specified features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0011] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as they are normally understood by a person skilled in the art in the field to which the embodiments belong. Furthermore, it is understood that terms, e.g., those defined in commonly used dictionaries, should be interpreted as having a meaning corresponding to their meaning in the context of the relevant technology, unless they are expressly defined otherwise herein.

[0012] Fig. 1 represents a device 100 comprising a radio frequency receiver (RF receiver) 140 and a baseband processing unit 180, which are connected via a digital interface 120. Fig. Figure 1 represents a specific example of a processing chain for receiving and decoding a signal received via, for example, a mobile communications network, in order to process a payload transmitted to a mobile device or mobile connection. The RF receiver 140 is provided on a first semiconductor circuit 110, which can be, for example, a first semiconductor die or a first semiconductor chip. The baseband processing unit 180 is provided on a second semiconductor circuit 130, which can be, for example, a second semiconductor die or a second semiconductor chip.

[0013] A received RF signal 199 is provided to the RF receiver 140 by, for example, an antenna element or a duplexer (not shown). The received RF signal 199 is provided to a low-noise amplifier (LNA; ENA = Low Noise Amplifier) ​​141, which can amplify a potentially weak signal while adding as little noise and distortion as possible. The LNA 141 amplifies the received RF signal 199 and provides it to the mixer 142.

[0014] The in Fig. The receiver 140 shown in Figure 1 comprises two signal paths, 140-1 and 140-2. Signal paths 140-1 and 140-2 are identical or similarly constructed (e.g., for a low-intermediate-frequency receiver (IF = Intermediate Frequency), or a heterostructure may include a digital mixer or a processing unit that executes a so-called CORDIC algorithm (CORDIC = Coordinate Rotation Digital Computer) to shift the low IF of a received signal). That is, both signal paths 140-1 and 140-2 comprise similar elements or elements that have the same functionality. For example, signal path 140-1 can be used to generate a digital in-phase component (I) from the received RF signal 199 and to process the in-phase component.Signal path 140-2 can be used to generate a digital quadrature component (Q) from the received RF signal 199 and to process the quadrature component. However, other signal representations, such as a polar representation, are also feasible, which leads to a different design. The identical elements or elements with the same functionality contained in the two signal paths 140-1 and 140-2 are described below for only one of the signal paths 140-1 and 140-2 to avoid redundancy. It is understood that the descriptions for the individual signal paths are not identical.

[0015] The explanations given for each element may be applicable to the respective element in both signal paths 140-1 and 140-2. Due to the identical functionality, only a single reference symbol is used for identical elements or elements exhibiting the same functionality within the different signal paths 140-1 and 140-2.

[0016] Mixer 142 is used in receiver 140 to down-mix the received RF signal 199 to a baseband receive signal. Mixer 142 uses a local oscillator signal for this down-mixing of the received RF signal 199. The local oscillator signals provided to the respective mixers 142 contained in signal paths 140-1 and 140-2 can have a phase difference of 90° to generate the in-phase and quadrature components.

[0017] The baseband receive signal generated by mixer 142 is supplied to a low-pass filter 143, which filters the baseband receive signal to remove signal components outside a desired frequency band. For example, the desired frequency band can include frequencies of a desired receive channel and frequencies from one or more adjacent receive channels.

[0018] The analog, frequency-filtered baseband receive signal is provided to an analog-to-digital converter (ADC; ADC = Analog-to-Digital Converter) 144, which provides a digital baseband receive signal based on the analog baseband receive signal.

[0019] The digitized baseband receive signal is provided to a unit 145, which includes one or more decimation filters. The decimation filter reduces the sampling rate of the baseband receive signal. Therefore, processing efforts at subsequent processing units can be reduced. For example, the decimation filter can be implemented as a cascaded integrator comb filter (CIC). The CIC can enhance the dynamic range of noise-shaped signals from the ADC 144 and remove blocking signals with a large frequency offset from the desired signal.

[0020] The baseband receive signal is provided to a unit 146, which includes a low-pass filter for adjacent channel suppression. Similar to unit 145, unit 146 allows the sampling rate of the baseband receive signal to be reduced and signal components in frequency bands outside the frequency band of a desired receive channel to be suppressed. Accordingly, a baseband receive signal containing only filtered remnants of adjacent receive channels is provided at the output of unit 146.

[0021] In units 145 and 146, the sampling rate of the baseband receive signal is reduced to a rate closer to the theoretical lower limit given by the Nyquist-Shannon sampling theorem. Therefore, reducing the sampling rate of the baseband receive signal in units 145 and 146 does not result in any loss of signal information, as only the bandwidth of the baseband receive signal is reduced.

[0022] An offset correction unit 147 is provided, which estimates an amplitude (DC) offset of the baseband receive signal. The amplitude offset may be caused by systematic effects within the preceding processing elements. In particular, the DC offset may be caused by the mixer 142 and the ADC 144. The offset correction unit 147 further removes the estimated DC offset from the baseband receive signal. For example, the offset correction unit 147 can subtract an averaged amplitude of the baseband receive signal from the amplitude of the baseband receive signal.

[0023] A sample rate converter 148 is used to convert the sample rate of the baseband receive signal into a sample rate used by the digital interface 120. For example, the sample rate of the digital interface can be twice the symbol rate of a baseband signal in a Universal Mobile Telecommunications System (UMTS). For example, the symbol rate can be 3.84 MSPS (megasamples per second), so the sample rate of the digital interface 120 can be 7.68 MSPS. A Long Term Evolution system (LTE system) can, for example, use a sample rate of 30.72 MSPS (LTE 20), so the sample rate of the digital interface 120 can be 30.72 MSPS. This means that the sampling rate of the baseband receive signal provided to the sampling rate converter 148 is converted into the current sampling rate of the digital interface 120.

[0024] A signal correction unit 149 follows the sample rate converter 148. Ideally, the I and Q components should be orthogonal to each other, in phase, and have the same amplitude. However, due to the different signal path environments and component characteristics in the signal paths, there can be a phase and amplitude offset that needs to be compensated. The signal correction unit 149 corrects phase variations that can occur due to different signal propagation times in the LNA 141 for different gain settings of the LNA 141. Furthermore, the signal correction unit 149 corrects imbalances between the I component processed in signal path 140-1 and the Q component processed in signal path 140-2. Imbalances between the I and Q components can occur due to minute mismatches in the corresponding units of signal paths 140-1 and 140-2.

[0025] A unit 150, comprising a channel filter, is provided downstream of the signal correction unit 149 and limits frequencies of the baseband received signal to a frequency range of the desired received channel. That is, remnants of adjacent received channels are filtered by the channel filter, so that a baseband received signal can be provided that only includes signal components with frequencies of the desired received channel. Furthermore, the unit includes a bandpass equalizer for compensating for any distorting amplitude and delay characteristics of the desired received channel, so that the signal characteristics of the signal output by the bandpass equalizer are essentially constant with respect to amplitude and linear in phase across the frequency band of the desired received channel.For a code division multiple access system (CDMA system; CDMA = Code Division Multiple Access), the signal correction unit 149 can, for example, further pulse-shape the baseband received signal to provide a required root-raised cosine (RRC) overall filter response from an antenna element (not shown) to an output of the signal correction unit 149.

[0026] The baseband received signal is then provided to an amplification unit 151. The amplification unit 151 amplifies the amplitude of the baseband received signal to a setpoint, which may, for example, be close to the saturation level of the digital interface 120. The setpoint can be chosen such that the amplitude of the baseband received signal is below the saturation level of the digital interface 120 in order to maintain a waveform of the baseband received signal. In other words, the setpoint can be chosen to avoid clipping of the baseband received signal. On the other hand, the amplitude of the baseband received signal should be chosen as high as possible to minimize distortion due to quantization noise of the digital interface 120.

[0027] The gain factor of the amplification unit 151 is determined and controlled by a gain control unit 152. The gain control unit 152 can determine the gain factor based on the signal strength of the baseband receive signal input to the amplification unit 151 and the signal strength of the baseband receive signal output by the amplification unit 151. For example, the signal strength of the baseband receive signal input to the amplification unit 151 is determined by a first signal strength determination unit 153, which determines the signal strength of the baseband receive signal at the output of the ADC 144 in the digital domain. The signal strength of the baseband receive signal output by the The signal strength output of amplification unit 151 is determined, for example, by a second signal strength determination unit 154, which determines the signal strength of the baseband signal at the output of amplification unit 151. The signal strengths determined by the first and second signal strength determination units 153 and 154 are input to the amplification control unit 152. For example, the amplification control unit 152 compares the maximum amplitude of the baseband received signal, determined by the second signal strength determination unit 154, with the selected setpoint. The amplification control unit 152 thus determines whether the currently used gain factor needs to be adjusted or not. Furthermore, the amplification control unit 152 uses, for example,the signal strength determined by the first signal strength determination unit 153 in order to adjust the gain factor to a varying signal strength of the baseband received signal that is input into the gain unit 151.

[0028] The amplified baseband receive signal is provided to the digital interface 120, which transmits the baseband receive signal to the second semiconductor circuit 130, which comprises the baseband processing unit 180. The baseband processing unit further performs baseband processing, such as demapping of symbols transmitted by the baseband receive signal.

[0029] The Digital RF Interface (DigRF) 120 is capable of transmitting a data value or symbol of the baseband receive signal with a certain bit length. For example, the bit length can be 10 bits. This means that the amplitude of the data value or symbol of the baseband receive signal must be representable by 10 bits to maintain a waveform of the baseband receive signal. In this example, the target value is chosen such that the maximum amplitude of the baseband receive signal is close to the maximum amplitude value minus a crest factor (in dB), i.e., a factor that indicates the ratio of peak values ​​to the RMS value of the baseband receive signal. The maximum amplitude value that can be processed by the Digital RF Interface 120 is known as the saturation level.If the data format is a signed 10-bit integer format, the maximum numerical amplitude that can be processed by the 10-bit signed integer is 511. Accordingly, the numerical setpoint for the gain unit 151 should be a value less than 511, but close to this value. For example, the setpoint can be set to a level of -12 dB FS to -15 dB FS (decibels relative to full scale), i.e., a level 12 dB below the saturation level of the digital interface 120. In general, the above signal processing in the RF receiver 140 is necessary to fit, for example, a 10-bit integer representing a data value or symbol of the baseband received signal into, for example, the 10-bit wide digital interface 120.

[0030] If the signal strength of the received RF signal 199 varies dynamically, the signal strength of the baseband receive signal supplied to the amplifier unit 151 can also vary. Furthermore, different data allocations in the baseband receive signal can cause different signal strengths of the baseband receive signal supplied to the amplifier unit 151. The amplifier control unit 152 can adjust the gain factor of the amplifier unit to compensate for the signal strength variations to some extent. However, the amplifier control unit 152 cannot perfectly compensate for the signal strength variations of the baseband receive signal input to the amplifier unit 151, for example, in the presence of high bandwidth amplitude variations.Therefore, the baseband received signal output by the amplification unit 151 can have an amplitude exceeding the saturation level of the digital interface 120. Consequently, the waveform of the baseband received signal is not preserved. That is, clipping of the baseband received signal occurs. This can lead to a degradation of the throughput in the device 100.

[0031] In other words, the conventional Device 100 can use slow and fine gain scaling to fit within a small 10-bit DigRF window. This can be achieved by using a digital control loop on the RF chip and a setpoint of -12 to -15 dBFs level at a DigRF bottleneck. The setpoint can be chosen to be quite high, close to peak envelope saturation under static signal conditions, to minimize the negative effect of 10-bit DigRF quantization noise. However, dynamic scenarios can lead to saturation and thus throughput loss.

[0032] It is necessary to align variations in the gain factor of the gain unit with the processing in the baseband processing unit 180 to ensure that a baseband receive signal is provided to the baseband processing unit 180 with an amplitude within the expected range. Misalignment can cause faulty processing in the baseband processing unit 180 and thus degrade the throughput in the device 100. Therefore, an exchange of information about the gain factor is required between the receiver 140, contained in the first semiconductor circuit 110, and the baseband processing unit 180, contained in the second semiconductor circuit 130.

[0033] In other words, if digital gain changes are not aligned with baseband block processing, throughput degradation can occur.

[0034] If the signal is received with changing conditions (fading conditions) or has different data allocations, then the level control loop can saturate the signals at DigRF due to the periodically occurring signal level changes, leading to a degradation in throughput.

[0035] The second semiconductor circuit 130, which includes the baseband processing unit 180, can be provided in a first design node that is smaller than a second design node of the first semiconductor circuit 110, which includes the RF receiver 140.

[0036] The design node of a semiconductor circuit refers to the technology node where the semiconductor circuit is fabricated. For example, a 14 nm design node describes a technology node for fabricating a semiconductor circuit where a half-pitch, such as half the distance between identical features in an array, is 14 nm in a first wiring layer. For example, half the distance between two conductor paths in the first wiring layer of the semiconductor circuit might be 14 nm.

[0037] The RF receiver 140 comprises multiple processing units, which require a larger area due to the larger technology node of the semiconductor circuit 110 compared to the semiconductor circuit 130. The multiple processing units also increase the complexity of the semiconductor circuit 110. Consequently, the overall size of the device 100 is rather large.

[0038] According to the examples described herein, improved processing can be achieved for a signal that depends on a highly dynamic received RF signal, while reducing the overall size of a device for processing the signal that depends on the received RF signal compared to the conventional device 100.

[0039] Fig. Figure 2 shows an example of a device 200 for processing a signal that depends on a received RF signal 199. The device 200 comprises a first semiconductor circuit 210, which includes a first part of an RF receiver 240. The first semiconductor circuit 210 can be implemented, for example, as a first semiconductor die or a first semiconductor chip. The device 200 further comprises a second semiconductor circuit 230, which includes a second part of the RF receiver 270. In some examples, such as those relating to mobile communications, the second semiconductor circuit 230 can also include a baseband processing unit 280. The second semiconductor circuit 230 can be implemented, for example, as a second semiconductor die or a second semiconductor chip. Furthermore, the first and second semiconductor circuits 210, 230 can be provided within the same semiconductor chip or package.

[0040] The device 200 further comprises a digital interface 220, which transmits data relating to the signal, which depends on the received RF signal 199, from the first semiconductor circuit 210 to the second semiconductor circuit 230.

[0041] The first semiconductor circuit 210 further comprises a first data converter 250, which converts a data value of the signal dependent on the received RF signal 199 from a first data format to a second data format and provides data representing the data value in the second data format to the digital interface 220. The data value of the signal dependent on the received RF signal 199 can be provided to the first data converter 250 by the first part of the RF receiver 240.

[0042] The second semiconductor circuit 230 further comprises a second data converter 260, which converts the data representing the data value in the second data format into the first data format. The data in the first data format can be provided to the second part of the RF receiver 270. The second part of the RF receiver 270 can process the data in the first data format and provide it to the baseband processing unit 280, which can perform baseband processing such as remapping or demodulation.

[0043] Converting the data value of the signal, which depends on the received RF signal 199, from a first data format to a second data format can reduce the amount of data to be transmitted via the digital interface 220 to the second semiconductor circuit 230. Different data formats can be used for the first and second data formats. For example, the number of bits used to represent the data value in the first data format can be higher than in the second data format. Accordingly, a data value can be transmitted via the digital interface 220 using a reduced number of bits compared to the representation of the data value in the first part of the RF receiver 240 and the second part of the RF receiver 270.

[0044] In some examples, the second data format can use a reduced number of bits compared to the first data format, and a range of numbers that can be represented in the second data format can encompass almost the entirety, e.g., at least 95%, of a range of numbers that can be represented in the first data format. Thus, a range of numbers that can be transmitted over the digital interface 220 can be equivalent, i.e., almost identical, to a range of numbers that can be represented in the first part of the RF receiver 240 and the second part of the RF receiver 270. However, a reduced number of bits can be used for transmission over the digital interface 220.

[0045] In some examples, the first data format might be integer format and the second data format might be floating-point format. The floating-point format can represent a range of numbers that is equivalent to or nearly identical to a range of numbers that can be represented by the integer format. However, the floating-point format can use a reduced number of bits compared to the integer format because the exponential notation of the floating-point format allows for high dynamic range. For example, the number of bits used to represent the data value in the integer format might be from the interval starting at 14 and ending at 17, and the number of bits used to represent the data value in the floating-point format might be from the interval starting at 8 and ending at 11.

[0046] As an example, the device 200 can use a 14-bit integer representation in the first and second parts of the receiver 240, 270, and a 10-bit floating-point representation for the digital interface 220. Compared to the device 100, which uses the same data format for the receiver 140 and the digital interface 120, e.g., a 10-bit integer representation, a load on the digital interface 220 can be the same as or similar to a load on the digital interface 120. However, the device 200 can provide a larger numerical range for representing a data value. Accordingly, complex and error-prone scaling of signal amplitudes before providing the signal to the digital interface for transmission in the device 200 can be avoided.

[0047] In some examples, the second semiconductor circuit 230 can be provided in a second design node that is smaller than the first design node where the first semiconductor circuit 210 is provided. For example, the second semiconductor circuit is provided in a 5- to 14-nm design node, and the first semiconductor circuit is provided in a 14- to 65-nm design node or larger. The second part of the RF receiver 270 is provided on the second semiconductor circuit 230, so the size of the second part of the RF receiver 270 can be reduced compared to an equivalent RF receiver part on the first semiconductor circuit 210. Accordingly, the size of the device 200 can be reduced compared to the conventional device 100.Furthermore, the complexity of the first part of the RF receiver 240, which is contained in the first semiconductor circuit 210, can be reduced compared to the RF receiver 140, which is contained in the first semiconductor circuit 110 of the device 100.

[0048] The example of one in Fig. The device 200 shown in section 2 may have one or more additional optional features that correspond to one or more aspects of the proposed concept or to one or more examples described below.

[0049] Some examples relate to a means for processing the signal that depends on the received radio frequency signal. The means for processing the signal that depends on the received radio frequency signal comprises a first means for providing a semiconductor circuit that includes a first part of a means for receiving a radio frequency and a means for converting a data value of the signal that depends on the received radio frequency signal from a first data format to a second data format. The means for processing the signal that depends on the received radio frequency signal further comprises a second means for providing a semiconductor circuit that includes a second part of the means for receiving a radio frequency and a means for converting data representing the data value in the second data format to the first data format.Furthermore, the means for processing the signal dependent on the received radio frequency signal comprises a means for transmitting data relating to the signal dependent on the received radio frequency signal from the first means for providing a semiconductor circuit to the second means for providing a semiconductor circuit. The means for converting a data value of the signal dependent on the received radio frequency signal from a first data format to a second data format is configured to provide data representing the data value in the second data format to the means for transmitting data relating to the signal dependent on the received radio frequency signal.

[0050] The first means of providing a semiconductor circuit can be implemented by a first semiconductor circuit that is presented above or below (e.g. Fig. 2) is described. The second means of providing a semiconductor circuit can be implemented by a second semiconductor circuit, which is described above or below (e.g. Fig. 2) is described. The first part of the means for receiving a radio frequency may be implemented by a first part of an RF receiver, as described above or below (e.g. Fig. 2) is described. The second part of the means for receiving a radio frequency can be implemented by a second part of the RF receiver, as described above or below (e.g. Fig. 2) is described. The means for converting a data value of the signal, which depends on the received radio frequency signal, from a first data format into a second data format, can be implemented by a first data converter, which is described above or below (e.g. Fig. 2) is described. The second part of the means for receiving a radio frequency and a means for converting data representing the data value in the second data format into the first data format may be implemented by a second data converter, which is described above or below (e.g. Fig. 2) is described. The means for transmitting data relating to the signal, which depends on the received radio frequency signal, from the first means of providing a semiconductor circuit to the second means of providing a semiconductor circuit can be one of the above or below (e.g. Fig. 2) the described digital interface must be implemented.

[0051] Fig. 3 and Fig. Figure 4 presents examples of a conversion process for a data value from a first data format to a second data format and from the second data format back to the first data format. The examples in Fig. 3 and Fig. The 4 examples shown can represent the conversion of a data value of the signal, which depends on the received RF signal 199, in the first and second data converters 250, 260.

[0052] Fig. Section 3 represents the conversion of a data value, represented in the first data format as a signed 14-bit integer, into a signed 10-bit floating-point number. The first bit, i.e., the leftmost bit or most significant bit (MSB) of the signed 14-bit integer, can represent the sign of the data value. For example, the value 0 can be assigned a positive sign, while the value 1 can be assigned a negative sign. However, the assignment can also be reversed. The second through fourteenth bits of the signed 14-bit integer can represent the amplitude of the data value as a binary number. In the case described in Section 3, the amplitude of the data value can be represented as a binary number. Fig. In the example shown, the signed 14-bit integer 001110111110110 represents the value 3830 in decimal notation.

[0053] The signed 14-bit integer can be approximated by the signed 10-bit floating-point number. The first bit, i.e., the leftmost bit or MSB, of the signed 10-bit floating-point number can represent a sign s of the represented data value. For example, the value 0 can be assigned a positive sign, while the value 1 can be assigned a negative sign. However, the assignment can also be reversed. The second through seventh bits of the signed 10-bit floating-point number can be assigned a mantissa m of the floating-point number, and the eighth through tenth bits of the signed 10-bit floating-point number can be assigned an exponent e of the floating-point number. However, other assignments of the bits to the mantissa and exponent are also possible. In the Fig. In the example shown, the signed 10-bit floating-point number s:0 m: 111011 e:110 represents the value 3776 in decimal notation.

[0054] At the in Fig. In the example shown, the signed 10-bit floating-point number s:0 m: 111011 e:1 10 is converted back into a signed 14-bit integer 00111011000000, which represents the value 3776 in decimal notation.

[0055] For example, the first data converter 250 can convert a data value of the signal, which depends on the received RF signal 199, represented as a signed 14-bit integer, into a signed 10-bit floating-point number and provide the signed 10-bit floating-point number to the digital interface 220. The digital interface 220 can transmit the signed 10-bit floating-point number to the semiconductor circuit 230, and the second data converter 260, provided in the semiconductor circuit 230, can convert the signed 10-bit floating-point number back into a signed 14-bit integer.

[0056] It is from the in Fig. As the example shown in point 3 clearly demonstrates, the integer-floating-point-integer conversion may not be perfectly precise in some cases. However, this conversion error is negligible.

[0057] Due to the varying signal strength of the signal, which depends on the received RF signal 199, the amplitudes of its data values ​​can vary dynamically. Therefore, a dynamic range—e.g., a ratio between a maximum and a minimum value that can be represented—can be defined in Fig. The three data formats shown are an important aspect.

[0058] The in Fig. The 3-digit signed 14-bit integer shown can represent values ​​between 8191 (as 01111111111111) and 1 (as 00000000000001) (absolute values ​​are taken into account). The dynamic range (DR) in decibels (dB) can be determined, for example, according to... maximum representable valueDR=20 ■ log10(maximum representable value) minimum representable value

[0059] Thus, the signed 14-bit integer has a dynamic range of 78.27 dB.

[0060] The in Fig. The 10-bit signed floating-point number shown in Figure 3 can represent values ​​between 8064 (s:0 m: 111111 e:lll) and 1 (s:0 miOOOOO1 e:000). Therefore, the 10-bit signed floating-point number has a dynamic range of 78.13 dB, which is more than 99% of the dynamic range of the 14-bit signed integer and thus equivalent to the dynamic range of the 14-bit signed integer. The range of numbers that can be represented by the 10-bit signed floating-point number covers more than 99% of the range of numbers that can be represented by the 14-bit signed integer. However, the signed floating-point format can only use 10 bits, compared to the 14 bits of the signed integer format, to represent an almost identical range of numbers.

[0061] In some examples, the number of bits for a data value that can be transmitted through the digital interface 220 may be limited to a number from 8 to 11. Furthermore, the first part of the receiver 240 may use a signed integer from 14 to 17 to represent a data value of the signal that depends on the received RF signal 199. Accordingly, transmitting the data value as, for example, a signed 10-bit floating-point number via the digital interface 220 allows a dynamic range for transmission that is equivalent to a dynamic range of the first part of the receiver 240 using, for example, a signed 14-bit integer to represent the data value.

[0062] Fig. Figure 4 represents the conversion of a data value, represented in a first data format as a signed 15-bit integer, into a signed 11-bit floating-point number and back into a signed 15-bit integer, similar to the conversion in Fig. 3 situations depicted.

[0063] The first bit of a signed 15-bit integer can represent the sign of the data value. The second through fifteenth bits of a signed 15-bit integer can represent the amplitude of the data value. In the case of the Fig. In the example shown, the signed 15-bit integer 001110111010110 represents the value 7638 in decimal notation.

[0064] The first bit of the signed 11-bit floating-point number can represent a sign s of the represented data value. The second through eighth bits of the signed 11-bit floating-point number can be assigned to a mantissa m of the floating-point number, and the ninth through eleventh bits of the signed 11-bit floating-point number can be assigned to an exponent e of the floating-point number. However, other assignments of the bits to the mantissa and exponent are also possible. In the example in Fig. In the example shown in 4, the signed 11-bit floating-point number s:0 m:1110111 e:110 represents the value 7618 in decimal notation.

[0065] Regarding the in Fig. The example shown in point 3 is, in some examples, the approximation of the in Fig. The example shown in section 4 may not be perfectly precise. However, the dynamic range of the signed 11-bit floating-point number is 84.22 dB, which is equivalent to the dynamic range of the signed 15-bit number, which is 84.28 dB. Furthermore, for the example shown in section 4, the dynamic range is 84.22 dB. Fig. In example 4, the dynamic range for the signed floating-point number is more than 99% of the dynamic range of the signed integer and is therefore equivalent, although the floating-point format uses a reduced number of bits compared to the integer format. The range of numbers that can be represented by the 11-bit signed floating-point number covers more than 99% of the range of numbers that can be represented by the 15-bit signed integer. This is similar to the example shown in Fig. In the example shown in Figure 3, transmitting the data value, e.g. as a signed 11-bit floating-point number, via the digital interface 220 allows a dynamic range for transmission that is equivalent to a dynamic range within the first part of the receiver 240 using, e.g., a signed 15-bit integer to represent the data value.

[0066] A leading 1 of the mantissa m, e.g., an MSB of the mantissa m, may not be transmitted in some examples if the exponent e of the floating-point number is not 0. Furthermore, a trailing 1 of the mantissa m, e.g., a least significant bit (LSB) of the mantissa m, may not be transmitted in some examples if the exponent e of the floating-point number is 0. For example, only 110111 can be transmitted for the in Fig. The mantissa m: 1110111 shown in Figure 4 cannot be transmitted because the exponent is non-zero (e: 110). Therefore, a signed 10-bit floating-point number (without a leading or trailing 1 in the mantissa) can be used for transmission instead of the signed 11-bit floating-point number. For the value shown in Figure 4, the following applies: Fig. The example shown in Figure 4 can be the signed 10-bit floating-point number s:0 m: 110111 e:110. The omitted, leading, or trailing 1 can be taken into account by the second data converter 260. For example, the second data converter 260 can remove the omitted, leading, or trailing 1 of the floating-point number's mantissa before converting the floating-point number into, for example, a signed integer, as in Fig. As shown in Figure 4, add. Thus, transmitting the data value as, for example, a signed 10-bit floating-point number (without a leading or trailing 1 in the mantissa) via the digital interface 220 allows a dynamic range for transmission that is identical to the dynamic range of the signed 11-bit floating-point number used to represent the data value. However, by omitting a leading or trailing 1 in the mantissa, one bit can be saved, thereby reducing the load on the digital interface 220.

[0067] In some examples, a leading 1 of the mantissa m might not be transmitted if the exponent e of the floating-point number is non-zero. Similarly, in some examples, a trailing 0 of the mantissa m might not be transmitted if the exponent e of the floating-point number is zero. The omitted leading 1 or trailing 0 can be accounted for by the second data converter 260. For example, the second data converter 260 can remove the omitted leading 1 or trailing 0 of the floating-point number's mantissa before converting the floating-point number to, say, a signed integer, as in Fig. As shown in Figure 4, add. Accordingly, transmitting the data value, for example as a signed 10-bit floating-point number (without a leading 1 or trailing 0 of the mantissa) via the digital interface 220 allows a dynamic range for transmission that is identical to the dynamic range of the signed 11-bit floating-point number used to represent the data value. However, by omitting a leading 1 or trailing 0 of the mantissa, one bit can be saved, thus reducing the load on the digital interface 220.

[0068] In general, the number of bits used to represent the data value in the first data format can be higher than in the second data format. Furthermore, a range of numbers that can be represented in the second data format, using a smaller number of bits compared to the first data format, can encompass at least 95%, 98%, or 99% of a range of numbers that can be represented in the first data format.

[0069] In other words, a floating-point I / Q signal format can be used for digital I / Q data transmission from RF circuitry to BB circuitry. This floating-point format can use the same total bit width and data rates as conventional integer solutions, but due to the exponent of the floating-point number, it can offer higher numerical dynamic range. Higher dynamic signal quality can be achieved without changing the bandwidth required for DigRF.

[0070] Converting data from one data format to a second data format and back to a third data format, e.g., as in connection with Fig. 3 and Fig. As shown in Figure 4, it can be implemented as a hardware routine, e.g. using combinational logic, logic-state machines, etc., or as a program that has program code trained to perform the data conversion when the computer program is run on a computer or processor.

[0071] Fig. 5 and Fig. Figure 6 represents examples of data streams that are transferred via the digital interface 220 from the first semiconductor circuit 210 to the second semiconductor circuit 230. Fig. Figure 5 represents a situation where the data representing the data value in the second data format are represented by an in-phase component and a quadrature component (Cartesian representation). Fig. Figure 6 represents a situation where the data representing the data value in the second data format are represented by a radius component and a phase component (polar representation).

[0072] Fig. Figure 5 presents an example of a data stream 400-1 of data representing the data value in the second data format, which can be transmitted via the digital interface 220. The data representing the data value in the second data format can be transmitted by an in-phase component 410 and a quadrature component 420. In the Fig. In the example shown in Figure 5, the second data format is a signed 11-bit floating-point number, similar to the one in Figure 5. Fig. As shown in Figure 4, the in-phase component 410 can be represented by a one-bit sign 411, a seven-bit mantissa 412, and a three-bit exponent 413. The quadrature component 420 can be represented by a one-bit sign 421, a seven-bit mantissa 422, and a three-bit exponent 423. For example, 22 bits may be necessary to transmit a data value containing an in-phase component 410 and a quadrature component 420 in signed 11-bit floating-point format over digital interface 220.

[0073] Fig. Figure 5 further presents an example of a data stream 400-2, which allows the same data value in the signed 11-bit floating-point format to be transmitted over the digital interface 220 using a smaller total number of bits for the data value. Similar to data stream 400-1, data stream 400-2 can have a one-bit-wide sign 411 and a seven-bit-wide mantissa 412 for the in-phase component of the data value, as well as a one-bit-wide sign 421 and a seven-bit-wide mantissa 422 for the quadrature value. However, data stream 400-2 can use a common exponent 430 for both the in-phase and quadrature components.Using a common exponent 430 for the in-phase and quadrature components may be possible because the in-phase and quadrature components generally have a similar—or, in an idealistic first part of a receiver 240, an identical—amplitude and a phase difference of 90°. Using a common exponent 430 may allow the data value to be transmitted in signed 11-bit floating-point format over the digital interface 220 with 19 bits instead of 22 bits, as is the case for data stream 400-1.

[0074] However, data representing the data value in the second format may have a data format that differs from the one in Fig. The second data format differs from those shown in Figure 5. For example, the second data format can be a signed 10-bit floating-point format with a one-bit sign, a six-bit mantissa, and a three-bit exponent. Accordingly, 20 bits may be necessary to transmit a data value containing an in-phase component and a quadrature component in the signed 10-bit floating-point format over the 220 digital interface. 17 bits may be necessary if a common exponent is used for both the in-phase and quadrature components. It is obvious to a person skilled in the art that the number of bits for data representing the data value in the second data format is not limited to the examples above.

[0075] In general, using a common exponent for an in-phase component and a quadrature component of a data value in a floating-point format can reduce the number of bits required to represent the data value. A payload on the 220 digital interface can be further reduced if more than one in-phase component sample and more than one quadrature component sample are represented by a common exponent. Accordingly, the common exponent can be transmitted only once for multiple samples.

[0076] Fig. Figure 6 presents an example of a data stream 500 of data representing the data value in the second data format, which can be transmitted via the digital interface 220. The data representing the data value in the second data format can be represented by a radius component 510 and a phase component 520. In the case of the Fig. In the example shown in Figure 6, the second data format comprises a combined integer and floating-point format. The radius component 510, for example, can be represented by an unsigned 10-bit floating-point number with a seven-bit mantissa 511 and a three-bit exponent 512. The phase can be represented by a 10-bit integer 520. Using the data format of the data stream 500 allows a data value to be transmitted via the digital interface 220 using 20 bits. The data stream 500 can be generated in the first data converter 250 from a data value of the signal that depends on the received RF signal 199, which is represented in an integer format. However, a second data format, which has a combined integer and floating-point format, is not limited to the example above.Various combinations of different bit lengths for the mantissa 511, the exponent 512, the radius component 510 and the phase component 520 are possible.

[0077] Data stream 500 can potentially be generated by the first data converter with less effort compared to, for example, the data streams above in a pure floating-point format, since only the radius component 510 needs to be converted to the signed 10-bit floating-point format. Furthermore, data stream 500 can provide a dynamic range equal to that of a data stream in a pure floating-point format, since data stream 500 can provide a seven-bit mantissa 511 and a three-bit exponent 512 for the radius component 510, which The dynamics of the signal can be reproduced, which depends on the received RF signal 199. The dynamics of the 10-bit integer for the radius component 520 may be reduced compared to the unsigned floating-point number for the radius component 510, since the dynamics of the phase component 520 may be lower compared to the dynamics of the radius component 510.

[0078] Furthermore, in some examples, the first data converter 250 may not provide the most significant bit of a mantissa of the data representing the data value in floating-point format to the digital interface 220 if the exponent of the data representing the data value in floating-point format differs from a lowest possible exponent in floating-point format. As in conjunction with Fig. As described above, for example, a leading 1 of a mantissa may not be passed in some examples if the exponent of the floating-point number is not 0, and a trailing 1 of the mantissa may not be passed in some examples if the exponent of the floating-point number is 0. As described in conjunction with Fig. As described in section 4 above, for example, a leading 1 of a mantissa may not be transmitted in some examples if the exponent of the floating-point number is not 0, and a trailing 0 of the mantissa may not be transmitted in some examples if the exponent of the floating-point number is 0. Thus, the number of bits used to transmit data representing the data value in the second data format over interface 220 may be different compared to, for example, the number in Fig. 5 shown data stream 400-1 or the one in Fig. The data stream 500 shown in Figure 6 can be reduced. For example, a 6-bit mantissa can be used, compared to the 7-bit mantissa of data stream 400-1. Thus, a data value in the signed 11-bit floating-point format can be transmitted over the 220 digital interface with 20 bits instead of 22 bits, as is the case for data stream 400-1. Compared to data stream 500, a six-bit mantissa can be used instead of the 7-bit mantissa of 511, so that a data stream can be transmitted over the 220 digital interface with 19 bits instead of 20 bits, as is the case for data stream 500. The dynamic range of a floating-point number using a mantissa with a leading 1 / trailing 0,1 can be the same as the dynamic range of a floating-point number with a complete mantissa using a reduced number of bits.

[0079] A conversion of data from a first data format to a second data format (or vice versa) in the first data converter 250 and / or the second data converter 260 can be implemented, for example, as a hardware routine, e.g., using combinational logic, logic-state machines, etc., or as a program that has program code trained to perform the data conversion when the computer program is executed on a computer or processor of the first data converter 250 and / or the second data converter 260.

[0080] Fig. Figure 7 provides an example of an implementation of Device 200. Fig. 2. In particular, it represents Fig. 7 further optional elements of the first and second part of the RF receiver 240, 270.

[0081] The first part of the RF receiver 240 can include a low-noise amplifier (LNA) 241, which amplifies a potentially weak signal while adding as little noise and distortion as possible to the signal. The LNA 241 can receive and amplify the received RF signal 199 and can supply it to a mixer 242, which is included in the first part of the RF receiver 240.

[0082] The first part of the RF receiver 240 and the second part of the RF receiver 270, as shown in Fig. As shown in Figure 7, two signal paths, 240-1 and 240-2, can exist. These signal paths can be identical in structure. For example, both signal paths, 240-1 and 240-2, can include similar elements or elements with the same functionality. For instance, signal path 240-1 can be used to generate and process a digital in-phase component (I) from the received RF signal 199. Signal path 240-2 can be used to generate and process a digital quadrature component (Q) from the received RF signal 199. However, other signal representations, such as a polar representation, are also possible, leading to a different design.The same elements, or elements with the same functionality, contained in both signal paths 240-1 and 240-2 are described below for only one of the signal paths 240-1 and 240-2 to avoid redundancy. It is understood that the explanations given for each individual element may apply to that element in both signal paths 240-1 and 240-2. Due to the identical functionality, only a single reference symbol is used for identical elements, or elements with the same functionality, within the different signal paths 240-1 and 240-2.

[0083] Mixer 242 can down-mix the received RF signal 199 to a signal that depends on a received RF signal. Mixer 242 can use a local oscillator signal to down-mix the received RF signal 199. The local oscillator signals supplied to the respective mixer 242 contained in signal paths 140-1 and 140-2 can have a phase difference of 90° to generate the in-phase and quadrature components. For example, mixer 242 can be configured to perform a direct conversion, i.e., mixer 242 can use a frequency that is identical to, or very close to, a carrier frequency of an intended signal. The signal that depends on the received RF signal 199 can, for example, be a baseband receive signal.

[0084] The signal dependent on the received RF signal 199, as generated by the mixer 242, can be supplied to a filter element 243, which can filter the signal dependent on the received RF signal 199 to remove signal components outside a desired frequency band. For example, the desired frequency band can contain frequencies of a desired receiving channel and frequencies of one or more adjacent receiving channels. The filter element 243 can, for example, include a low-pass filter. The filter element 243 can, for example, perform coarse filtering around the desired receiving channel. For example, the filter element 243 can filter out any signal components outside the frequency bands of the desired receiving channel.

[0085] The RF receiver can further include an ADC 244. The analog signal, which depends on the received RF signal 199, can be provided to the ADC 244 by the filter element 243, and the ADC 244 can provide a digital signal, which depends on the received RF signal 199, based on the analog signal that depends on the received RF signal 199.

[0086] The digital signal dependent on the received RF signal 199 can further be provided to a first sampling rate reduction unit 245, which reduces the sampling rate of the signal dependent on the received RF signal 199. Therefore, processing efforts in subsequent processing units can be reduced. For example, the first sampling rate reduction unit 245 can include a decimation filter, which may be implemented as a CIC filter. The first sampling rate reduction unit 245 can further include a low-pass filter to correct decimation errors in the decimated signal dependent on the received RF signal 199. Furthermore, the low-pass filter can reduce the bandwidth of the signal dependent on the received RF signal 199. For example, the frequency range of the signal dependent on the received RF signal 199 can be narrowed by the low-pass filter.Thus, signal components of receiving channels adjacent to the desired receiving channel can be further reduced.

[0087] The first part of the RF receiver 240 can optionally include a second sampling rate reduction unit 246, which further reduces the sampling rate of the signal dependent on the received RF signal 199. The first sampling rate reduction unit 245 can be implemented in the same way as the first sampling rate reduction unit 245. The second sampling rate reduction unit 246 can allow a further reduction of the sampling rate of the signal dependent on the received RF signal 199 and reduce signal components in frequency bands outside the frequency band of the desired receiving channel. Accordingly, a signal dependent on the received RF signal 199, containing only filtered remnants of adjacent receiving channels, can be provided at the output of the second sampling rate reduction unit 246.

[0088] In the first and second sampling rate reduction units 245 and 246, the sampling rate of the baseband receive signal can be reduced to a sampling rate closer to the theoretically lower limit given by the Nyquist-Shannon sampling theorem. Thus, in some examples, reducing the sampling rate of the baseband receive signal may not cause any loss of signal information, since only the bandwidth of the baseband receive signal is reduced.

[0089] In other words, a low-pass filter on one RF side for adjacent channel power reduction (including rate decimation at the output) can reduce the adjacent channel power before transmitting this signal via DigRF and its integer-to-floating-point-to-integer conversion. This filter may not have a flat bandpass transfer characteristic in some examples (this relaxation can reduce the low-pass filter by an order of magnitude).

[0090] An offset correction unit 247 can be included in the first part of the RF receiver 240. The offset correction unit 247 can estimate a DC offset of the signal that depends on the received RF signal 199. The DC offset can be caused by systematic effects within the preceding processing elements. For example, the DC offset can be caused by the mixer 242. The offset correction unit 247 can further remove the estimated DC offset from the signal that depends on the received RF signal 199. For example, the offset correction unit 247 can subtract an averaged amplitude of the signal that depends on the received RF signal 199 from the amplitude of the signal that depends on the received RF signal 199. However, the offset correction unit 247 can use various other techniques to remove a DC offset from the signal that depends on the received RF signal 199.

[0091] The first part of the RF receiver 240 can further comprise a first signal information unit 248. The first signal information unit 248 can determine a first signal strength with respect to the signal that depends on the received RF signal 199. For example, the first signal information unit 248 can determine a signal strength of the signal that depends on the received RF signal 199, which is output by the ADC 244. The first signal information unit 248 can provide the first signal strength with respect to the signal that depends on the received RF signal 199 to the LNA 241. The LNA 241 can adjust an analog gain factor accordingly, which is used to amplify the received RF signal 199. Alternatively, the first signal information unit 248 can determine the analog gain factor of the LNA 241 and provide it to the LNA 241.The first signal information unit 248 can further determine analog gain information related to the received RF signal 199. For example, the first signal information unit 248 can determine the analog gain of the LNA 241 or can be supplied with information about the analog gain by the LNA 241. Information about the first signal strength related to the signal that depends on the received RF signal 199 can also be provided to the offset correction unit 247, which can use the information to estimate the DC offset.

[0092] The signal, which depends on the received RF signal 199, can be supplied by the offset correction unit 247 to the first data converter 250, which is enclosed in the first semiconductor circuit 210. The first data converter 250 converts a data value of the signal, which depends on the received radio frequency signal 199, from a first data format to a second data format and provides data representing the data value in the second data format to the digital interface 220. Examples of converting data from the first data format to the second data format are related to, for example, Fig. 3 and Fig. 4 described.

[0093] The digital interface 220 can have two separate elements for transmitting data from signal path 240-1 and signal path 240-2 in the second data format, as shown in Fig. Figure 7 illustrates the following. However, the digital interface 220 can also be implemented as a single element for transmitting data from signal path 240-1 and signal path 240-2 in the second data format. Examples of data streams transmitted through the digital interface 220 include, for example, Fig. 5 and Fig. 6 described.

[0094] In other words, I / Q sampling rates can be unaffected by integer-floating-point-integer conversion compared to Device 100, because the word length at the DigRF interface is the same as in conventional solutions (e.g., 10 bits).

[0095] The second data converter 260, contained in the second semiconductor circuit 230, receives data representing the data value in the second data format from the digital interface 220 and converts this data into the first data format. Examples of converting data from the second data format to the first data format include, for example, Fig. 3 and Fig. 4 described.

[0096] The data in the first data format can be provided to the second part of the RF receiver 270.

[0097] In some examples, the first data converter 250 can generate a difference value corresponding to the difference between the data representing the data value in the first data format and data representing a previous data value in the first data format. The first data converter can convert the difference value from the first data format to the second data format and provide data representing the difference value in the second data format to the digital interface 220. The second data converter 260 can, for example, convert the data representing the difference value in the second data format to the first data format and generate data representing the data value in the first data format using the difference value and data representing a previous data value in the first data format.

[0098] Using a differential value can allow improved signal transmission in the case of a relatively high DC offset and / or continuous periodic interference (CW interference; CW = Continuous Wave). CW interference can be characterized by crosstalk in the signal that depends on the received RF signal 199, caused by crosstalk or leakage of one of the local oscillator signals for the mixer 242 into the other local oscillator signal, since the frequency of both local oscillator signals can be provided at one input of the mixer 242.

[0099] Conversion errors related to the conversion from the first data format to the second data format and back to the first data format could accumulate when transmitting difference values ​​via the digital interface 220. For example, conversion errors could occur when converting from an integer format to a floating-point format and back to an integer format, as in connection with, for example, Fig. As described in section 3, accumulate. Accordingly, suitable data value correction processing can be performed in either the first data converter 250 or the second data converter 260. For example, for the integer-floating-point-integer conversion described in Fig. As shown in Figure 3, the difference data value in floating-point format, which is provided to the digital interface 220, is corrected in the first data converter 250 for the conversion error caused by the conversion from integer format to floating-point format. The conversion error can, for example, be calculated by the first data converter 250 so that the difference data value in floating-point format can be corrected with respect to this error.

[0100] To correct transmission errors of the digital interface 220, an offset correction unit can be provided in the second part of the receiver 270. For example, a transmission error can cause a modification of the differential data value transmitted in the second data format. Accordingly, the data representing the data value in the first data format and data representing subsequent data values ​​in the first data format, as provided by, for example, the second data converter 260, can be faulty. The transmission error can cause a DC variation of the signal that depends on the received RF signal 199 in the second part of the receiver 270. Thus, an offset correction unit can correct the transmission error. With regard to, for example, the in Fig. In the illustrated device 200, the offset correction unit 247 can be provided in the second part of the receiver 270 instead of the first part of the receiver 240.

[0101] As in Fig. As shown in Figure 7, the second part of the RF receiver 270 can include a sampling rate converter 271. The sampling rate converter 271 can convert a sampling rate based on the signal that depends on the received RF signal 199 into a sampling rate that depends on a sampling rate of the baseband processing unit 280.

[0102] The sampling rate, based on the signal that depends on the received RF signal 199, which is input into the sampling rate converter 271, can be compared with the device 100, which is in Fig. The sampling rate shown in Figure 1 can be reduced. As described above, the sampling rate of the digital interface 120 of the device 100 can be twice the symbol rate for UMTS. For example, the sampling rate of the digital interface 120 can be 7.68 MSPS for a symbol rate of 3.84 MSPS. The device 200, which includes the sampling rate converter 271 contained in the second part of the RF receiver 270, can allow a sampling rate at the digital interface 220 of, for example, 5 MSPS. Accordingly, processing efforts can be reduced due to the lower sampling rate. Taking ETE into account, the sampling rate of the digital interface 120 of device 100 can be 30.72 MSPS for LTE20. The device 200, which includes the sampling rate converter 271 contained in the second part of the RF receiver 270, can allow a sampling rate at the digital interface 220 of, for example, 5 MSPS. B. Allow 26.88 MSPS for LTE20.For example, the theoretical lower limit of the sampling rate for ETE 20 is 19 MSPS according to the Nyquist-Shannon sampling theorem. Thus, the device 200 can enable a sampling rate closer to the theoretical lower limit. Accordingly, processing efforts may be reduced due to the lower sampling rate.

[0103] In other words, the fractional converter on the BB side allows for lower IQ stream sampling rates than conventional approaches, resulting in less traffic on the DigRF interface. For example, for LTE20, the conventional 100-unit arrangement can use a sampling rate of 30.72 MSPS, while the example device can use a sampling rate between 19 MSPS and 30.72 MSPS. The presence of the fractional converter on the baseband side allows for a further reduction in the DigRF payload. A sampling rate between 30.72 MSPS and 19 MSPS can be used, and fractional rate conversion up to 30.72 MSPS can be performed on the baseband side, while, for example, only 26.88 MSPS is used on the DigRF interface.

[0104] A frequency filter 272 can be provided downstream of the sampling rate converter 271. The frequency filter 272 can provide the signal dependent on the received RF signal 199 within a given frequency band. For example, the frequency filter 272 can include a channel filter to limit frequencies of the signal dependent on the received RF signal 199 to a frequency band of the desired receiving channel. For instance, remnants of adjacent receiving channels can be filtered out by the channel filter, so that a signal dependent on the received RF signal 199 can be provided that comprises only signal components with frequencies of the desired receiving channel. Furthermore, the channel filter can compensate for the unwanted bandpass ripple caused by the first and second sampling rate reduction units 245, 246.The frequency filter 272 can further include a bandpass equalizer that compensates for distorting amplitude and delay characteristics of the desired receiving channel, so that the signal characteristics of the signal output by the frequency filter 272 are essentially constant with respect to amplitude and linear in phase over the frequency band of the desired receiving channel.

[0105] In other words, the channel filter on the BB side can be used to compensate for the unwanted bandpass ripple caused by the RF side (in addition to pulse shaping and residual suppression in the stopband).

[0106] The second part of the RF receiver 270 can include a gain unit 273. The gain unit 273 can modify the amplitude of the data being converted from the second data format to the first data format using a gain factor. The second part of the RF receiver 270 can further include a gain control unit 274 to determine the gain factor. The gain control unit 274 can determine the gain factor, for example, based on the first signal strength and / or the analog gain information provided by the first signal information unit 248, and a second signal strength related to the signal that depends on the received RF signal 199, which is provided by a second signal information unit 275.For example, the signal strength of the signal that depends on the received RF signal 199 at the output of the amplification unit 273 can be determined as the second signal strength by the second signal information unit 275. The amplification unit 273 can be placed downstream of the frequency filter 272 to ensure that only signal components within a frequency band of the desired receiving channel are amplified.

[0107] In other words, no gain unit and no gain control (AGC) are needed on the RF side due to the higher dynamic range of the floating-point format compared to the integer format. Consequently, communication between the BB and RF is reduced because the AGC and the digital gain block are located on the BB side.

[0108] A signal correction unit 276 can also be included in the second part of the RF receiver 260 to correct imbalances between the signals processed in signal paths 240-1 and 240-2. Ideally, the I and Q components should be orthogonal to each other, in phase, and have the same amplitude. However, due to the different signal path environments and component characteristics in the signal paths, there can be a phase shift and / or an amplitude shift. The signal correction unit 276 can correct phase variations that may occur due to different signal propagation times in the LNA 241 for different gain factors of the LNA 241. Furthermore, the signal correction unit 276 can correct imbalances between the I component processed in signal path 240-1 and the Q component processed in signal path 240-2.Imbalances between the I and Q components can occur, for example, due to minute mismatches in corresponding units of signal paths 240-1 and 240-2. For instance, in some cases, corresponding units in both signal paths 240-1 and 240-2 may not behave absolutely identically, which is usually the case for electronic devices, so slight variations—imbalances—can occur between the I and Q components. The signal correction unit 276 can detect and correct such imbalances.

[0109] The signal dependent on the received RF signal 199, which is output by the signal correction unit 276, can be provided to the baseband processing unit 280. The baseband processing unit 280 can perform baseband processing, such as remapping symbols transmitted by the signal dependent on the received RF signal 199.

[0110] Compared to the one in Fig. In the device 100 shown in Figure 1, the device 200 can accommodate part of the RF frequency receiver in the semiconductor circuit 230, which includes the baseband processing unit 280. Thus, the complexity of the semiconductor circuit 210, which carries the first part of the RF receiver 240, can be reduced compared to the semiconductor circuit 110 of device 100. Furthermore, the combined size of the first and second semiconductor circuits 210, 230 can be reduced compared to device 100 if the second semiconductor circuit 230 is provided in a smaller design node than the first semiconductor circuit 210.

[0111] In other words, RF transceivers using digital interface-to-baseband (BB) chips can become more complex with each generation. Very often, transceivers are built on an older design node / chip process compared to the baseband chips. Moving some digital blocks to the BB can reduce the overall modem combined die size (RF+BB) and simplify the RF. Conventional solutions that use a digital interface (e.g., DigRF) can use many digital blocks on the RF side, increasing the overall die size and complexity of the RF receiver. The proposed solution can reduce these efforts on the RF transceiver side (e.g., less filtering and signal processing on the RF side) and reduce the overall modem (RF+BB) die size, especially in cases where the BB is on a smaller design node / chip process.

[0112] The example of one in Fig. The device 200 shown in Figure 7 may include one or more additional optional features corresponding to one or more aspects of the proposed concept or to one or more examples described above or below.

[0113] Fig. 8 represents a device 300, which is a variation of the example of a in Fig. The device 200 shown in Figure 7 may be the first part of the RF receiver 240, the first data converter 250, and the digital interface 220. The first part of the RF receiver 240, the first data converter 250, and the digital interface 220 may be identical to those shown in Figure 7. Fig. 7. However, the arrangement of the second data converter 260 is relative to the second. Part of the RF receiver 270 differs from the one in Fig. The situation depicted in Figure 7. Furthermore, the structure of the second part of the receiver differs slightly from that shown in Figure 7. Fig. 7 people depicted.

[0114] In device 300, the amplification unit 273 is connected upstream of the second data converter 260. For example, the data representing the data value in the second data format is sent to the amplification unit 273 in the Fig. The example shown in Figure 8 is provided. The gain unit 273 can modify the amplitude of the data representing the data value in the second data format using a gain factor. The second part of the receiver 270 can include a gain control unit 277 to determine the gain factor. The gain control unit 277 can determine the gain factor based on the first signal strength and / or the analog gain information provided by the first signal information unit 248, and a second signal strength related to the signal that depends on the received RF signal 199.

[0115] The second part of the receiver 270 can include a second signal information unit 291. The second signal information unit 291 can determine the second signal strength based on the signal that depends on the received RF signal 199. For example, the second signal information unit 291 can determine the second signal strength based on information provided by the baseband processing unit 280. The baseband processing unit 280 can, for example, provide the second signal information unit 291 with a signal strength value for the signal that depends on the received RF signal 199, as determined in the baseband processing unit 280.Furthermore, the baseband processing unit 280 can provide additional information to the second signal information unit 291, such as a reference signal receive power (RSRP) for UMTS or common pilot channel power information (CPICH) for an LTE system. This information can be provided to the second signal information unit 291, for example, by a channel estimation unit 281 of the baseband processing unit 280.

[0116] The second signal information unit 291 can provide the second signal strength to a first gain matching unit 277-3, which can determine an auxiliary gain factor based on the second signal strength.

[0117] The gain control unit 277 can further include a second gain adjustment unit 277-4, which can receive the first signal strength and / or the analog gain information from the first signal information unit 248. The second gain adjustment unit 277-4 can determine a correction for the auxiliary gain factor based on the first signal strength and / or the analog gain information. For example, the second gain adjustment unit 277-4 can include a lookup table that stores corrections for different combinations of the first signal strength and the analog gain information.

[0118] The auxiliary gain factor and the correction for the auxiliary gain factor can be provided to a gain factor determination unit 277-1, which determines the gain factor based on these inputs. For example, the gain factor determination unit 277-1 can include an adder that adds the correction for the auxiliary gain factor to the auxiliary gain factor and provides the resultant to the gain unit 273 as the gain factor.

[0119] Placing the gain unit 273 upstream of the second data converter 260 can allow for more robust amplification of the signal that depends on the RF signal 199. For example, the amplitude of a 10-bit data value in a floating-point format can be modified by the gain unit 273. As discussed above, the floating-point format can have a dynamic range equivalent to that of an integer format using more bits, e.g., 14, to represent the data value. Accordingly, the floating-point format can offer adequate headroom, e.g., an adequate difference between an actual amplitude of the data value and a maximum possible amplitude. Thus, the gain factor may be adjusted less precisely compared to, e.g., the gain in the following example. Fig. Device 200 shown in Figure 7. Fine-tuning of the signal level, which depends on the received RF signal 189, can be achieved, for example, by a forwarding unit 281 of the baseband processing unit 280, which can forward the signal, which depends on the received RF signal 199, from the channel estimation unit 281 to an imaging unit or other elements of the baseband processing unit 280. Accordingly, the energy consumption of the second semiconductor circuit 230 can be reduced, for example, to the level shown in Figure 7. Fig. The device shown in section 7 is reduced to 200.

[0120] Since the gain factor for varying signal strengths, which can be related to a changing data allocation in the signal or changing received RF signals 199, may be adjusted less precisely, clipping of the signal that depends on the received RF signal 199 can be avoided compared to the setpoint scaling used in the Fig. Device 100 shown is used.

[0121] In other words, digital gain can be adjusted coarsely and therefore less frequently (to fit the IQ signal into, for example, the 12-14 bit window of a digital baseband signal processor). This allows for a further increase in signal quality. Fine-tuning of the level for the image (mapper) can be achieved by passing the channel estimator to the image. Coarse floating-point scaling can be used to fit into the larger window, such as a 12-14 bit word-length window, which provides greater headroom. This coarse scaling can be controlled by a baseband channel estimator (synchronized with the slot timing). Fitting into a wide quantization window can provide greater headroom for saturation while also maintaining good quantization noise.This can be advantageous for scenarios with periodic level changes (such as periodically changing data allocations or changing scenarios).

[0122] In device 200 and device 300, the amplification unit 273 is in the second Semiconductor circuit 230 is provided, which further comprises the baseband processing unit 280. An alignment of the gain factor for the gain unit 273 with the processing in the baseband processing unit 280 can be compared with the device 100 in Fig. This is facilitated because an exchange of information about the gain factor is only required between the second part of the receiver 270 and the baseband processing unit 280, both of which are provided in the second semiconductor circuit 230. An exchange of information between the first and second semiconductor circuits 210, 230 to align the gain factor with the processing in the baseband processing unit 280 can be avoided. In other words, the digital amplification can be synchronized with BB-slot processing.

[0123] In device 300, the functionality of the signal correction unit 276, which is located in Fig. Figure 7 shows the components divided into sections. An imbalance correction can be performed by an imbalance correction unit 279, which can be provided downstream of the frequency filter 272. A phase correction unit 278 can be provided between the second data converter 260 and the sample rate converter 271. The phase correction unit 278 can correct phase variations related to, for example, different propagation delays in the LNA 241 for different analog gain factors.

[0124] The phase correction unit 278 can be supplied with phase correction information by the phase information unit 278-1. The phase information unit 278-1 can be supplied with analog gain information by the first signal information unit 278 and can determine phase correction information based on the analog gain information. For example, the phase information unit 278-1 can include a lookup table that stores phase correction information related to the analog gain information.

[0125] Furthermore, the phase information unit 278-1 and the second gain adjustment unit 277-4 can be synchronized by the synchronization unit 290. The synchronization unit 290 can receive timing information from the first signal information unit 248 with respect to the initial signal strength and / or the analog gain information. The synchronization unit 290 can ensure that the phase information unit 278-1 and the second gain adjustment unit 277-4 process a corresponding initial signal strength and / or corresponding analog gain information.

[0126] The example of device 300 may have one or more additional optional features that correspond to one or more aspects of the proposed concept or to one or more of the examples described above or below.

[0127] In some examples, an offset correction unit may be provided in the second part of receiver 270. Regarding, for example, the one in Fig. 7 or Fig. In the device 200 shown in Figure 8, the offset correction unit 247 can be provided in the second part of the receiver 270 instead of the first part of the receiver 240. The offset correction unit can correct a DC offset block by block, e.g., with respect to data blocks. A gain control unit, e.g., the one shown in Figure 8, can be used to correct the offset correction unit. Fig. 7 shown, amplification control unit 274 or the one in Fig. The gain control unit 277, shown in Figure 8, can determine the gain factor block by block. For example, gain adjustment and DC offset removal can be performed on the same block on which data samples have been determined. Block-wise processing can indicate that a sequence of samples is assigned to an entity called a block. Some attributes can then be derived using all samples within the block, such as an averaged amplitude, which is used, for example, to correct a DC offset. Thus, no additional delay can be introduced. For example, in receiver 100, where DC offset correction and gain adjustment are performed in the RF receiver 140, it is necessary that each block is fully stored and reprocessed before the first IQ samples of each block can be transmitted via the digital interface 120.Therefore, neither the DC offset distance nor the gain adjustment in the RF receiver 140 can be performed without delay, since block buffering (e.g. slot-wise) introduces an additional delay of, for example, one slot at the digital interface 120.

[0128] An important aspect for a receiving system is its error vector magnitude (EVM; EVM = Error Vector Magnitude), which is a measure of how constellation points calculated from a received signal deviate from the ideal locations.

[0129] The device 100 can exhibit a 1% EVM for a signed 8-bit integer digital interface 120 with a setpoint of the gain unit 151 at -12 dB Fs and a 0.25% EVM for a signed 10-bit integer digital interface 120 with a setpoint of the gain unit 151 at -12 dB Fs for a static scenario. For example, a scenario with a relatively static signal strength. In a dynamic scenario, clipping may occur due to the gain unit and the setpoint used in the RF receiver 140.

[0130] Device 200 or device 300 can exhibit a comparable EVM for a signed 14-bit integer to signed 10-bit floating-point to signed 14-bit integer data conversion at digital interface 220 for a static scenario. In a dynamic scenario, clipping of the floating-point format at digital interface 220 and the amplification unit 273 in the second part of receiver 270 can be avoided. Although the EVM for devices 200 and 300 may be slightly higher in some cases compared to device 100, clipping of the signal, which depends on the received RF signal, can be avoided. Furthermore, an EVM of less than 1% can ensure adequate calculation of the constellation points in devices 200 and 300.

[0131] Fig. Figure 9 schematically represents an example of a mobile communication device, mobile phone, or user device 900, comprising a device 200 according to an example described herein. The device 200 may comprise a first semiconductor circuit 210, a digital interface 220, and a second semiconductor circuit 230. An antenna element 910 of a mobile communication device 900 may be coupled to the device 200 to provide a received radio frequency signal to the first semiconductor circuit 210, which comprises a first part of a radio frequency receiver 240. For this purpose, mobile communication devices may be provided that have less complex and smaller-sized chips for radio frequency receivers.

[0132] The example of a mobile communication device 900 may have one or more additional optional features corresponding to one or more aspects of the proposed concept or to one or more of the examples described above or below.

[0133] The various elements of both the first semiconductor circuit 210 and the second semiconductor circuit 230 have been presented as separate elements in the description above. It should be noted that all or some of the elements of a semiconductor circuit can be implemented as a single, common element. For example, one or more of the elements described herein can be implemented as functionalities of a processing unit.

[0134] An example of a method for processing a received radio frequency signal is shown using a flowchart in Fig. Figure 10 illustrates the method. The method comprises converting a data value of the signal, which depends on the received radio frequency signal, from a first data format to a second data format in a first part of a radio frequency receiver, which is contained in a first semiconductor circuit. The method further comprises providing data representing the data value in the second data format to a digital interface. The method further comprises transmitting data representing the data value in the second data format from the first semiconductor circuit to a second semiconductor circuit, which comprises a second part of the radio frequency receiver, via the digital interface. The method further comprises converting the data representing the data value in the second data format back into the first data format in the second part of the radio frequency receiver.

[0135] Optionally, providing 1002 data representing the data value in the second data format to a digital interface may include: generating a difference value corresponding to a difference between the data value in the first data format and a preceding data value in the first data format; converting the difference value from the first data format to the second data format; and providing data representing the difference value in the second data format to the digital interface.

[0136] The procedure may optionally include converting a sampling rate based on the signal that depends on the received radio frequency signal into a sampling rate that depends on a sampling rate of the baseband processing unit in the second part of the radio frequency receiver.

[0137] Optionally, the procedure can include modifying the amplitude of the data being converted from the second data format to the first data format using a gain factor in the second part of the radio frequency receiver.

[0138] The procedure may optionally include the following processing 1012: determining a first signal strength based on the signal which depends on the received radio frequency signal and / or analog gain information based on the received radio frequency signal, in the first part of the radio frequency receiver; determining a second signal strength based on the signal which depends on the received radio frequency signal, in the second part of the radio frequency receiver; and determining the gain factor based on the first signal strength and / or the analog gain information and the second signal strength, in the second part of the radio frequency receiver.

[0139] Alternatively, the procedure can optionally include modifying the amplitude of the data representing the data value in the second data format using a gain factor in the second part of the radio frequency receiver.

[0140] The procedure may further optionally include the following processing 1016: determining an initial signal strength based on the signal which depends on the received radio frequency signal and / or analog gain information based on the received radio frequency signal, in the first part of the radio frequency receiver; and determining the gain factor based on the initial signal strength and / or the analog gain information and signal information provided by the baseband processing unit, in the second part of the radio frequency receiver.

[0141] Optionally, the conversion of 1006 of the data representing the data value in the second data format into the first data format in the second part of the radio frequency receiver can include converting the amplitude-modified data representing the data value in the second data format into the first data format.

[0142] The procedure can optionally include a frequency filter 1018 of the signal, which depends on the received radio frequency signal, in the second part of the radio frequency receiver.

[0143] Optionally, the method can further include modifying the amplitude of the signal dependent on the received radio frequency signal by an averaged amplitude of the signal dependent on the received radio frequency signal in the second part of the radio frequency receiver. The amplitude of the signal dependent on the received radio frequency signal 199 can be modified block by block by the averaged amplitude of the signal dependent on the received radio frequency signal 199, and furthermore, the gain factor can be determined block by block.

[0144] Further details and aspects of the procedure are related to the proposed concept or one or more above or below (e.g. Fig.The methods described in sections 1 to 9) may include one or more additional optional features corresponding to one or more aspects of the proposed concept or to one or more of the examples described above or below.

[0145] The examples described herein can be summarized as follows: Example 1 is a device for processing a signal dependent on a received radio frequency signal, comprising: a first semiconductor circuit comprising a first part of a radio frequency receiver and a first data converter configured to convert a data value of the signal dependent on the received radio frequency signal from a first data format to a second data format; a second semiconductor circuit comprising a second part of the radio frequency receiver and a second data converter configured to convert data representing the data value in the second data format to the first data format; and a digital Interface configured to transmit data relating to the signal dependent on the received radio frequency signal from the first semiconductor circuit to the second semiconductor circuit, wherein the first data converter is configured to provide the data representing the data value in the second data format to the digital interface. In Example 2, the second semiconductor circuit also includes a baseband processing unit. In example 3, the number of bits used to represent the data value in the first data format is higher than in the second data format. In Example 4, a range of numbers that can be represented in the second data format comprises at least 95% of a range of numbers that can be represented in the first data format in the device of Example 3. In Example 5, the first data format is an integer format and the second data format is a floating-point format, in the device of Example 1, 2 or 3. In Example 6, the number of bits used to represent the data value in the integer format is from the interval starting at 14 and ending at 17, and the number of bits used to represent the data value in the floating-point format is from the interval starting at 8 and ending at 11, in the device of Example 5. In Example 7, the data representing the data value in the second data format in the device of Example 5 or Example 6 comprise an in-phase component and a quadrature component, wherein the first data converter is configured to provide the data representing the data value in the floating-point format using a common exponent for the in-phase component and the quadrature component. In Example 8, the data representing the data value in the second data format in the device of one of Examples 1 to 4 comprise a radius component and a phase component, wherein the first data format is integer format, and wherein in the second data format the radius component is in floating-point format and the phase component is integer format. In Example 9, the first data converter of the device of Example 5, 6 or 8 is configured such that a most significant bit of a mantissa of the data representing the data value in the floating-point format is not provided to the digital interface if the exponent of the data representing the data value in the floating-point format differs from a lowest possible exponent in the floating-point format. In Example 10, the first data converter is configured to generate a difference value corresponding to a difference between the data value in the first data format and a previous data value in the first data format; to convert the difference value from the first data format to the second data format; and to provide data representing the difference value in the second data format to the digital interface. In Example 11, the second part of the radio frequency receiver includes at least one sampling rate converter configured to convert a sampling rate based on the signal dependent on the received radio frequency signal into a sampling rate dependent on a sampling rate of the baseband processing unit. In Example 12, the second part of the radio frequency receiver includes at least one amplification unit configured to modify the amplitude of the data being converted from the second data format to the first data format using a gain factor. In Example 13, the first part of the receiver of the device of Example 12 comprises a first signal information unit configured to determine a first signal strength based on the signal that depends on the received radio frequency signal and / or analog gain information based on the received radio frequency signal; the second part of the receiver comprises a second signal information unit configured to determine a second signal strength based on the signal that depends on the received radio frequency signal; and the second part of the receiver comprises a gain control unit configured to determine the gain factor based on the first signal strength and / or the analog gain information and the second signal strength. In Example 14, the second part of the radio frequency receiver includes at least one amplification unit configured to modify the amplitude of the data representing the data value in the second data format using a gain factor. In Example 15, the first part of the receiver of the device of Example 14 comprises a first signal information unit configured to determine a first signal strength based on the signal which depends on the received radio frequency signal and / or analog gain information based on the received radio frequency signal; and the second part of the receiver comprises a gain control unit configured to determine the gain factor based on the first signal strength and / or the analog gain information and signal information provided by the baseband processing unit. In Example 16, the second data converter of the device from Example 14 or 15 is configured to convert the data representing the data value into the second data format modified by the amplification unit. In Example 17, the second part of the radio frequency receiver includes at least one frequency filter designed to provide the signal, which depends on the received radio frequency signal, within a given frequency band. In Example 18, the second part of the radio frequency receiver of the device of Example 13 or Example 15 comprises an offset correction unit configured to modify an amplitude of the signal dependent on the received radio frequency signal by an averaged amplitude of the signal dependent on the received radio frequency signal, wherein the offset correction unit and the gain control unit are configured to process the signal dependent on the received radio frequency signal in blocks. In Example 19, the second semiconductor circuit is provided in a second design node that is smaller than a first design node where the first semiconductor circuit is provided. In Example 20, the second semiconductor circuit of the device of Example 19 is provided in a 5- to 14-nm design node, and the first semiconductor circuit of the device of Example 19 is provided in a 14- to 65-nm design node or larger. Example 21 is a mobile communications device comprising a device for processing a signal dependent on a received radio frequency signal according to any one of Examples 1 to 20. In Example 22, the mobile communication device further comprises at least one antenna coupled to the device. Example 23 is a means for processing a signal dependent on a received radio frequency signal, comprising: a first means for providing a semiconductor circuit comprising a first part of a means for receiving a radio frequency and a means for converting a data value of the signal dependent on the received radio frequency signal from a first data format into a second data format; a second means for providing a semiconductor circuit comprising a second part of the means for receiving a radio frequency and a means for converting data representing the data value in the second data format into the first data format;and a means for transmitting data relating to the signal dependent on the received radio frequency signal from the first means of providing a semiconductor circuit to the second means of providing a semiconductor circuit, wherein the means for converting a data value of the signal dependent on the received radio frequency signal is configured from a first data format to a second data format in order to provide the data representing the data value in the second data format to the means for transmitting data relating to the signal dependent on the received radio frequency signal. In Example 24, the second means for providing a semiconductor circuit further includes a means for baseband processing. In Example 25, the number of bits used to represent the data value in the first data format is higher than in the second data format for the means of processing Example 23 or 24. In Example 26, a range of numbers that can be represented in the second data format comprises at least 95% of a range of numbers that can be represented in the first data format, in the means of processing Example 25. In example 27, on average in examples 23, 24 or 25, the first data format is an integer format and the second data format is a floating-point format. In Example 28, the number of bits used to represent the data value in the integer format is from the interval starting at 14 and ending at 17, and the number of bits used to represent the data value in the floating-point format is from the interval starting at 8 and ending at 11, in the mean of Example 27. In Example 29, the data representing the data value in the second data format in the mean of Example 26 or 27 comprise an in-phase component and a quadrature component, wherein the means for converting a data value of the signal dependent on the received radio frequency signal from a first data format to a second data format is formed to provide the data representing the data value in the floating-point format using a common exponent for the in-phase component and the quadrature component. In Example 30, the data representing the data value in the second data format in the mean of one of Examples 23 to 26 comprise a radius component and a phase component, wherein the first data format is integer format, and wherein in the second data format the radius component is in floating-point format and the phase component is integer format. In Example 31, the means for converting a data value of the signal dependent on the received radio frequency signal from a first data format to a second data format in the means of Example 27, 28 or 30 is designed such that a most significant bit of a mantissa of the data representing the data value in the floating-point format is not provided to the means for transferring data with respect to the signal dependent on the received radio frequency signal if the exponent of the data representing the data value in the floating-point format differs from a lowest possible exponent in the floating-point format. In Example 32, the means for converting a data value of the signal dependent on the received radio frequency signal is designed from a first data format to a second data format in order to generate a difference value corresponding to a difference between the data value in the first data format and a preceding data value in the first data format; to convert the difference value from the first data format to the second data format; and to provide data representing the difference value in the second data format to the means for transmitting data relating to the signal dependent on the received radio frequency signal. In Example 33, the second part of the means for receiving a radio frequency includes at least a means for converting a sampling rate based on the signal which depends on the received radio frequency signal into a sampling rate which depends on a sampling rate of the means for baseband processing. In Example 34, the second part of the means for receiving a radio frequency includes at least a means for modifying an amplitude of the data being converted from the second data format to the first data format, using a gain factor. In Example 35, the first part of the means for receiving a radio frequency of the means of Example 34 comprises a means for determining a first signal strength with respect to the signal which depends on the received radio frequency signal and / or analog gain information with respect to the received radio frequency signal; the second part of the means for receiving a radio frequency comprises a means for determining a second signal strength with respect to the signal which depends on the received radio frequency signal; and the second part of the means for receiving a radio frequency comprises a means for determining the gain factor based on the first signal strength and / or the analog gain information and the second signal strength. In Example 36, the second part of the means for receiving a radio frequency of the means from any of Examples 23 to 33 includes at least a means for modifying an amplitude of the data representing the data value in the second data format, using a gain factor. In Example 37, the first part of the means for receiving a radio frequency of the means of Example 36 comprises a means for determining an initial signal strength based on the signal which depends on the received radio frequency signal and / or analog gain information based on the received radio frequency signal; and the second part of the means for receiving a radio frequency comprises a means for determining the gain factor based on the initial signal strength and / or the analog gain information and signal information provided by the means for baseband processing. In Example 38, the means for converting the data representing the data value in the second data format into the first data format of the means from Example 36 or 37 is designed to convert the data representing the data value in the second data format modified by the amplification unit. In Example 39, the second part of the means for receiving a radio frequency includes at least a means for providing the signal that depends on the received radio frequency signal within a given frequency band. In Example 40, the second means of providing a semiconductor circuit is provided in a second design node that is smaller than a first design node in which the first second means of providing a semiconductor circuit is provided. In Example 41, the second means of providing a semiconductor circuit of the means of Example 40 is provided in a 5- to 14-nm design node, and the first second means of providing a semiconductor circuit of the means of Example 40 is provided in a 14- to 65-nm design node or larger. Example 42 is a method for processing a signal dependent on a received radio frequency signal, comprising: converting a data value of the signal dependent on the received radio frequency signal from a first data format to a second data format in a first part of a radio frequency receiver contained in a first semiconductor circuit; providing data representing the data value in the second data format to a digital interface; transmitting the data representing the data value in the second data format from the first semiconductor circuit to a second semiconductor circuit comprising a second part of the radio frequency receiver, via the digital interface; and converting the data representing the data value in the second data format back into the first data format in the second semiconductor circuit. In Example 43, the number of bits used to represent the data value in the first data format is higher than in the second data format in the procedure of Example 42. In Example 44, a range of numbers that can be represented in the second data format comprises at least 95% of a range of numbers that can be represented in the first data format in the procedure of Example 43. In Example 45, the first data format is an integer format and the second data format is a floating-point format, in the procedure of Example 42 or 43. In Example 46, the number of bits used to represent the data value in the integer format is from the interval starting at 14 and ending at 17, and the number of bits used to represent the data value in the floating-point format is from the interval starting at 8 and ending at 11, in the procedure of Example 45. In Example 47, the data representing the data value in the second data format in the procedure of Example 45 or 46 includes an in-phase component and a quadrature component; and the data representing the data value in the floating-point format are provided using a common exponent for the in-phase component and the quadrature component. In Example 48, the data representing the data value in the second data format in the procedure of one of Examples 42 to 44 comprise a radius component and a phase component, wherein the first data format is integer format, and wherein in the second data format the radius component is in floating-point format and the phase component is integer format. In Example 49, a most significant bit of a mantissa of the data representing the data value in floating-point format in the procedure of one of Examples 45, 46 or 48 is not provided to the interface if the exponent of the data representing the data value in floating-point format differs from a least significant exponent in floating-point format. In Example 50, providing data representing the data value in the second data format to the digital interface includes: generating a difference value corresponding to a difference between the data value in the first data format and a preceding data value in the first data format; converting the difference value from the first data format to the second data format; and providing data representing the difference value in the second data format to the digital interface. In Example 51, the method further comprises converting a sampling rate based on the signal which depends on the received radio frequency signal into a sampling rate which depends on a sampling rate of the baseband processing unit in the second part of the radio frequency receiver. In Example 52, the method further includes modifying the amplitude of the data being converted from the second data format to the first data format using a gain factor in the second part of the radio frequency receiver. In Example 53, the procedure of Example 52 further comprises: determining a first signal strength with respect to the signal which depends on the received radio frequency signal and / or analog gain information with respect to the received radio frequency signal, in the first part of the radio frequency receiver; determining a second signal strength with respect to the signal which depends on the received radio frequency signal, in the second part of the radio frequency receiver; and determining the gain factor based on the first signal strength and / or the analog gain information and the second signal strength in the second part of the radio frequency receiver. In Example 54, the procedure from one of Examples 42 to 51 further includes modifying an amplitude of the data representing the data value in the second data format using a gain factor in the second part of the radio frequency receiver. In Example 55, the procedure of Example 54 further comprises: determining a first signal strength based on the signal which depends on the received radio frequency signal and / or analog gain information based on the received radio frequency signal, in the first part of the radio frequency receiver; and determining the gain factor based on the first signal strength and / or the analog gain information and signal information provided by the baseband processing unit, in the second part of the radio frequency receiver. In Example 56, converting the data representing the data value in the second data format into the first data format in the second part of the radio frequency receiver in the procedure of Example 54 or 55 involves converting the amplitude-modified data representing the data value in the second data format into the first data format. In Example 57, the method further includes frequency filtering of the signal, which depends on the received radio frequency signal, in the second part of the radio frequency receiver. In Example 58, the method of Example 53 or Example 55 further comprises modifying an amplitude of the signal dependent on the received radio frequency signal by an averaged amplitude of the signal dependent on the received radio frequency signal in the second part of the radio frequency receiver, wherein the amplitude of the signal dependent on the received radio frequency signal is modified block by block by the averaged amplitude of the signal dependent on the received radio frequency signal, and the gain factor is determined block by block. Example 59 is a computer-readable storage medium on which a program containing program code for carrying out the procedure of any of Examples 42 to 58 is stored when the program is executed on a computer or processor. Example 60 is a computer program with program code trained to perform the procedure of any one of Examples 42 to 58 when the computer program is run on a computer or processor.

[0146] This section will also include examples of program storage devices, such as digital data storage media, that are machine- or computer-readable and encode machine- or computer-executable programs of instructions, where the instructions perform some or all of the steps of the procedures described above. The program storage devices can be, for example, digital storage devices, magnetic storage media such as magnetic disks and magnetic tapes, hard disk drives, or optically readable digital data storage media. Examples will also include computers programmed to perform the steps of the procedures described above, or field-programmable logic arrays (PLAs) or field-programmable gate arrays (PGAs) programmed to perform the steps of the procedures described above.

[0147] The description and drawings only illustrate the principles of the disclosure. It is therefore understood that the person skilled in the art may derive various arrangements which, although not expressly described or illustrated here, embody the principles of the disclosure and are contained within its meaning and scope. Furthermore, all examples listed here are expressly intended for teaching purposes only, to assist the reader in understanding the principles of the disclosure and the concepts contributed by the inventor(s) to the advancement of technology, and are to be understood as serving without limitation to such specifically listed examples and conditions. Furthermore, all statements made here concerning principles, aspects, and examples of the disclosure, as well as specific examples thereof, are intended to encompass their equivalents.

[0148] Functional blocks designated as "means for..." (performing a certain function) are to be understood as comprehensive circuit blocks, each designed to perform a specific function. Therefore, a "means for something" can also be understood as "means designed for or suitable for something." A means designed to perform a certain function does not necessarily mean that such a means will actually perform the function (at any given time).

[0149] The functions of various elements depicted in the figures, including each functional block designated as "means," "means for providing a sensor signal," "means for generating a transmit signal," etc., can be provided by dedicated hardware such as "a signal provider," "a signal processing unit," "a processor," "a controller," etc., as well as by hardware capable of executing software in conjunction with associated software. Furthermore, each instance described herein as "means" could be implemented as or correspond to "one or more modules," "one or more devices," "one or more units," etc. When provided by a processor, the functions can be provided by a single dedicated processor, by a single shared processor, or by a plurality of individual processors, some of which may be shared.Furthermore, the explicit use of the terms "processor" or "controller" should not be interpreted as referring exclusively to hardware capable of executing software, and may implicitly include, without limitation, digital signal processor (DSP) hardware, network processors, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), read-only memory (ROMs) for storing software, random-access memory (RAMs), and non-volatile storage devices. Other hardware, both conventional and / or custom-designed, may also be included.

[0150] The person skilled in the art should understand that all block diagrams herein represent conceptual views of exemplary circuits embodying the principles of the disclosure. Similarly, it is understood that all flowcharts, process diagrams, state transition diagrams, pseudocode, and the like represent various processes that are essentially represented in a computer-readable medium and can thus be executed by a computer or processor, irrespective of whether such a computer or processor is explicitly depicted.

[0151] Furthermore, the following claims are hereby included in the detailed description, where each claim can stand alone as a separate example. While each claim can stand alone as a separate example, it should be noted that—although a dependent claim may refer to a particular combination with one or more other claims—other examples may also include a combination of the dependent claim with the subject matter of any other dependent or independent claim. These combinations are suggested here unless it is stated that a particular combination is not intended. Furthermore, features of a claim are also intended to apply to any other independent claim, even if that claim is not directly dependent on the independent claim.

[0152] It should also be noted that methods disclosed in the description or in the claims may be implemented by a device with means for carrying out each of the respective steps of these methods.

[0153] Furthermore, it is understood that the disclosure of multiple steps or functions revealed in the description or claims should not be interpreted as being in a specific order. The disclosure of multiple steps or functions therefore does not restrict them to a specific order, unless these steps or functions are not interchangeable for technical reasons.

Claims

[1] A device (200, 300) for processing a signal dependent on a received radio frequency signal (199), comprising: a first semiconductor circuit (210) comprising a first part of a radio frequency receiver (240) and a first data converter (250) configured to convert a data value of the signal, which depends on the received radio frequency signal, from a first data format into a second data format; a second semiconductor circuit (230) comprising a second part of the radio frequency receiver (270) and a second data converter (260) configured to convert data representing the data value in the second data format into the first data format, wherein the second part of the radio frequency receiver (270) comprises at least one sampling rate converter (271) configured to convert a sampling rate based on the signal dependent on the received radio frequency signal into a sampling rate dependent on a sampling rate of the baseband processing unit (280); and a digital interface (220) configured to transmit data relating to the signal dependent on the received radio frequency signal from the first semiconductor circuit (210) to the second semiconductor circuit (230), wherein the first data converter (250) is configured to provide the data representing the data value in the second data format to the digital interface (220). [2] The device according to claim 1, wherein the second semiconductor circuit (230) further comprises a baseband processing unit (280). [3] The device according to claim 1 or 2, wherein the number of bits used to represent the data value in the first data format is higher than in the second data format. [4] The device according to claim 3, wherein a range of numbers that can be represented in the second data format comprises at least 95% of a range of numbers that can be represented in the first data format. [5] The device according to one of the preceding claims, wherein the first data format is an integer format and the second data format is a floating-point format. [6] The device according to claim 5, wherein the data representing the data value in the second data format includes an in-phase component and a quadrature component; and the first data converter (250) is configured to provide the data representing the data value in the floating-point format using a common exponent for the in-phase component and the quadrature component. [7] The device according to any one of claims 1 to 4, wherein the data representing the data value in the second data format includes a radius component and a phase component; the first data format is an integer format; and In the second data format, the radius component has a floating-point format and the phase component has an integer format. [8] The device according to claim 5 or 7, wherein the first data converter (250) is designed in such a way that a most significant bit of a mantissa of the data representing the data value in the floating-point format is not provided to the digital interface if the exponent of the data representing the data value in the floating-point format differs from a lowest possible exponent in the floating-point format. [9] The device according to one of the preceding claims, wherein the first data converter (250) is trained to to generate a difference value that corresponds to a difference between the data value in the first data format and a previous data value in the first data format; to convert the difference value from the first data format to the second data format; to provide data representing the difference value in the second data format to the digital interface (220). [10] The device according to one of the preceding claims, wherein the second part of the radio frequency receiver (270) comprises at least one amplification unit (273) configured to modify the amplitude of the data converted from the second data format to the first data format using an amplification factor. [11] The device according to claim 10, wherein the first part of the receiver (240) comprises a first signal information unit (248) configured to determine a first signal strength with respect to a signal which depends on the received radio frequency signal and / or analog gain information with respect to the received radio frequency signal (199); the second part of the receiver (270) comprises a second signal information unit (275) configured to determine a second signal strength relative to the signal that depends on the received radio frequency signal (199); and the second part of the receiver (270) includes a gain control unit (274) configured to determine the gain factor based on the first signal strength and / or the analog gain information and the second signal strength. [12] The device according to any one of claims 1 to 9, wherein the second part of the radio frequency receiver (270) comprises at least one amplification unit (273) configured to modify the amplitude of the data representing the data value in the second data format using an amplification factor. [13] The device according to claim 12, wherein the first part of the receiver comprises a first signal information unit (248) configured to determine a first signal strength based on the signal which depends on the received radio frequency signal (199) and / or analog gain information based on the received radio frequency signal (199); and the second part of the receiver comprises a gain control unit (277) configured to determine the gain factor based on the first signal strength and / or the analog gain information and signal information provided by the baseband processing unit (280). [14] The device according to claim 12 or 13, wherein the second data converter (260) is configured to convert the data representing the data value in the second data format modified by the amplification unit (273). [15] The device according to one of the preceding claims, wherein the second semiconductor circuit (230) is provided in a second design node which is smaller than a first design node in which the first semiconductor circuit (210) is provided. [16] A method for processing a signal which depends on a received radio frequency signal (199), comprising: Converting a data value of the signal, which depends on the received radio frequency signal, from a first data format into a second data format in a first part of a radio frequency receiver (240) contained in a first semiconductor circuit (210); Providing data representing the data value in the second data format to a digital interface (220); Transferring the data representing the data value in the second data format from the first semiconductor circuit to a second semiconductor circuit (230) comprising a second part of the radio frequency receiver (270) via the digital interface (220); Converting the data representing the data value in the second data format into the first data format in the second semiconductor circuit (230), and Converting a sampling rate based on the signal that depends on the received radio frequency signal into a sampling rate that depends on a sampling rate of the baseband processing unit (280). [17] The method according to claim 16, wherein the number of bits used to represent the data value in the first data format is higher than in the second data format. [18] The method according to claim 17, wherein a range of numbers that can be represented in the second data format comprises at least 95% of a range of numbers that can be represented in the first data format. [19] The method according to any one of claims 16 to 18, wherein the first data format is an integer format and the second data format is a floating-point format. [20] The method according to claim 19, wherein the data representing the data value in the second data format includes an in-phase component and a quadrature component; and The data representing the data value in floating-point format is provided using a common exponent for the in-phase component and the quadrature component. [21] The method according to any one of claims 16 to 18, wherein the data representing the data value in the second data format includes a radius component and a phase component; the first data format is an integer format; and In the second data format, the radius component has a floating-point format and the phase component has an integer format. [22] The method according to one of claims 19 to 21, wherein a most significant bit, a mantissa of the data representing the data value in the floating-point format, is not provided to the digital interface if the exponent of the data representing the data value in the floating-point format differs from a least significant exponent in the floating-point format. [23] The method according to one of the preceding claims, wherein This includes providing the data representing the data value in the second data format to the digital interface: Generating a difference value that corresponds to a difference between the data value in the first data format and a previous data value in the first data format; Converting the difference value from the first data format to the second data format; and Providing data representing the difference value in the second data format to the digital interface. [24] A computer-readable storage medium on which a program containing program code for carrying out the method according to any one of claims 16 to 23 is stored when the program is executed on a computer or processor.

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