Inverter with overcurrent detection
Patent Information
- Application Number
- DE102016213170
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2016-07-19
- Publication Date
- 2025-09-11
- Estimated Expiration
- 2036-07-19
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Abstract
Description
TECHNICAL FIELD
[0001] The present invention relates to an inverter for an electric compressor used, for example, in an air conditioner of a vehicle. STATE OF THE ART
[0002] Fig. Figure 1 shows a prior art electric compressor. The electric compressor comprises a power output stage, an inverter control unit, and a motor. The power output stage comprises a bridge circuit (so-called B6 bridge) of power semiconductors (e.g., IGBTs or power MOSFETs) and a DC link capacitor C. The power output stage converts a DC voltage (HV+, HV-) provided by a high-voltage battery into an AC voltage for the motor. The inverter control unit receives a speed setpoint from a vehicle control unit and sends corresponding switching signals to the power output stage. To correctly regulate the power output stage, the inverter control unit receives various measurement signals (current and voltage values) from the power output stage.
[0003] Furthermore, the inverter control unit reports the power consumption of the power output stage to the vehicle control unit based on the measurement signals.
[0004] The inverter control unit also protects the inverter from overcurrents caused by a short circuit or overload. For this purpose, current and voltage sensors are located at various locations within the inverter.
[0005] For this reason, the inverter control unit measures, for example, the total input voltage across the DC link capacitor C and the total input current and uses this to calculate the total input power of the inverter.
[0006] Furthermore, the inverter control unit can measure the individual phase currents delivered from the power stage to the motor using Hall sensors. However, such Hall sensors are not available for high voltages (450 V or more) used in vehicles. The use of Hall sensors also has the disadvantage that current measurement is slow due to the parasitic capacitances, and overcurrents are not detected quickly enough. In addition, the use of Hall sensors between the power stage and the motor does not allow the detection of half-bridge short circuits (for example, from HV+ to HV- via power semiconductors 1 and 2).
[0007] The individual phase currents can also be measured indirectly (see, for example, US 2002 / 0 117 992 A1, US 2004 / 0 125 622 A1, US 6 049 474 A, US 2003 / 0 173 946 A1, US 5 969 958 A, US 2010 / 0 128 505 A1). However, these methods have the disadvantage that the change in the currents and their amplitude become too small at low motor speeds, which disrupts the control.
[0008] US 2003 / 0 214 770 A1 describes a circuit arrangement with a recording of all current operating conditions as parameters, which generates a self-adapting current cut-off threshold from these permanently present values, which operates independently of the higher-level control system, so that a dynamic real-time evaluation of the power parameter characteristic map takes place and thus only currently standardized data on the utilization and load capacity in the form of a characteristic map-oriented overload evaluation is delivered to the higher-level control system of the controller. PRESENTATION OF THE INVENTION
[0009] Against this background, it is an object of the present invention to reliably detect overcurrents (in particular bridge short circuits) in an inverter.
[0010] This object is achieved by the inverter for an electric compressor defined in patent claim 1.
[0011] The inverter comprises a power output stage comprising a plurality of half-bridge circuits with semiconductor switches, and a first measuring unit configured to measure the total input voltage of the inverter and the total input current of the inverter and to calculate the total input power of the inverter based on the total input voltage and the total input current. The inverter further comprises a second measuring unit configured to measure respective bridge currents in the half-bridge circuits. In addition, the inverter comprises a control unit configured to detect an overcurrent fault of the inverter when the total input power exceeds a threshold, wherein the threshold is determined based on the bridge currents.
[0012] Consequently, the threshold is not predetermined but adjusted to the measured bridge currents. This allows for rapid detection of an overcurrent fault.
[0013] According to a preferred embodiment, the control unit is configured to control the power output stage by means of a PWM controller and to determine the threshold value based on a plurality of phase currents measured in a predetermined number of PWM cycles.
[0014] Accordingly, the phase currents are considered over a certain period of time.
[0015] According to a preferred embodiment, the threshold value is calculated based on an effective value of the moving average values of the plurality of phase currents.
[0016] According to a preferred embodiment, the threshold value is further calculated based on the total input voltage.
[0017] According to a preferred embodiment, the threshold value P in_limit is calculated by the formula: Pinlimit(t)=∑phx=1N(k1n∑i=0n−1Iphx2(t−i)+c)⋅Vin where t denotes the current PWM clock, N is the number of half bridges, k is a conversion factor from phase currents to bridge currents, n is the predetermined number of PWM clocks, I phx the bridge current in the half bridge ph x is, c is a permissible current offset and V in is the total input voltage.
[0018] According to a preferred embodiment, the second measuring unit is configured to measure the phase currents by means of a shunt resistor on the low-voltage side of the half-bridge circuits.
[0019] According to a preferred embodiment, the control unit is configured to output an overcurrent fault signal to open all semiconductor switches in the power output stage when an overcurrent fault is detected.
[0020] According to a preferred embodiment, the control unit is configured to detect an overcurrent fault when the inverter is in a regulated state.
[0021] The present invention further relates to a method for controlling an inverter for an electric compressor, which comprises a power output stage comprising a plurality of half-bridge circuits with semiconductor switches. The method comprises the steps of measuring the total input voltage of the inverter and the total input current of the inverter, and calculating the total input power of the inverter based on the total input voltage and the total input current. The method further comprises the steps of measuring respective bridge currents in the half-bridge circuits and detecting an overcurrent fault of the inverter when the total input power exceeds a threshold, wherein the threshold is determined based on the bridge currents.
[0022] The present invention further relates to a computer program product that stores computer-readable code that causes a computer to carry out the method. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 shows an example of a basic structure of an inverter for an electric compressor according to the prior art. Fig. 2 shows an inverter according to an embodiment of the present invention. Fig. 3 shows an inverter according to an embodiment of the present invention in which a shunt resistor is used. Fig. 4 shows simulation results of the invention in comparison with the prior art. Fig. Figure 5 schematically shows an overcurrent fault determination according to the present invention. Fig. 6 shows a method according to an embodiment of the present invention. DESCRIPTION OF PREFERRED EMBODIMENTS
[0023] Preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings. In the various drawings, like or corresponding elements are designated by the same or similar reference numerals.
[0024] The preferred embodiments of the invention, which will be described in detail below, will be described in detail with reference to inverters for an electric compressor used in a refrigerant compressor of a vehicle. However, it should be noted that the following description contains only examples and should not be considered limiting the invention.
[0025] Fig. 2 shows an inverter according to an embodiment of the present invention.
[0026] The inverter comprises a power output stage 10, which includes several half-bridge circuits with semiconductor switches 1, 2, 3, 4, 5, and 6. Two semiconductor switches each form a half-bridge (for example, semiconductor switches 1 and 2). The semiconductor switches can be formed, for example, from IGBTs or power MOSFETs. The individual half-bridges each output a phase current for an electric motor, which is part of an electric compressor.
[0027] Fig. Figure 2 shows, by way of example, a so-called B6 bridge that outputs a three-phase alternating current to the motor. However, the present invention is not limited to three phases. Any number of phases or half-bridges can be used.
[0028] The power output stage 10 may further comprise an intermediate circuit capacitor C.
[0029] The power output stage 10 is supplied with voltage by a high-voltage battery (HV+ and HV-).
[0030] The inverter further comprises a first measuring unit 20 which is configured to measure the total input voltage V in of the inverter and the total input current I in of the inverter and the total input power P in of the inverter based on the total input voltage and the total input current (P in = V in × I in ).
[0031] Fig. Figure 2 shows an embodiment of the first measuring unit 20, which measures the total input voltage V in across the intermediate circuit capacitor C. The total input voltage V in However, it can also be measured at other points on the inverter.
[0032] Furthermore, in this embodiment, the total input current I inmeasured on the low-voltage side (HV-). Compared to a measurement on the high-voltage side (HV+), this has the advantage that no isolated current measurement is required on the low-voltage side.
[0033] Furthermore, the inverter comprises a second measuring unit 30, which is configured to measure respective bridge currents in the half-bridge circuits. The bridge currents are preferably measured synchronously. The bridge current in the half-bridge formed by semiconductor switches 1 and 2 is referred to below as I ph1 The bridge current in the half-bridge formed by semiconductor switches 3 and 4 is referred to below as I ph2 The bridge current in the half-bridge formed by the semiconductor switches 5 and 6 is referred to below as I ph3 designated.
[0034] In a preferred embodiment, the second measuring unit 30 is configured to measure the bridge currents by means of a shunt resistor on the low-voltage side of the half-bridge circuits. Fig. Figure 3 shows an embodiment in which the bridge current I ph1 is measured by means of a shunt resistor 31. The voltage drop across the shunt resistor 31 is amplified by an amplifier 32 and output to the control unit 40. In the same way, the bridge currents I ph2 and I ph3 measured in the other half bridges.
[0035] Measuring the bridge currents on the low-voltage side has the advantage that no isolated current measurement is necessary.
[0036] Fig. Figure 2 shows the case where the bridge currents are measured in all half-bridges. However, the present invention is not limited to this case, and the bridge currents can also be measured in only a portion of the half-bridges.
[0037] The inverter further comprises a control unit 40 which is configured to detect an overcurrent fault of the inverter when the total input power P in a threshold P in_limit where the threshold is based on the bridge currents I ph1 , I ph2 , I ph3 is determined.
[0038] Consequently, the threshold is not fixed but is adjusted to the measured bridge currents. This makes it possible to quickly detect overcurrents.
[0039] The control unit 40 receives the measurement signals from the first measuring unit 20 and the second measuring unit 30. Furthermore, the control unit 40 sends control signals to the power output stage 10 to switch the semiconductor switches 1, 2, 3, 4, 5, 6 such that the power output stage 10 outputs an alternating current to the motor. In addition, the control unit 40 communicates with a vehicle control unit (not shown) (see Fig. 1).
[0040] According to a preferred embodiment, the control unit 40 is configured to control the power output stage 10 by means of a PWM control and to determine the threshold value based on a plurality of bridge currents that have been measured in a predetermined number of PWM cycles.
[0041] Consequently, a large number of bridge currents measured in the past are taken into account when calculating the threshold. This makes it possible to avoid excessively rapid deviations in the total input power P in and thus quickly detect overcurrents.
[0042] According to a preferred embodiment, the threshold value is calculated based on an effective value of the moving averages of the plurality of bridge currents. An example of a moving average is 1n∑i=0n−1Iphx2(t−i), where I phx (i) the bridge current in the half bridge ph x in the PWM clock i, t denotes the current PWM clock, and n is the predetermined number of PWM clocks. The number of PWM clocks can be, for example, n=250.
[0043] The effective value can be used to prevent excessive deviation of the total input power P infrom the total input power consumed in the past. This allows the occurrence of an overcurrent to be quickly detected.
[0044] According to a preferred embodiment, the threshold value is further based on the total input voltage V in calculated.
[0045] In particular, the effective value of the bridge currents can be related to the total input voltage V in This is advantageous because it also allows variations in battery voltage (e.g., during recuperation when driving downhill) to be detected. This prevents incorrect detection of an overcurrent.
[0046] According to a preferred embodiment, the threshold value P in_limit is calculated by the formula: Pinlimit(t)=∑phx=1N(k1n∑i=0n−1Iphx2(t−i)+c)⋅Vin where t denotes the current PWM clock, N is the number of half bridges, k is a conversion factor from bridge currents to phase currents, n is the predetermined number of PWM clocks, I phx the bridge current in the half bridge ph x is, c is a allowed current offset and V in is the total input voltage.
[0047] In the example of Fig. 2, N=3. The number of PWM cycles can be, for example, n=250. An example of the conversion factor is k=√2.
[0048] The permissible current offset c represents the value by which the moving average of the phase currents may change without an overcurrent being detected. The permissible current offset c also takes into account the power consumption of other components (e.g., µC) on the circuit board, which houses, among other things, the measuring units 20, 30, and the control unit 40. The permissible current offset c can be temperature-dependent. The permissible current offset c is fixed.
[0049] Furthermore, the total input voltage V in This does not require averaging, as the total input voltage changes slowly compared to the currents. For example, the voltage changes on the order of 100 ms, and the currents on the order of µs and ns, respectively. This insight simplifies the calculation of the threshold value, as averaging over the total input voltage can be avoided.
[0050] The control unit 40 is configured to output an overcurrent fault signal to open all semiconductor switches 1, 2, 3, 4, 5, and 6 when an overcurrent fault is detected. This prevents the occurrence of a bridge short circuit.
[0051] Fig. Figure 4 shows simulation results obtained by using the above-described inventive formula for calculating P in_limit The left graphic in Fig. 4 shows a simulation without the inventive calculation of P in_limit . The right graphic in Fig. 4 shows a simulation with the inventive calculation of P in_limit .
[0052] The upper part of the two graphs represents the temperature (°C) of the semiconductor switches. The lower part of the two graphs represents the three phase currents (A). The x-axis represents time in seconds.
[0053] Fig. Figure 4 shows a case in which a sudden increase in the motor load by a factor of 2.4 occurs shortly after 0.45 s. The left graph shows that this causes the temperature of the semiconductor switches to rise to over 240 °C within a few milliseconds, because exceeding a threshold of 40 A in the negative range is not detected. Exceeding this threshold is only detected when a bridge current exceeds the threshold of 40 A in the positive range. This leads to the destruction of the semiconductor switches, which can typically be heated to a maximum of 175 °C.
[0054] On the other hand, the present invention, shown in the right-hand graph, detects overcurrent very quickly (as early as 0.452 s). In particular, an overcurrent is detected before the bridge current exceeds the threshold of 40 A in the positive range. Consequently, a temperature increase of the semiconductor switches and thus their destruction can be prevented.
[0055] Consequently, the present invention eliminates the need for threshold monitoring of negative bridge currents. Such monitoring requires additional components (e.g., shunt resistors and comparators with negative reference voltages) and board space. Thus, the present invention eliminates the need for additional components for overcurrent detection on the inverter board.
[0056] Fig. Figure 5 schematically shows an overcurrent fault determination performed by the control unit 40 according to an embodiment of the present invention. The measured total input power P in , the measured total input current I in and the measured bridge currents I ph1 , I ph2 , I ph3 used. The total input current I measured by the first measuring unit 20 in is controlled with a total input current threshold max_I in using a comparator. The comparator outputs a logical 1 if the value at the "+" input is greater than the value at the "-" input.
[0057] In addition, the maximum bridge current is set with a bridge current threshold max_I ph compared using another comparator.
[0058] The total input current threshold max_I in and the bridge current threshold max_I phare predetermined values that are determined for a specific combination of inverter and motor through simulation / experimentation.
[0059] The total input power P in is compared with the threshold value calculated according to the invention using an additional comparator. This comparison result is delayed by a predetermined number of PWM cycles (e.g., one PWM cycle).
[0060] The comparator connections shown are examples only and can be interchanged. The outputs of the three comparators are combined by a logic circuit, so that if one of the thresholds is exceeded, the logic circuit outputs an error signal. The logic circuit can be a NOR gate (or XOR gate).
[0061] The result of this combination is output to a startup dummy circuit. The startup dummy circuit is configured to not forward an overcurrent fault indicated by the output of the NOR gate during the startup of the inverter (for example, the first 10,000 PWM cycles). This can prevent an erroneous overcurrent determination during startup. Consequently, the control unit 40 in this embodiment is configured to detect an overcurrent fault when the inverter is in a regulated state.
[0062] The latch outputs a detected overcurrent fault until a reset signal is received. The reset signal is issued by a microcontroller contained in the control unit 40.
[0063] Fig.6 shows a method according to an embodiment of the present invention. This embodiment relates to a method for controlling an inverter for an electric compressor comprising a power output stage including a plurality of half-bridge circuits with semiconductor switches. The method comprises the steps of measuring S1 the total input voltage of the inverter and the total input current of the inverter, and calculating S2 the total input power of the inverter based on the total input voltage and the total input current. The method further comprises the steps of measuring S3 respective bridge currents in the half-bridge circuits and detecting S4 an overcurrent fault of the inverter when the total input power exceeds a threshold, wherein the threshold is determined based on the bridge currents.
[0064] The measurement units and control units described above may include a bus, a processing unit, a memory, ROM, and a communications interface. The bus may enable communication between the components. The processing unit may include a processor, a microprocessor, or processing logic capable of interpreting and executing instructions. The memory may include RAM or another type of dynamic storage device capable of storing information and software instructions for execution by the processing unit.
[0065] The measurement units and control units can perform the operations and processing described above. The measurement unit and control units perform these operations using the processing unit, which executes software instructions contained in a computer-readable medium. A computer-readable medium can be defined as a physical or logical storage device. A logical storage device can be a storage area within a single physical memory or distributed across multiple physical memory devices.
[0066] The instructions contained in the memory can cause the processing unit, when executed on a processor, to perform the operations or processing described above. Alternatively, hard-wired circuitry can be used instead of or in combination with software instructions to perform the processes and / or processing described above. Consequently, the foregoing implementation is not limited to any specific combination of hardware and software.
[0067] When the terms "measuring unit" and "control unit" are used, this does not imply any restriction as to how these units are distributed or combined. This means that the units can be distributed among various software and hardware components or other elements to implement the described function. A variety of different elements can also be combined to implement the described functionalities.
[0068] The elements of the measuring units and control units can be implemented in hardware, software, field programmable gate array (FPGA), application-specific integrated circuit (ASIC), firmware or the like.
Claims
[1] Inverter for an electric compressor, the inverter comprising: a power output stage (10) comprising a plurality of half-bridge circuits with semiconductor switches; a first measuring unit (20) configured to measure the total input voltage of the inverter and the total input current of the inverter and to calculate the total input power of the inverter based on the total input voltage and the total input current; a second measuring unit (30) configured to measure respective bridge currents in the half-bridge circuits; and a control unit (40) configured to detect an overcurrent fault of the inverter when the total input power exceeds a threshold value, where the threshold is determined based on the bridge currents. [2] Inverter according to claim 1, wherein the control unit (40) is arranged to control the power output stage (10) by means of a PWM control and to determine the threshold value based on a plurality of bridge currents which have been measured in a predetermined number of PWM cycles. [3] The inverter of claim 2, wherein the threshold value is calculated based on an effective value of the moving averages of the plurality of bridge currents. [4] An inverter according to any preceding claim, wherein the threshold is further calculated based on the total input voltage. [5] Inverter according to claim 4, wherein the threshold value P in_limit is calculated by the formula: Pinlimit(t)=∑phx=1N(k1n∑i=0n−1Iphx2(t−i)+c)⋅Vin where t denotes the current PWM clock, N is the number of half bridges, k is a conversion factor from phase currents to bridge currents, n is the predetermined number of PWM clocks, I phx the bridge current in the half bridge ph x is, c is a permissible current offset and V in is the total input voltage. [6] Inverter according to any preceding claim, wherein the second measuring unit (30) is arranged to measure the phase currents by means of a shunt resistor on the low-voltage side of the half-bridge circuits. [7] An inverter according to any preceding claim, wherein the control unit (40) is arranged to output an overcurrent fault signal to open all semiconductor switches in the power output stage when an overcurrent fault is detected. [8] An inverter according to any preceding claim, wherein the control unit (40) is arranged to detect an overcurrent fault when the inverter is in a regulated state after start-up of the inverter. [9] A method for controlling an inverter for an electric compressor comprising a power output stage comprising a plurality of half-bridge circuits with semiconductor switches, the method comprising: Measuring (S1) the total input voltage of the inverter and the total input current of the inverter; Calculating (S2) the total input power of the inverter based on the total input voltage and the total input current; Measuring (S3) the respective bridge currents in the half-bridge circuits; Detecting (S4) an inverter overcurrent fault when the total input power exceeds a threshold, where the threshold is determined based on the bridge currents. [10] A computer program product storing computer-readable code that causes a computer to carry out the method of claim 9.
Citation Information
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