ORGANIC LED INDICATOR

Abstract

Organic light-emitting diode display (10), comprising: a substrate (SUB1) comprising a thin-film transistor region (TA) in which a thin-film transistor (T) and an organic light-emitting diode (OLE) connected to the thin-film transistor (T) are arranged, and an auxiliary electrode region (AEA) in which an auxiliary electrode (AE) is arranged; a barrier (BR) arranged on the auxiliary electrode (AE); a cathode (CAT) contained in the organic light-emitting diode (OLE) which is divided by the barrier (BR) and exposes at least a partial area of ​​the auxiliary electrode (AE), wherein one end of the cathode (CAT) is in direct contact with the auxiliary electrode (AE); a cover layer (CL) arranged on the cathode (CAT), wherein the cover layer (CL) has a continuous connection to cover the barrier (BR) and the auxiliary electrode (AE); and a protective layer (PL) that is arranged between the cathode (CAT) and the cover layer (CL); wherein the cover layer (CL) touches one side of the barrier (BR) at a point below an eaves section of the barrier (BR); and wherein the protective layer (PL) is divided by the barrier (BR) and exposes at least a partial area of ​​the auxiliary electrode (AE).

Description

BACKGROUND OF THE INVENTION Area of ​​the invention

[0001] The present disclosure relates to an organic light-emitting diode display. Discussion of related technologies

[0002] Various display devices have replaced heavier and larger cathode ray tubes (CRTs). Examples of display devices include liquid crystal displays (LCDs), field emission displays (FEDs), plasma display arrays (PDPs), and organic light-emitting diode (OLED) displays.

[0003] More precisely, an OLED display is a self-emissive display designed to emit light by exciting an organic compound. Unlike liquid crystal displays, OLED displays do not require a backlight unit, thus offering the advantages of a thin profile, light weight, and a simpler manufacturing process. OLED displays can also be manufactured at low temperatures and feature a fast response time of 1ms or less, low power consumption, a wide viewing angle, and high contrast. Therefore, OLED displays are widely used.

[0004] The OLED display contains organic light-emitting diodes (OLEDs) that convert electrical energy into light energy. The OLED has an anode, a cathode, and an organic composite layer between the anode and the cathode. The OLED display is designed so that the OLED emits light when excitons, formed by the combination of holes from the anode and electrons from the cathode within an emission layer, fall from an excited state to a ground state, and the OLED display can thus project an image.

[0005] A large-area OLED display, however, cannot maintain uniform luminance across the entire surface of an active area displaying an input image, and will therefore exhibit luminance variation (or luminance deviation) depending on position. More precisely, the cathode forming the organic light-emitting diode is designed to cover most of the active area, and the problem is that a supply voltage applied to the cathode does not have a constant voltage value across the entire surface of the active area. For example, if the difference between a voltage value at an input of the cathode supplied with the power supply and a voltage value at a position located away from the input increases due to the resistance of the cathode, the luminance variation will increase with position.

[0006] The problem is more pronounced with a top-emission display device. In a top-emission display device, because it is necessary to ensure the transmittance of a cathode located on the top layer of an organic light-emitting diode (OLED), the cathode is made of a transparent conductive material such as indium tin oxide (ITO) or an opaque conductive material of very low thickness. In this case, because the surface resistance of the cathode increases, the luminance change depending on the position increases significantly, corresponding to an increase in surface resistance.

[0007] US Patent 2017 / 0 186 831 A1 discloses an organic light-emitting display device comprising, in a layered structure, a light-emitting diode connected to a thin-film transistor, an auxiliary electrode connected to either an anode or a cathode of the light-emitting diode, and a barrier located on the auxiliary electrode. US Patent 2017 / 0 031 323 A1 discloses an organic light-emitting display device with a layered structure in which a protective layer is located between a cathode and a cover layer. US Patent 2007 / 0 194 307 A1 discloses an organic light-emitting display device with a layered structure comprising a passivation layer arranged on an auxiliary electrode and a dummy structure with a projection arranged thereon, as well as a cover layer located on the cathode. US Patent 2003 / 0 060 055 A1 discloses a thin-film resist pattern consisting of a trapezoidal main body and an additional body. SUMMARY OF THE INVENTION

[0008] The present disclosure provides an organic light-emitting diode (OLED) display capable of achieving uniform luminance by minimizing changes in a supply voltage low potential as a function of position. Various embodiments provide an OLED display according to claim 1, and various embodiments provide an OLED display according to claim 7. Further embodiments are specified in the dependent claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The accompanying drawings, which may be included to facilitate a further understanding of the revelation, illustrate embodiments of the revelation and, together with the description, serve to explain various principles of the revelation. Fig. Figure 1 is a block diagram that schematically represents an organic light-emitting diode (OLED) display. Fig. Figure 2 schematically shows the structure of a [unclear text] in Fig. 1 pixel shown. Fig. Figure 3 is a cross-sectional view that schematically represents a thin-film transistor area of ​​an OLED display. Fig. Figure 4 is a cross-sectional view that schematically represents an auxiliary electrode area of ​​an OLED display. Fig. Figure 5 is a cross-sectional view that schematically represents a thin-film transistor area. Fig. Figure 6 is a cross-sectional view that schematically represents an auxiliary electrode area according to a first embodiment of the disclosure. Fig. Figure 7 illustrates step coverage properties of an atomic layer deposition (ALD) process. Fig. Figure 8 shows cross-sectional views that schematically illustrate examples of a barrier shape. Fig. Figure 9 is a cross-sectional view that schematically represents an auxiliary electrode area according to a second embodiment of the disclosure.

[0034] Fig. 10A and Fig. Figure 10B illustrates, in chronological order, a procedure for developing a lead. DETAILED DESCRIPTION OF THE EXECUTION FORMS

[0010] Detailed reference is now made to embodiments of the disclosure, examples of which are shown in the accompanying drawings. Wherever possible, the same reference numerals are used in all drawings to refer to the same or similar parts. Detailed descriptions of known techniques are omitted if they might confuse the embodiments of the disclosure. When describing different embodiments, the same components may be described in a first embodiment and omitted in further embodiments.

[0011] The terms "first," "second," etc., can be used to describe different components, but the components are not limited by such terms. The terms are only used to distinguish one component from another.

[0012] Fig. Figure 1 is a block diagram that schematically represents an organic light-emitting diode (OLED) display. Fig. Figure 2 schematically shows the structure of a [unclear text] in Fig. 1 pixel shown.

[0013] With reference to Fig. 1 features an OLED display 10, a display driver circuit and a display field DIS.

[0014] The display driver circuit comprises a data driver circuit 12, a gate driver circuit 14, and a clock controller 16. The display driver circuit applies a video data voltage of an input image to pixels of the display array DIS. The data driver circuit 12 converts the digital RGB video data received from the clock controller 16 into an analog gamma compensation voltage and generates a data voltage. The data voltage output by the data driver circuit 12 is fed to data lines D1 to Dm, where m is a positive integer. The gate driver circuit 14 sequentially outputs a gate signal synchronized with the data voltage to gate lines G1 to Gn and selects pixels from the display array DIS to which the data voltage is applied, where n is a positive integer.

[0015] The clock controller 16 receives clock signals such as a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a data enable signal DE, a master clock MCLK, etc., from a host system 19 and synchronizes the timing of the data driver circuit 12 and the gate driver circuit 14. A data clock control signal for controlling the data driver circuit 12 includes a source sample clock SSC, a source output enable signal SOE, and the like. A gate timing control signal for controlling the gate driver circuit 14 includes a gate start pulse GSP, a gate shift clock GSC, a gate output enable signal GOE, and the like.

[0016] The Host System 19 can be a television system, set-top box, navigation system, DVD player, Blu-ray player, personal computer (PC), home theater system, or telephone system, as well as any other system that includes or operates in conjunction with a display. The Host System 19 features a system-on-a-chip (SoC) with an embedded scaler that converts the RGB digital video data of the input image into a format suitable for displaying the input image on the DIS display panel. The Host System 19 transmits the RGB digital video data of the input image and the timing signals Vsync, Hsync, DE, and MCLK to the clock controller 16.

[0017] The DIS display array features a pixel array. The pixel array contains the pixels defined by the data lines D1 to Dm and the gate lines G1 to Gn. Each pixel contains an organic light-emitting diode (OLED) that serves as a self-emissive element.

[0018] With reference to Fig. 2 The display array DIS has a plurality of data lines D, a plurality of gate lines G that intersect the data lines D, and pixels, each arranged in a matrix at the intersections of the data lines D and the gate lines G. Each pixel contains an organic light-emitting diode (OLED), a driver thin-film transistor (TFT) DT for controlling a current flowing through the OLED, and a programming unit SC for setting a gate-source voltage of the driver TFT DT.

[0019] The programming unit SC can contain at least one switching thin-film transistor and at least one storage capacitor. The switching thin-film transistor is switched on in response to a gate signal from the gate line G, thereby applying a data voltage from the data line D to an electrode of the storage capacitor. The driver thin-film transistor DT controls the current supplied to the organic light-emitting diode (OLED) as a function of the voltage stored in the storage capacitor, thus controlling the amount of light emitted by the OLED. The amount of light emitted by the OLED is proportional to the current supplied by the driver thin-film transistor DT.The pixel is connected to a supply voltage high potential terminal and a supply voltage low potential terminal and receives a supply voltage high potential EVDD and a supply voltage low potential EVSS from a power supply unit (not shown). The thin-film transistors with which the pixels are formed can be type P or type N thin-film transistors. Furthermore, semiconductor layers of the thin-film transistors with which the pixels are formed can contain amorphous silicon, polycrystalline silicon, or oxide. In the following description, embodiments of the disclosure use a semiconductor layer containing, for example, oxide. The organic light-emitting diode has an anode ANO, a cathode CAT, and an organic composite layer between the anode ANO and the cathode CAT. The anode ANO is connected to the driver thin-film transistor DT. <Erste Ausführungsform>

[0020] Fig. Figure 3 is a cross-sectional view that schematically represents a thin-film transistor area of ​​an OLED display. Fig. Figure 4 is a cross-sectional view that schematically represents an auxiliary electrode area of ​​an OLED display.

[0021] With reference to Fig. 3 and Fig. Figure 4 shows an OLED display with a display field comprising a first substrate SUB1 and a second substrate SUB2 facing each other. A filler layer FL can be arranged between the first substrate SUB1 and the second substrate SUB2.

[0022] The first substrate, SUB1, is a thin-film transistor array substrate on which a thin-film transistor T and an organic light-emitting diode OLE are mounted. The second substrate, SUB2, is a color filter array substrate on which a color filter CF is mounted. The second substrate, SUB2, can function as an encapsulation substrate. The first substrate, SUB1, and the second substrate, SUB2, can be connected using a sealant. The sealant SL is positioned at one edge of the first substrate, SUB1, and at one edge of the second substrate, SUB2, maintaining a predetermined distance between them. The filler layer FL can be located within (or contained within) the sealant SL.

[0023] The first substrate SUB1 can be made of glass or plastic material. For example, the first substrate SUB1 can be made of a plastic material such as polyimide (PI), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), and polycarbonate (PC) and exhibit flexible properties.

[0024] The first substrate SUB1 can be divided into a thin-film transistor area TA, in which the thin-film transistor T and the organic light-emitting diode OLE are arranged, and an auxiliary electrode area AEA, in which an auxiliary electrode AE ​​is located.

[0025] The thin-film transistor T and the organic light-emitting diode OLE, which is connected to the thin-film transistor T, are formed on the thin-film transistor area TA of the first substrate SUB1. A light-shielding layer LS and a buffer layer BUF can be formed between the first substrate SUB1 and the thin-film transistor T. The light-shielding layer LS is arranged to overlap a semiconductor layer, in particular a channel of the thin-film transistor T, and can protect an oxide semiconductor device from external light. The buffer layer BUF can prevent ions or impurities from diffusing out of the first substrate SUB1 and also block the ingress of moisture from the outside.

[0026] The thin-film transistor T has a semiconductor layer ACT, a gate electrode GE, a source electrode SE and a drain electrode DE.

[0027] A gate insulating layer GI and the gate electrode GE are arranged on the semiconductor layer ACT. The gate insulating layer GI serves to insulate the gate electrode GE and can be made of silicon dioxide (SiOx). However, embodiments are not limited to this. The gate electrode GE is arranged so that it overlaps the semiconductor layer ACT with the gate insulating layer GI positioned between them. The gate electrode GE can be a single layer or a multilayer made of copper (Cu), molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), tantalum (Ta), tungsten (W), or a combination thereof. The gate insulating layer GI and the gate electrode GE can be structured using the same mask. In this case, the gate insulating layer GI and the gate electrode GE can have the same area.Although not shown, the gate insulating layer GI can be designed to cover the entire surface of the first substrate SUB1.

[0028] A dielectric intermediate layer IN is positioned on the gate electrode GE. The dielectric intermediate layer IN serves to insulate the gate electrode GE from the source and drain electrodes SE and DE from each other. The dielectric intermediate layer IN can be formed from silicon oxide (SiOx), silicon nitride (SiNx), or a multiple layer thereof. However, embodiments are not limited to these materials.

[0029] The source electrode SE and the drain electrode DE are positioned on the dielectric intermediate IN. The source electrode SE and the drain electrode DE are spaced apart by a predetermined distance. The source electrode SE contacts one side of the semiconductor layer ACT through a source contact hole that penetrates the dielectric intermediate IN. The drain electrode DE contacts the other side of the semiconductor layer ACT through a drain contact hole that also penetrates the dielectric intermediate IN.

[0030] Both the source electrode (SE) and the drain electrode (DE) can be configured as a single layer or as a multilayer. If both are single layers, they can be made of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), or a combination thereof. If both are multilayers, they can be a double layer of Mo / Al-Nd, Mo / Al, Ti / Al, or Cu / MoTi, or a triple layer of Mo / Al-Nd / Mo, Mo / Al / Mo, Ti / Al / Ti, or MoTi / Cu / MoTi.

[0031] A passivation layer (PAS) is applied to the thin-film transistor T. The passivation layer PAS protects the thin-film transistor T and can be made of silicon oxide (SiOx), silicon nitride (SiNx), or a multiple layer thereof.

[0032] A planarization layer (OC) is placed on top of the passivation layer (PAS). The planarization layer (OC) can reduce or planarize the height difference (or step coverage) of an underlying structure and can be made of an organic material such as photoacrylic, polyimide, a benzocyclobutene-based resin, or an acrylate-based resin. If required or desired, either the passivation layer (PAS) or the planarization layer (OC) can be omitted.

[0033] The organic light-emitting diode (OLE) and the auxiliary electrode (AE) are arranged on the planarization layer (OC). The OLE can be located in the thin-film transistor region (TA), and the auxiliary electrode (AE) can be located in the auxiliary electrode region (AEA). The OLE comprises an anode (ANO), an organic composite layer (OL), and a cathode (CAT).

[0034] More precisely, the anode ANO is located on the planarization layer OC. The anode ANO is connected to the drain electrode DE of the thin-film transistor T via a contact hole that penetrates the passivation layer PAS and the planarization layer OC. The anode ANO can have a reflective layer and thus serve as a reflective electrode. The reflective layer can be made of aluminum (Al), copper (Cu), silver (Ag), palladium (Pd), nickel (Ni), or a combination thereof. For example, the reflective layer can be made of an Ag / Pd / Cu (APC) alloy. The anode ANO can be configured as a multilayer structure that includes a reflective layer.

[0035] The auxiliary electrode AE ​​is positioned on the planarization layer OC. The auxiliary electrode AE ​​can contain a low-resistance conductive material. As described later, the auxiliary electrode AE ​​can be connected to the cathode CAT and serve to reduce the cathode CAT's resistance. The auxiliary electrode AE ​​can be made of the same material as the anode ANO and formed in the same layer. In this case, the number of processes can be reduced, as no separate process is required to form the auxiliary electrode AE. Therefore, manufacturing time and costs can be reduced, and product yield can be significantly improved.

[0036] The auxiliary electrode AE ​​can be electrically connected to a supply voltage low-potential line EVL (hereinafter referred to as the "EVSS line") arranged below the auxiliary electrode AE, with at least one insulating layer between them. The EVSS line EVL can receive a supply voltage low potential from a (not shown) power supply unit and transmit the supply voltage low potential to the auxiliary electrode AE. The auxiliary electrode AE ​​and the EVSS line EVL can be connected to each other by a contact hole that penetrates at least one insulating layer located between them.

[0037] As in Fig. 3 and Fig. As shown in Figure 4, the Evss conductor EVL can be formed on the same layer as the source electrode SE and the drain electrode DE, using the same material as both, and connected to the auxiliary electrode AE ​​through an auxiliary contact hole AH that penetrates the planarization layer OC and the passivation layer PAS. However, embodiments are not limited to this. For example, the Evss conductor EVL can be formed on the same layer as the gate electrode GE or the light-shielding layer LS, using the same material as the gate electrode GE or the light-shielding layer LS.In another example, the EVSS line EVL can be designed as a plurality of layers arranged in different layers, with at least one insulating layer between each layer, and the plurality of layers can be connected to each other by a respective contact hole that penetrates the at least one insulating layer.

[0038] The EVS cable (EVL) contains a conductive material with low resistance. For example, the EVS cable (EVL) can be made of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), or a combination thereof.

[0039] A dam layer BN is arranged on the first substrate SUB1, on which the anode ANO and the auxiliary electrode AE ​​are formed, and isolates pixels from each other. The dam layer BN can be formed from an organic material such as polyimide, benzocyclobutene-based resin, and acrylate.

[0040] The dam layer BN has a first opening that exposes most of the anode ANO. The dam layer BN can be designed to expose a central region of the anode ANO and cover one edge of the anode ANO. The exposed portion of the anode ANO can be designed to have the largest possible area to ensure a sufficient opening ratio. The central region of the anode ANO exposed by the dam layer BN can be defined as an emission region.

[0041] Furthermore, the dam layer BN has a second opening that exposes most of the auxiliary electrode AE. The dam layer BN can be designed such that it exposes a central area of ​​the auxiliary electrode AE ​​and covers one edge of the auxiliary electrode AE.

[0042] The dam layer BN and the planarization layer OC can be structured to cover only the thin-film transistor T and a storage capacitor Cst, which is connected to the thin-film transistor T in the pixel. As shown in Fig. 3 and Fig. As shown in Figure 4, the storage capacitor Cst can have a triple structure in which the first to third capacitor electrodes are stacked on top of each other. However, embodiments are not limited to this. For example, the storage capacitor Cst can be implemented as a plurality of layers if required.

[0043] A barrier BR is arranged on the first substrate SUB1, on which the dam layer BN is formed. The barrier BR is formed on the auxiliary electrode AE. The barrier BR serves to physically divide both the organic composite layer OL and the cathode CAT, which is formed later. In other words, both the organic composite layer OL and the cathode CAT are arranged on the auxiliary electrode AE ​​and are each physically divided by the barrier BR. Thus, both the organic composite layer OL and the cathode CAT can be formed discontinuously on the auxiliary electrode.

[0044] The organic composite layer OL is arranged on the first substrate SUB1, on which the dam layer BN and the barrier BR are formed. The organic composite layer OL can extend over a large portion of the surface of the first substrate SUB1. The organic composite layer OL is a layer in which electrons and holes combine and emit light. The organic composite layer OL has an emission layer EML and may further include one or more hole injection layers HIL, hole transport layers HTL, electron transport layers ETL, and electron injection layers EIL. The emission layer EML may contain a light-emitting material that produces white light.

[0045] The organic composite layer OL, which emits white light, can have a multi-stack structure, for example, an n-stack structure, where n is an integer equal to or greater than 1. For example, a 2-stack structure can have a charge-generating layer CGL located between the anode ANO and the cathode CAT, and a first stack and a second stack, one of which is arranged above and one below the charge-generating layer CGL. Both the first stack and the second stack each contain an emission layer and can furthermore contain at least one common layer. The emission layer of the first stack and the emission layer of the second stack can each contain emission materials of different colors.

[0046] The organic composite layer OL located on the auxiliary electrode AE ​​is physically divided by the barrier BR. The organic composite layer OL is divided by the barrier BR and exposes at least a portion of the auxiliary electrode AE ​​around the barrier BR. A portion of the organic composite layer OL, divided by the barrier BR, is located on the barrier BR.

[0047] The cathode CAT is located on the organic composite layer OL. The cathode CAT can extend over the entire surface of the first substrate SUB1. The cathode CAT can be made of a transparent conductive material such as indium tin oxide (ITO) and indium zinc oxide (IZO). Alternatively, the cathode CAT can be made of a material thin enough to transmit light, such as magnesium (Mg), calcium (Ca), aluminum (Al), silver (Ag), or a combination thereof.

[0048] The cathode CAT on the auxiliary electrode AE ​​is physically divided by the barrier BR. The cathode CAT, divided by the barrier BR, exposes at least a portion of the auxiliary electrode AE ​​around the barrier BR. A portion of the cathode CAT, divided by the barrier BR, is located on the barrier BR.

[0049] The cathode CAT covers the organic composite layer OL, and one end of the cathode CAT directly contacts the auxiliary electrode AE. Specifically, one end of the cathode CAT, which is separated by the barrier BR and exposed, directly contacts an exposed upper surface of the auxiliary electrode AE. Such a structure can be implemented through a step coverage difference between the materials forming the organic composite layer OL and the cathode CAT. For example, since the cathode CAT is made of a transparent conductive material with better step coverage than a build-up material of the organic composite layer OL, the cathode CAT can be designed to directly contact the auxiliary electrode AE. To realize this structure, the organic composite layer OL and the cathode CAT can be formed using different methods.For example, the organic composite layer OL can be formed using a thermal deposition process, and the cathode CAT can be formed using a sputtering process. Thus, one end of the cathode CAT can extend further (in other words, further) than one end of the organic composite layer.

[0050] The embodiment of the disclosure can reduce the voltage change depending on a position by electrically connecting the auxiliary electrode AE, formed from low-resistance conductive material, to the cathode CAT. Therefore, the embodiment of the disclosure can minimize the unevenness of the luminance.

[0051] The cathode CAT is electrically connected to the Evss line EVL via the auxiliary electrode AE ​​and can thus receive the supply voltage low potential. The embodiment of the disclosure can provide a power supply path in which the Evss line EVL, the auxiliary electrode AE, and the cathode CAT are connected sequentially. And / or the cathode CAT can receive the supply voltage low potential directly from a power supply unit (not shown). Specifically, the cathode CAT can directly receive the supply voltage low potential supplied through a contact point (not shown) provided on one side of the first substrate SUB1.

[0052] The color filter CF is formed on the second substrate SUB2, which is attached to the first substrate SUB1. The color filter CF can have red (R), blue (B), and green (G) color filters. The pixel can have subpixels that emit red, blue, and green light, and the color filters CF can each be assigned to the corresponding subpixels. If required or desired, the pixel can also contain a white (W) subpixel. The red, blue, and green color filters CF can be separated by a black matrix BM. The black matrix BM is provided between the adjacent color filters CF on the second substrate SUB2 and can prevent the occurrence of color mixing errors.

[0053] The completed first substrate SUB1 is connected to the completed second substrate SUB2, with the filler layer FL positioned between them. The filler layer FL can be formed from an epoxy-based resin and an acrylic-based resin. However, embodiments are not limited to these.

[0054] A protective layer PL is provided on the first substrate SUB1 to protect the components. The protective layer PL is applied to the cathode CAT. The protective layer PL can extend over a large area of ​​the entire surface of the first substrate SUB1. The protective layer PL can be made of an inorganic material such as silicon dioxide (SiOx) or silicon nitride (SiNx).

[0055] More precisely, the protective layer PL is arranged on the cathode CAT and can prevent the ingress of foreign material that could penetrate the organic light-emitting diode (OLE). For example, since the cathode CAT, which has a transparent conductive material, is a crystalline component and cannot block the ingress of ions and moisture, moisture entering from a filler layer can pass through the cathode CAT and enter the organic composite layer OL. The embodiment of the disclosure further includes the protective layer PL on the organic light-emitting diode OLE and can block moisture from penetrating the OLE. Thus, the embodiment of the disclosure can prevent a reduction in the lifetime of the organic light-emitting diode OLE and a reduction in luminance.

[0056] Additionally, the protective layer PL is arranged on the cathode CAT and can buffer or mitigate a stress exerted on the cathode CAT when the first substrate SUB1 and the second substrate SUB2 are joined together. Since, for example, the cathode CAT, which comprises the transparent conductive material, has brittle properties, it can easily crack due to an applied external force. The embodiment of the disclosure further comprises the protective layer PL on the cathode CAT and can prevent the formation of a crack in the cathode CAT. Furthermore, the embodiment of the disclosure can prevent the ingress of oxygen or moisture through the crack.

[0057] The protective layer PL can have a thickness greater than a predetermined thickness to perform the functions described above. Specifically, the protective layer PL must have a thickness greater than a previously set initial thickness t1 to effectively perform its moisture-blocking and buffering functions. For example, the thickness of the protective layer PL can be set to a few micrometers (µm). A chemical vapor deposition (CVD) process can be used to apply the protective layer PL at the initial thickness t1.

[0058] The protective layer PL must extend extensively enough to cover the entire surface of the organic light-emitting diode (OLE) to perform the functions described above. However, because the protective layer PL is formed using the CVD process with poor step coverage due to thickness limitations, it is not formed continuously and is physically divided in the area where the barrier BR is intended. In other words, as described in Fig. As shown in Figure 4, the protective layer PL on the auxiliary electrode AE ​​is physically divided by the barrier BR.

[0059] In this case, moisture can penetrate between the separated protective layers PL, and the light-emitting element can be affected by the moisture. For example, during a process to apply a build-up material to the filler layer FL on the first substrate SUB1, when the first substrate SUB1 is joined with the second substrate SUB2, moisture penetrating from the outside can penetrate between the separated protective layers PL. In another example, moisture penetrating along the sealant SL and the filler layer FL can penetrate between the separated protective layers PL.

[0060] Fig. Figure 5 is a cross-sectional view schematically representing a thin-film transistor area according to the first embodiment of the disclosure. Fig. Figure 6 is a cross-sectional view that schematically represents an auxiliary electrode area according to the first embodiment of the disclosure. Fig. Figure 7 illustrates the step coverage properties of an atomic layer deposition (ALD) process.

[0061] With reference to Fig. 5 and Fig. 6. According to the first embodiment of the disclosure, the OLED display further comprises a cover layer CL on the first substrate SUB1, on which the protective layer PL is formed.

[0062] The cover layer CL extends extensively across the first substrate SUB1 to cover the entire protective layer PL, the barrier BR, the exposed auxiliary electrode AE, etc. The cover layer CL is designed to shield any open area created when the protective layer PL is divided. The cover layer CL is formed as a single body, so that it is continuous across the entire surface of the first substrate SUB1. Specifically, the cover layer CL is not divided by the barrier BR and, unlike the protective layer PL, is continuous (or maintains its continuous continuity). Therefore, the cover layer CL is positioned to cover an outer surface of the barrier BR.

[0063] The first embodiment of the disclosure can effectively prevent the ingress of moisture into the light-emitting element by incorporating the cover layer CL, thereby minimizing the deterioration of the light-emitting element. Thus, the first embodiment of the disclosure can provide an OLED display with improved product reliability.

[0064] The first embodiment of the disclosure can use an atomic layer deposition (ALD) process to provide the top layer CL described above. The first embodiment of the disclosure can form the top layer CL, which is capable of completely covering the entire surface of the first substrate SUB1 with good step coverage using the ALD process. Furthermore, in Fig. 7 shows that a layer which is not divided by a steep slope and is formed continuously can be formed using the ALD process.

[0065] The top layer CL can be made of an inorganic material. For example, the top layer CL can be made of aluminum oxide (Al₂O₃) and silicon nitride (SiNₓ). Since it is sufficient for the top layer CL to block a narrow moisture penetration path that forms when the protective layer PL is divided, the top layer CL can be relatively thin. Because the top layer CL is thin, as described above, the embodiment of the disclosure has an advantage with regard to its manufacturing process for applications in (mass) production. The thickness of the top layer CL can be adjusted to a few nanometers (nm). For example, the top layer CL can have a second thickness t₂ that is thinner than the protective layer PL with its first thickness t₁.

[0066] Fig. Figure 8 shows cross-sectional views that schematically illustrate examples of a barrier shape.

[0067] With reference to Fig. 8. The barrier BR can be configured as a double layer comprising a first structure B1 and a second structure B2. The first structure B1 can be arranged on top of the second structure B2, and one edge of the first structure B1 can have a beveled shape. Specifically, the edge of the first structure B1 can project outwards from an edge of the second structure B2 by a predetermined distance RR. The distance RR between the edge of the first structure B1 and the edge of the second structure B2 can be suitably selected such that the barrier BR can expose at least a portion of the auxiliary electrode AE, while both the organic composite layer OL (see Fig. 6) as well as the cathode CAT (see Fig. 6) is divided. In other words, both the organic composite layer OL (see Fig. 6) as well as the cathode CAT (see 6) are structured such that at least a portion of the auxiliary electrode AE ​​is exposed, while they are separated around the barrier BR due to the predetermined distance RR between the edge of the first structure B1 and the edge of the second structure B2. The first structure B1 can have an inverted conical shape, as shown in (a) of Fig. 8 shown and can have a conical shape, as in (b) of Fig. Figure 8 shows that the first structure B1 and the second structure B2 can be made of different materials.

[0068] The barrier BR can be configured as a single layer with a first structure B1. In this case, the first structure B1 has a shape in which an edge of an upper face projects outwards from an edge of a lower face by a predetermined distance RR. For example, the first structure B1 can have an inverted conical shape, as shown in (c) of Fig. Figure 8 shows that the vertical cross-sectional shape of the first structure B1 can be trapezoidal, with the upper side being longer than the lower side, and one end of the upper side projecting outwards from an end of the lower side by a predetermined distance RR. The distance RR between an end of the upper side and an end of the lower side can be chosen appropriately so that the barrier BR can expose at least a portion of the auxiliary electrode AE, while both the organic composite layer OL (see Figure 8) Fig. 6) as well as the cathode CAT (see Fig. 6) are divided. In other words, both the organic composite layer OL (see Fig. 6) as well as the cathode CAT (see Fig. 6) structured such that at least one part of the auxiliary electrode AE ​​is exposed, while they are divided around the barrier BR because of the distance RR between one end of the upper side and one end of the lower side. <Zweite Ausführungsform>

[0069] Fig. Figure 5 is also a cross-sectional view that schematically represents a thin-film transistor area. Fig. Figure 9 is a cross-sectional view that schematically represents an auxiliary electrode area according to a second embodiment of the disclosure. Fig. 10A and Fig. Figure 10B illustrates, in chronological order, a method for forming a projection. The arrangement of the second embodiment differs from that of the first embodiment with respect to the auxiliary electrode area, and therefore the second embodiment is described in more detail below with regard to the auxiliary electrode area.

[0070] With reference to Fig. 5 and Fig. Figure 9 shows an OLED display with a display field comprising a first substrate SUB1 and a second substrate SUB2 facing each other. A filler layer FL may be inserted between the first substrate SUB1 and the second substrate SUB2.

[0071] The first substrate, SUB1, is a thin-film transistor array substrate on which a thin-film transistor T and an organic light-emitting diode OLE are mounted. The second substrate, SUB2, is a color filter array substrate on which a color filter CF is mounted. The second substrate, SUB2, can function as an encapsulation substrate. The first substrate, SUB1, and the second substrate, SUB2, can be joined together using a sealant, SL. The sealant, SL, is positioned at one edge of the first substrate, SUB1, and at one edge of the second substrate, SUB2, maintaining a predetermined distance between them. The filler layer, FL, can be located within (or contained within) the sealant, SL.

[0072] The first substrate SUB1 can be divided into a thin-film transistor region TA, in which the thin-film transistor T and the organic light-emitting diode OLE are arranged, and an auxiliary electrode region AEA, in which an auxiliary electrode AE ​​is provided. The thin-film transistor T and the organic light-emitting diode OLE, which is connected to the thin-film transistor T, are formed on the thin-film transistor region TA of the first substrate SUB1. The auxiliary electrode AE, which is connected to a cathode CAT, is formed on the auxiliary electrode region AEA of the first substrate SUB1.

[0073] The auxiliary electrode AE ​​is arranged on a dielectric intermediate layer IN. The auxiliary electrode AE ​​can be made of a conductive material with low resistance. As described later, the auxiliary electrode AE ​​can be connected to the cathode CAT and serve to reduce the resistance of the cathode CAT. The auxiliary electrode AE ​​can be made of the same material as a source electrode SE and a drain electrode DE and be formed in the same layer as them. However, embodiments are not limited to this.

[0074] The auxiliary electrode AE ​​can serve as an Evss line EVL. Specifically, the auxiliary electrode AE ​​can be part of the Evss line EVL or a branch from the Evss line EVL. The auxiliary electrode AE ​​can receive a supply voltage low potential from a power supply unit (not shown).

[0075] Although not shown, the auxiliary electrode AE ​​can be electrically connected to the Evss line EVL, which is located beneath the auxiliary electrode AE, with at least one insulating layer between them. The Evss line EVL can receive the supply voltage low potential from the power supply unit and transmit the supply voltage low potential to the auxiliary electrode AE. The auxiliary electrode AE ​​and the Evss line EVL can be connected to each other by a contact hole that penetrates at least one intervening insulating layer.

[0076] A passivation layer PAS and a planarization layer OC are arranged on top of each other on the first substrate SUB1, on which the auxiliary electrode AE ​​is formed. The passivation layer PAS exposes at least a portion of the auxiliary electrode AE.

[0077] The planarization layer OC is arranged on the first substrate SUB1, on which the passivation layer PAS is formed. The planarization layer OC exposes at least a portion of both the exposed auxiliary electrode AE ​​and the passivation layer PAS.

[0078] A dummy structure DP is formed on the first substrate SUB1, on which the planarization layer OC is formed. The dummy structure DP can be made of the same material as the anode ANO and be formed in the same layer as the anode ANO. However, embodiments are not limited to this. The dummy structure DP is arranged on the passivation layer PAS, which is exposed when the planarization layer OC is removed in an area overlapping the auxiliary electrode AE. The dummy structure DP is configured such that one end projects further than the passivation layer PAS in the area overlapping the auxiliary electrode AE. The end of the dummy structure DP that projects beyond the passivation layer PAS can be referred to as the projection DPD.

[0079] The DPD projection functions by physically dividing both the organic composite layer OL and the cathode CAT, which is formed subsequently. In other words, both the organic composite layer OL and the cathode CAT are located on the auxiliary electrode AE ​​and are physically divided by the DPD projection. Thus, both the organic composite layer OL and the cathode CAT can be formed discontinuously on the auxiliary electrode AE.

[0080] The DPD advantage can be realized through a difference in etch selectivity between a material forming the passivation layer (PAS) and a material forming the dummy structure (DP). Regarding Fig. 10A and Fig. In step 10B, a material PASM, forming the passivation layer PAS, and a material DPM, forming the dummy structure DP, are applied to the auxiliary electrode AE, and an etching process is performed to pattern the materials PASM and DPM. Since the material PASM, forming the passivation layer PAS, is selected as having a large etch selectivity difference compared to the material DPM, forming the dummy structure DP, the amount of PASM etched can be relatively larger than the amount of DPM etched. Therefore, the passivation layer PAS can have an undercut shape that is pressed against the inside of the dummy structure DP. A portion of the dummy structure DP can protrude further than the passivation layer PAS due to the undercut shape and can thus be realized as a protrusion DPD.

[0081] A dam layer BN is arranged on the first substrate SUB1, on which the dummy structure DP is formed. The dam layer BN has a first opening that exposes most of the anode ANO. Furthermore, the dam layer BN has a second opening that exposes most of the auxiliary electrode AE ​​and the dummy structure DP. The second opening simultaneously exposes the auxiliary electrode AE ​​and a central section of the dummy structure DP.

[0082] The organic composite layer OL is arranged on the first substrate SUB1, on which the dam layer BN is formed. The organic composite layer OL on the auxiliary electrode AE ​​is physically divided by the projection DPD. The organic composite layer OL, divided by the projection DPD, exposes at least a portion of the auxiliary electrode AE ​​around the projection DPD. The organic composite layer OL, divided by the projection DPD, is arranged on an upper portion of the dummy structure DP and on an upper portion of the auxiliary electrode AE.

[0083] The cathode CAT is located on the organic composite layer OL. The cathode CAT on the auxiliary electrode AE ​​is physically divided by the projection DPD. The cathode CAT, divided by the projection DPD, exposes at least a portion of the auxiliary electrode AE ​​around the projection DPD. The cathode CAT, divided by the projection DPD, is located on the upper portion of the dummy structure DP and the upper portion of the auxiliary electrode AE.

[0084] The cathode CAT covers the organic composite layer OL, and one end of the cathode CAT directly contacts the auxiliary electrode AE. Specifically, one end of the cathode CAT, which is split by the projection DPD and is exposed, directly contacts an upper surface of the exposed auxiliary electrode AE. In other words, one end of the cathode CAT can be more extended (i.e., further) than one end of the organic composite layer OL and can directly contact the auxiliary electrode AE.

[0085] The embodiment of the disclosure can reduce the voltage change depending on a position by electrically connecting the auxiliary electrode AE, formed from low-resistance conductive material, to the cathode CAT. Therefore, the embodiment of the disclosure can minimize the unevenness of the luminance.

[0086] The cathode CAT can be connected to the auxiliary electrode AE, which is part of the Evss line EVL, and can receive the supply voltage low potential. Specifically, the embodiment of the disclosure can provide a power supply path in which the auxiliary electrode AE ​​and the cathode CAT are connected in series.

[0087] Alternatively, the cathode CAT can be electrically connected via the auxiliary electrode AE ​​to the Evss line EVL, which is arranged below the auxiliary electrode AE, and can receive the supply voltage low potential. The embodiment of the disclosure can provide a power supply path in which the Evss line EVL, the auxiliary electrode AE, and the cathode CAT are connected sequentially.

[0088] And / or the cathode CAT can receive the supply voltage low potential directly from the power supply unit (not shown). Specifically, the cathode CAT can directly receive the supply voltage low potential provided through a contact point (not shown) located on one side of the first substrate SUB1.

[0089] A protective layer PL is arranged on the cathode CAT. The protective layer PL must extend over the entire surface to protect a light-emitting element. However, the protective layer PL is physically divided by the projection DPD and is discontinuous in the area where the projection DPD is located. As shown in Fig.As shown in Figure 9, the protective layer PL on the auxiliary electrode AE ​​is physically divided by the projection DPD. In this case, moisture can penetrate between the divided protective layers PL, and the light-emitting element can deteriorate due to the moisture.

[0090] To prevent the ingress of moisture, the OLED display according to the second embodiment of the disclosure further comprises a cover layer CL on the protective layer PL. The cover layer CL extends extensively over the first substrate SUB1 to cover the entire protective layer PL, the exposed auxiliary electrode AE, etc. The cover layer CL is designed to shield an open area that is created when the protective layer PL is divided. The cover layer CL is formed as a single body, so that it is continuous (or has continuous continuity) over the entire surface of the first substrate SUB1. Specifically, the cover layer CL is not divided by the projection DPD and, unlike the protective layer PL, is continuous (or maintains its continuous continuity). Therefore, the cover layer CL is arranged to cover an outer surface of the projection DPD.

[0091] The second embodiment of the disclosure can effectively prevent the ingress of moisture into the light-emitting element by incorporating the cover layer CL, thereby minimizing the deterioration of the light-emitting element. Thus, the second embodiment of the disclosure can provide an OLED display with improved product reliability.

Claims

[1] Organic light-emitting diode display (10) comprising: a substrate (SUB1) comprising a thin-film transistor region (TA) in which a thin-film transistor (T) and an organic light-emitting diode (OLE) connected to the thin-film transistor (T) are arranged, and an auxiliary electrode region (AEA) in which an auxiliary electrode (AE) is arranged; a barrier (BR) arranged on the auxiliary electrode (AE); a cathode (CAT) contained in the organic light-emitting diode (OLE) which is divided by the barrier (BR) and exposes at least a partial area of ​​the auxiliary electrode (AE), wherein one end of the cathode (CAT) is in direct contact with the auxiliary electrode (AE); a cover layer (CL) arranged on the cathode (CAT), wherein the cover layer (CL) has a continuous connection to cover the barrier (BR) and the auxiliary electrode (AE); and a protective layer (PL) that is arranged between the cathode (CAT) and the cover layer (CL); wherein the cover layer (CL) touches one side of the barrier (BR) at a point below an eaves section of the barrier (BR); and wherein the protective layer (PL) is divided by the barrier (BR) and exposes at least a partial area of ​​the auxiliary electrode (AE). [2] Organic light-emitting diode display (10) according to claim 1, wherein the thickness of the cover layer (CL) is adjusted to be less than the thickness of the protective layer (PL). [3] Organic light-emitting diode display (10) according to claim 1 or 2, wherein the cover layer (CL) covers an open area that is created when the protective layer (PL) is divided by the barrier (BR). [4] Organic light-emitting diode display (10) according to one of claims 1 to 3, further comprising a supply line (EVL) which is arranged under the auxiliary electrode (AE) with at least one insulating layer (PAS, OC) in between and receives a supply voltage from a power supply unit, wherein the auxiliary electrode (AE) is electrically connected to the supply line (EVL) by means of a contact hole (AH) which penetrates the at least one insulating layer (PAS, OC). [5] Organic light-emitting diode display (10) according to any one of claims 1 to 4, wherein the organic light-emitting diode (OLE) has an organic composite layer (OL) which is divided by the barrier (BR) and exposes at least a partial area of ​​the auxiliary electrode (AE); wherein the end of the cathode (CAT) on the organic composite layer (OL) is further away than an end of the organic composite layer (OL) and directly contacts the auxiliary electrode (AE). [6] Organic light-emitting diode display (10) according to any one of claims 1 to 5, wherein the cover layer (CL) is formed of aluminium oxide or silicon nitride. [7] Organic light-emitting diode display (10), comprising: a substrate (SUB1) comprising a thin-film transistor region (TA) in which a thin-film transistor (T) and an organic light-emitting diode (OLE) connected to the thin-film transistor (T) are arranged, and an auxiliary electrode region (AEA) in which an auxiliary electrode (AE) is arranged; a passivation layer (PAS) arranged on the auxiliary electrode (AE) that exposes at least a partial area of ​​the auxiliary electrode (AE); a dummy structure (DP) arranged on the passivation layer (PAS), wherein the dummy structure (DP) has a projection (DPD) that extends further than the passivation layer (PAS) in a region overlapping the auxiliary electrode (AE). a cathode (CAT) contained in the organic light-emitting diode (OLE) which is divided by the projection (DPD) and exposes at least a partial area of ​​the auxiliary electrode (AE), wherein one end of the cathode (CAT) is in direct contact with the auxiliary electrode (AE); a cover layer (CL) arranged on the cathode (CAT), wherein the cover layer (CL) has a continuous connection to cover the projection (DPD) and the auxiliary electrode (AE); and a protective layer (PL) that is arranged between the cathode (CAT) and the cover layer (CL); wherein the cover layer (CL) touches one side of the passivation layer (PAS) at a point below the projection of the dummy structure (DP); and wherein the protective layer (PL) is divided by the projection (DPD) and exposes at least a portion of the auxiliary electrode (AE). [8] Organic light-emitting diode display (10) according to claim 7, wherein the thickness of the cover layer (CL) is adjusted to be less than the thickness of the protective layer (PL). [9] Organic light-emitting diode display (10) according to claim 7 or 8, wherein the cover layer (CL) covers an open area that is created when the protective layer (PL) is divided by the projection (DPD). [10] Organic light-emitting diode display (10) according to one of claims 7 to 9, further comprising a supply line (EVL) which is arranged under the auxiliary electrode (AE) with at least one insulating layer (PAS, OC) in between and is configured to receive a supply voltage from a power supply unit, wherein the auxiliary electrode (AE) is electrically connected to the supply line (EVL) by means of a contact hole (AH) which penetrates the at least one insulating layer (PAS, OC). [11] Organic light-emitting diode display (10) according to any one of claims 7 to 9, wherein the auxiliary electrode (AE) is configured to receive a supply voltage from a power supply unit. [12] Organic light-emitting diode display (10) according to any one of claims 7 to 11, wherein the organic light-emitting diode (OLE) has an organic composite layer (OL) which is divided by the projection (DPD) and exposes at least a partial area of ​​the auxiliary electrode (AE), wherein the end of the cathode (CAT) on the organic composite layer (OL) is further away than an end of the organic composite layer (OL) and directly contacts the auxiliary electrode (AE). [13] Organic light-emitting diode display (10) according to any one of claims 7 to 12, wherein the cover layer (CL) is formed of aluminium oxide or silicon nitride.

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