Semiconductor package, conductor frame and method for manufacturing a semiconductor package

The semiconductor package design with metal-free side faces and coated electrical contacts addresses the challenges of maintaining creepage distance and oxidation protection, improving the reliability and performance of semiconductor packages.

DE102020108114B4Active Publication Date: 2026-03-12INFINEON TECHNOLOGIES AG
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Patent Information

Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
Filing Date
2020-03-24
Publication Date
2026-03-12

AI Technical Summary

Technical Problem

Semiconductor packages face challenges in maintaining a minimum creepage distance and protecting exposed metal parts from oxidation and corrosion, particularly in applications like the automotive sector.

Method used

A semiconductor package design with metal-free side faces and a coating on electrical contacts, manufactured using a conductor frame where the molded body does not contact the frame, ensuring contamination-free side surfaces and oxidation protection.

Benefits of technology

Ensures reliable creepage distance and protection against oxidation, enhancing the electrical properties and durability of semiconductor packages.

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Abstract

Semiconductor packages (200), comprising: a semiconductor chip (110), a shaped body (120) that encapsulates the semiconductor chip (110) and has a top surface (121) and an opposite bottom surface (122) as well as four side surfaces (123) that connect the top and bottom surfaces (121, 122), a plurality of electrical contacts (130) arranged on two of the side surfaces (123) of the molded body (120), and a coating (210) that covers the electrical contacts (130) in such a way that no more than the tips (131) of the contacts (130) remain uncovered, wherein the other two side surfaces (123) are metal-free side surfaces (123), wherein the shaped body (120) has a cut surface (140) on one of the side surfaces (123) and the other side surfaces (123) are free of cut surfaces, and wherein the thickness of a casting burr (430) on the metal-free side surfaces (123) is less than the thickness of the electrical contacts (130), measured perpendicular to the top and bottom surfaces (121, 122).
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Description

TECHNICAL AREA

[0001] This disclosure generally relates to a semiconductor package, a conductor frame, and a method for manufacturing a semiconductor package. BACKGROUND

[0002] Semiconductor packages may have to meet stringent requirements regarding their electrical properties. For example, semiconductor packages may be required to exhibit a specific minimum creepage distance. Contamination with metal particles on the surface of a semiconductor package body, as well as exposed metal parts, such as exposed conductor frame components, can negatively affect the creepage distance. Furthermore, it may be necessary to protect exposed metal parts of semiconductor packages, such as electrical contacts, from oxidation and corrosion caused by environmental factors. The automotive sector is one example of an application area that may have the requirements described above. Therefore, it may be desirable to ensure that a semiconductor package can reliably provide a minimum creepage distance and adequate oxidation protection.Improved semiconductor packages and improved methods for manufacturing semiconductor packages can help solve these and other problems. US 2010 / 0 320 592 A1 discloses a semiconductor package comprising a semiconductor chip, a molded body encapsulating the semiconductor chip, and electrical contacts arranged on two side faces of the molded body, wherein the other two side faces are metal-free and the molded body has a single cut surface. Further semiconductor packages are disclosed in JP H02-292 835 A, JP H03-229 431 A, JP S61-263 143 A, US 2015 / 0 001 699 A1, and US 2010 / 0 308 448 A1.

[0003] The problem on which the invention is based is solved by the features of the independent claims. Further advantageous examples are described in the dependent claims. SUMMARY

[0004] Various aspects relate to a semiconductor package comprising a semiconductor chip, a shaped body encapsulating the semiconductor chip and comprising a top and an opposing bottom and four side faces connecting the top and bottom, and a plurality of electrical contacts arranged on two of the side faces of the shaped body, wherein the other two side faces are metal-free side faces and wherein the shaped body comprises a cut surface on no more than one of the side faces.

[0005] Several aspects relate to a method for manufacturing a semiconductor package, the method comprising: providing a conductor frame comprising a chip carrier, a plurality of electrical contacts, four dummy conductors, and a frame, wherein the chip carrier and the plurality of electrical contacts are connected to the frame by the four dummy conductors; arranging a semiconductor chip on the chip carrier; encapsulating the semiconductor chip and the chip carrier, thereby producing a molded body, wherein the molded body has a top and an opposing bottom and four side faces connecting the top and bottom, wherein the plurality of electrical contacts is exposed on two of the side faces and wherein the other two side faces are metal-free side faces that do not contact the conductor frame.wherein the exposed electrical contacts are covered with a coating and the semiconductor package is separated from the frame by cutting the four dummy conductors. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] The accompanying drawings illustrate examples and, together with the description, serve to explain the principles of the revelation. Other examples and many of the intended benefits of the revelation will become apparent when they are better understood in light of the following detailed description. The elements of the drawings are not necessarily to scale with one another. Identical reference numbers indicate corresponding similar parts. The Fig. Figures 1A to 1C show a semiconductor package comprising a plurality of electrical contacts, a shaped body, and a cut surface on no more than one of the side faces of the shaped body. Fig. Figure 2 shows a cross-sectional view of another semiconductor package with a coating covering the electrical contacts. The Fig. Figures 3A to 3D show another semiconductor package at various manufacturing stages. The Fig. 4A and Fig. Figure 4B shows the manufacture of a shaped body of a semiconductor package, wherein the shaped body does not come into contact with an outer frame part of a conductor frame. The Fig. 5A and Fig. Figure 5B shows a top view of a molding tool and a molded semiconductor package obtained by molding with the molding tool. Fig. Figure 6 is a flowchart of a process for manufacturing a semiconductor package. DETAILED DESCRIPTION

[0007] The following detailed description refers to the accompanying drawings. However, it may be obvious to the person skilled in the art that one or more aspects of the revelation can be practiced with a lesser degree of specific detail. In other cases, known structures and elements are presented schematically to facilitate the description of one or more aspects of the revelation. In this context, directional terminology such as "above," "below," "left," "right," "upper," "lower," etc., is used, referring to the orientation of the described figure(s).

[0008] Furthermore, while a particular feature or aspect of an example may be disclosed only with respect to one of several implementations, such feature or aspect may be combined with one or more other features or aspects of the other implementations if desired and advantageous for any or a particular application, unless expressly stated otherwise or technically restricted. Where the terms "include," "have," "with," or other variations thereof are used either in the detailed description or in the claims, these terms shall be understood to be inclusive in a similar manner to the term "comprise." The terms "coupled" and "connected," and variations thereof, may be used.It should be understood that these terms can be used to indicate that two elements work together or interact, regardless of whether they are in direct physical or electrical contact or not; intermediate elements or layers may be provided between the "joined," "attached," or "connected" elements. However, it is also possible for the "joined," "attached," or "connected" elements to be in direct contact with each other. The term "exemplary" is also intended merely as an example and not as the best or optimal solution.

[0009] The semiconductor chip(s) mentioned below may be of different types, may be manufactured using different technologies, and may include, for example, integrated circuits and / or passive logic integrated circuits, control circuits, microprocessors, storage devices, etc.

[0010] The semiconductor package examples described below can use various types of semiconductor chips or circuits integrated into the semiconductor chips, including AC / DC or DC / DC converter circuits, power MOSFETs, power Schottky diodes, JFETs (Junction Gate Field Effect Transistors), bipolar power transistors, integrated power circuits, etc. The semiconductor chip(s) may have contact pads (or electrodes) that provide electrical contact with the integrated circuits contained within the semiconductor chip(s). The electrodes may all be located on only one major face of the semiconductor chip or on both major faces of the semiconductor chip.

[0011] The semiconductor chip(s) can be covered with an encapsulation material to be embedded in an encapsulation after bonding to a device carrier (substrate). The encapsulation material can be electrically insulating. It can be any suitable plastic or polymer material, such as a thermoset, thermoplastic, or heat-curing material, and may contain fillers. Various techniques can be used to encapsulate the semiconductor chip(s) with the encapsulation material, such as any suitable molding technique.

[0012] Fig. Figure 1A shows a sectional view of a semiconductor package 100 comprising a semiconductor chip 110, a shaped body 120 and a plurality of electrical contacts 130. Fig. Figure 1B shows a view of the semiconductor package 100 along arrow A in Fig. 1A. Fig. 1C shows the same view as Fig. 1A, however, is in Fig. 1C of the shaped body 120 is shown opaque.

[0013] In the semiconductor package 100, the molded body 120 encapsulates the semiconductor chip 110. For example, the molded body 120 can encapsulate the semiconductor chip 110 on all sides. The molded body 120 comprises a top surface 121 and a corresponding bottom surface 122, as well as four side surfaces 123 that connect the top and bottom surfaces 121 and 122.

[0014] The multitude of electrical contacts 130 can, for example, be arranged on two of the four side surfaces 123 of the molded body 120, for example, on opposite sides of the four side surfaces 123. The other two side surfaces 123 (i.e., the side surfaces 123 that do not contain any electrical contacts 130) are metal-free side surfaces. "Metal-free" can mean, in particular, that the respective side surface does not have any form of metal part, such as a metal contact, a metal bolt, a metal pin, remnants of a metal tie bar, etc., exposed on the respective side surface. In other words, a metal-free side surface consists only of the molded body 120, but it contains no exposed metal.

[0015] Furthermore, “metal-free” can mean that the surface of the molded body 120 on the respective side face is free from contamination with metal particles. In particular, the molded body 120 can be produced using a molding tool, wherein a mold cavity is formed by an upper and a lower part. The side faces 123 of the molded body can have a small burr at the interface between the upper and lower parts of the molding tool, as described below in relation to the Fig. 4A and Fig. 4B is described in more detail. “Metal-free” can mean that this burr is free of metal residues such as ladder frame residues.

[0016] As in Fig. As shown in Figure 1C, the molded body 120 can have a cross-sectional surface 140. The cross-sectional surface 140 can, for example, be the location of an inlet or an outlet of the mold cavity (e.g., for the flow of molding material into the mold cavity or for the outflow of gas from the mold cavity, see Figure 1C). Fig. 5A and Fig. 5B). After the mold material has hardened in the mold cavity, the material waste filling the inlet or outlet can be cut or stamped off, leaving the cut surface 140.

[0017] The shaped body 120 has a cut surface 140 on at most one of its side surfaces 123. The other side surfaces 123, in particular the side surface 123 opposite the side surface 123 with the cut surface 140, are free of any cut surface.

[0018] The cut surface 140 can be located, for example, on one of the two side surfaces 123 that do not include the electrical contacts 130. The cut surface 140 can be of any suitable size and can, for example, occupy no more than 30%, no more than 20%, or no more than 10% of the area of ​​the respective side surface 123.

[0019] The semiconductor chip 110 can, for example, be a power semiconductor chip designed for operation with high voltage and / or high current. According to one example, the semiconductor chip 110 can be arranged on one or more of the electrical contacts 130. However, it is also possible that the semiconductor chip 110 is arranged on a chip carrier that is not associated with an electrical contact 130 (as in the example of Fig. (1A shown). The semiconductor package 100 can contain a single semiconductor chip 110 or several semiconductor chips 110. The electrical contacts 130 can be coupled, for example, to load electrodes (e.g., a source electrode and a drain electrode or an emitter electrode and a collector electrode) as well as to a control electrode (e.g., a gate electrode) of the semiconductor chip 110.

[0020] The molded body 120 can, for example, comprise a polymer material or a resin. For example, the molded body 120 can also contain a filler, which can be configured, for example, to reduce the thermal resistance of the molded body 120.

[0021] The semiconductor package 100 can, for example, be a "small outline" package. Adjacent electrical contacts 130 can, for example, have a spacing of 1.27 mm. The side surfaces 123 without electrical contacts 130 can have a length l of 7 mm or more. The side surfaces 123 with electrical contacts can, for example, have a width w of 5 mm or more, 8 mm or more, or 10 mm or more.

[0022] The electrical contacts 130 can, for example, have the shape of a hinged wing, with an outer tip of the electrical contacts 130 bent downwards, as in the Fig. 1A and Fig. 1C shown. The electrical contacts 130 can contain or consist of a metal such as Al, Cu, Fe or another suitable material.

[0023] Fig. Figure 2 shows a cross-sectional view of a semiconductor package 200, which may be similar to or identical with the semiconductor package 100, except for the differences described below.

[0024] In addition to the parts described in relation to the semiconductor package 100, the semiconductor package 200 further comprises a coating 210 covering the electrical contacts 130. The coating 210 can, in particular, cover each individual electrical contact 130. The coating 210 can be, for example, a tin coating, a nickel plating coating, a nickel aubergine coating, or a coating of another suitable metal or metal alloy. The coating 210 can, for example, be deposited on the electrical contacts 130 by electroplating, by vapor deposition, or by any other suitable technique.

[0025] The coating 210 completely covers every surface of every electrical contact 130, except for one end face 131 at the tip of each electrical contact, which is not covered by the coating 210. In other words, the material of the electrical contacts 130 is exposed only at the end faces 131. The end faces 131 are not covered by the coating 210 because the electrical contacts 130 are still connected by a connecting bridge at the end faces 131 during the deposition of the coating 210 (this is explained further below in relation to the Fig. 3C and Fig. 3D explained in more detail).

[0026] For example, the coating 210 can be designed to serve as a protective layer for the electrical contacts 130, in particular as an oxidation protection layer. The coating 210 can have any suitable thickness, e.g., a thickness in the nanometer range or a thickness in the micrometer range.

[0027] The Fig. Figures 3A to 3D show a semiconductor package 300 at various stages of production. The semiconductor package 300 may be similar to or identical to the semiconductor packages 100 and 200.

[0028] Fig. Figure 3A shows a conductor frame 310 before the semiconductor chip 110 is placed on the conductor frame, the semiconductor chip 110 is encapsulated with the molded body 120, and the semiconductor housing 300 is separated from the rest of the conductor frame 310.

[0029] The conductor frame 310 comprises the electrical contacts 130, a frame 320 and connecting bridges 330. The conductor frame 310 can further comprise one or more die pads 340 for one or more semiconductor chips 110.

[0030] The frame 320 can be arranged to the left and right of the other parts of the conductor frame 310 and can run along the conductor frame strip. The frame 320 can be the part of the conductor frame strip that connects successive sections of the conductor frame used in the manufacture of individual semiconductor packages 300.

[0031] The electrical contacts 130 are connected to the frame 320 by the connecting webs 330. The connecting webs 330 are connected to the electrical contacts 130 at their apex, and the connecting webs 330 can be arranged substantially perpendicular to the electrical contacts 130 and the frame 320.

[0032] According to one example, the electrical contacts 130 can remain connected to the frame 320 by connecting pieces 350. The connecting pieces 350 can be arranged substantially parallel to the connecting webs 330. In some embodiments, the connecting pieces 350 can have the form of a dam bar. The connecting pieces 350 can be connected to the electrical contacts 130 at their sides. During the manufacture of the semiconductor package 300, the connecting pieces 350 can be cut away. However, after the connecting pieces 350 have been cut away, the electrical contacts 130 are still connected to the frame 320 by the connecting webs 330.

[0033] Fig. Figure 3B shows a stage of the manufacture of the semiconductor package 300, in which one or more semiconductor chips 110 were arranged on the die pad(s) 340 and the molded body 120 was formed.

[0034] As in Fig. As shown in Figure 3B, the molded body 120 does not come into contact with the frame 320. Instead, a gap 360 is arranged between the molded body 120 and the frame 320, completely separating the two. In particular, the conductor frame 310 does not include any form of metal strut that bridges the gap 360 at any point during the fabrication of the semiconductor package 300. The gap 360 can, for example, have a width of 200 µm or more, 300 µm or more, 400 µm or more, or 500 µm or more.

[0035] Fig. Figure 3C shows the semiconductor package 300 in a manufacturing stage where the connecting pieces 350 have been cut away. The electrical contacts 130 (and, by extension, the semiconductor package 300) are connected to the frame 320 by the connecting webs 330 and by the dummy conductors 370, with a dummy conductor 370 arranged at each end of each connecting web 330. A first end of each dummy conductor 370 is connected to one of the connecting webs 330, and a corresponding second end of each dummy conductor 370 is connected to the frame 320.

[0036] As in Fig. As shown in Figure 3C, the dummy conductors 370 can have essentially the same shape and spatial orientation as the electrical contacts 130. The only difference between the dummy conductors 370 and the electrical contacts 130 may be that the second end of each dummy conductor 370 is attached to the frame 320, while the second end of each electrical contact 130 is arranged inside the molded body 120.

[0037] The coating 210 can be applied to the electrical contacts 130 in the Fig. The coating 210 is deposited in the manufacturing state shown in Figure 3C. Since the connecting pieces 350 were cut away beforehand, the coating 210 can completely cover the surface of the electrical contacts 130, except for the tips where the electrical contacts 130 are connected to the connecting bridge 330.

[0038] Furthermore, the electrical contacts 130 can be subjected to a forming process, e.g. a stamping process, to obtain a hinged wing shape, as in Fig. Figure 3C illustrates this. This forming process can be carried out, for example, before the application of the coating 210. The dummy leads 370 can also be subjected to the forming process and thus acquire the same wing-shaped bend as the electrical contacts 130.

[0039] Fig. The 3D image shows the semiconductor package 300 after singulation from the frame 320. Singulation includes cutting the electrical contacts 130 from the connecting bridges 330. Since the semiconductor package 300 is in its manufactured state after Fig. Since 3C is only connected to the frame 320 by the connecting bridges 330 and the dummy ladder 370, the singulation process does not require cutting at any other point.

[0040] Fig. Figure 4A shows a view of the ladder frame 310 along arrow A in Fig. 3A. In Fig. 4A is a forming tool 410 arranged around a portion of the conductor frame 310. The forming tool 410 forms a mold cavity 420, with the electrical contacts 130 located inside the mold cavity 420 and the frame 320 located outside the mold cavity 420. A molding material can be filled into the mold cavity 420 to produce the molded body 120. For this purpose, the forming tool 410 can have a single opening, e.g., on a side surface 123 of the molded body 120 (see Figure 4A). Fig. 5A).

[0041] The mold tool 410 can have an upper half 411 and a lower half 412, the two halves 411, 412 being pressed together to form the mold cavity 420. In particular, the upper half 411 and the lower half 412 can be in contact within the gap 360 of the ladder frame 310. The upper and lower halves 411, 412 can be arranged in the gap 360 such that they do not come into contact with the frame 320. Instead, the upper and lower halves 411, 412 can be arranged at a distance d>0 from the frame. For this reason, the mold material filling the mold cavity 420 does not come into contact with the frame 320. In particular, the ladder frame 310 does not have a beam extending from the frame 320 into the mold cavity 420.

[0042] Fig. Figure 4B shows the finished molded body 120 after the molding tool 410 has been removed. Since the frame 320 is not clamped between the two halves 411, 412, the molded body 120 does not have a pronounced flash in the plane of the ladder frame 310. Instead, the molded body 120 may, for example, have no more than a thin flash 430 at the interface of the upper and lower halves 411, 412. The thickness of the flash 430 may be much smaller than the thickness z of the ladder frame 310.

[0043] Since the mold body 120 does not come into contact with the frame 320, the side surfaces 123 of the mold body 120 can be free of contamination by metal particles without electrical contacts 130. Such contamination would occur if the frame 320 were clamped between the two halves 411, 412 of the mold tool 410 in such a way that the mold material came into contact with the frame 320. After the mold material had cured, the frame 320 would have to be removed from the mold body 120, leaving behind contamination with metal particles on the surface of the mold body 120. Such metal particle contamination could reduce the creepage distance of the semiconductor package to a value that is less than the length 1 of the semiconductor package (cf. Fig. 1C).

[0044] Furthermore, since no spar connects the molded body 120 to the frame 320, no such spar needs to be cut off or pulled out of the molded body 120. For this reason, the metal-free side surfaces 123 contain no remnants of such a spar, i.e., no detached remnant of a spar and also no cavity where a spar used to be.

[0045] Fig. Figure 5A shows a schematic top view of the mold tool 410. The mold tool 410 includes a single inlet 510 which is connected to the cavity 420 and is designed to allow the mold material to flow into the cavity 420, as indicated by the arrow.

[0046] Fig. Figure 5B shows the molded body 120 after the molding material has hardened and the molding tool 410 has been removed. At the location of the inlet 510, there is a projection 520, formed from excess molding material and attached to the molded body 120. Removing the projection 520 from the molded body 120 can create the cut surface 140 in the corresponding side surface 123 of the molded body 120 (see Figure 5B). Fig. 1C). The 520 projection can be cut or punched away, for example.

[0047] The protrusion 520 can be removed, for example, while the semiconductor package 300 is still connected to the frame 320, or it can be removed after the semiconductor package has been separated from the frame 320.

[0048] Since the semiconductor package 300 is connected to the conductor frame 310 by the dummy conductor 370 before singulation, the projection 520 does not need to be designed to mechanically couple the semiconductor package 300 to the frame 320. In particular, it is not necessary to provide several projections, e.g., arranged on opposite side faces 123 of the molded body 120, to mechanically couple the semiconductor package 300 to the frame 320 before singulation.

[0049] Having only one protrusion to remove can be advantageous because cutting or punching the protrusion 520 can generate mold material particles that can be deposited on the semiconductor package 300, for example, on the electrical contacts 130. This can, for example, impair the electrical properties and / or the solderability of the electrical contacts 130.

[0050] Fig. Figure 6 is a flowchart of a process 600 for manufacturing a semiconductor package according to an embodiment of this disclosure. The process 600 can be used, for example, to manufacture semiconductor packages 100, 200, and 300.

[0051] Method 600 comprises, in 601, an act of providing a conductor frame comprising a chip carrier, a plurality of electrical contacts, four dummy conductors, and a frame, wherein the chip carrier and the plurality of electrical contacts are connected to the frame by the four dummy conductors; in 602, an act of arranging a semiconductor chip on the chip carrier; and in 603, an act of mold casting over the semiconductor chip and the chip carrier, thereby producing a molded body, wherein the molded body has a top and an opposing bottom and four side faces connecting the top and bottom, wherein the plurality of electrical contacts is exposed on two of the side faces and wherein the other two side faces are metal-free side faces that do not come into contact with the conductor frame.at 604 an act of covering the exposed electrical contacts with a coating and at 605 an act of separating the semiconductor package from the frame by cutting the four dummy conductors.

[0052] The act of providing 601 of the ladder frame can, for example, involve providing the ladder frame 310, as in Fig. 3A shown, include. The act of arranging 602 a semiconductor chip may, for example, include arranging the semiconductor chip 110 on the die pad 340. The act of mold casting 603 may, for example, include producing the molded body 120, as shown, for example, in the Fig. 4A, Fig. 4B and Fig. 5A, Fig. 5B shown.

[0053] According to an example, the casting process 603 can be carried out while the electrical contacts 130 are still connected to the frame 320 by the connecting pieces 350, as shown in the Fig. 3A and Fig. 3B shown.

[0054] The act of covering 604 can include covering the electrical contacts 130 with the coating 210, as shown in Fig. 2 described. The covering 604 can be carried out, for example, after the mold casting 603. The covering 604 can be carried out, for example, after the removal of the connecting pieces 350. In this way, the exposed electrical contacts 130 can be completely covered with the coating 210, with the exception of the tips that are still connected to the connecting webs 330.

[0055] The singulation process 605 can be carried out after the covering process 604. For example, before singulation 605, the electrical contacts 130 and the dummy conductor 370 can be bent to, for example, Fig. 3D and Fig. To obtain the wing shape shown in 3C. The bending can be carried out, for example, after covering with 604. EXAMPLES

[0056] The following section explains semiconductor packages and the processes for manufacturing semiconductor packages in more detail using specific examples.

[0057] Example 1 is a semiconductor package comprising: a semiconductor chip, a shaped body encapsulating the semiconductor chip and comprising a top and an opposite bottom and four side faces connecting the top and bottom, and a plurality of electrical contacts arranged on two of the side faces of the shaped body, wherein the other two side faces are metal-free side faces and wherein the shaped body comprises a cut surface on no more than one of the side faces.

[0058] Example 2 is the semiconductor package of Example 1, which further comprises: a coating that covers the electrical contacts such that no more than the tips of the contacts remain uncovered.

[0059] Example 3 is the semiconductor package of Example 1 or 2, wherein the metal-free side surfaces are free from any contamination with metal particles.

[0060] Example 4 is the semiconductor package from Example 2, where the coating contains or consists of Sn.

[0061] Example 5 is the semiconductor package of one of the previous examples, wherein the metal-free side faces have a length of 7 mm or more.

[0062] Example 6 is the semiconductor package of one of the preceding examples, in which the metal-free side surfaces are free of any cavity arranged in a plane encompassing the electrical contacts.

[0063] Example 7 is the semiconductor package of one of the previous examples, in which the electrical contacts contain or are made of Cu.

[0064] Example 8 is the semiconductor package of one of the preceding examples, wherein a length of the side faces enclosing the electrical contacts is greater than a length of the metal-free side faces.

[0065] Example 9 is the semiconductor package of one of the previous examples, wherein a creepage distance along the metal-free side surfaces is 8 mm or more.

[0066] Example 10 is the semiconductor package of one of the previous examples, wherein the thickness of a casting burr on the metal-free side surfaces is less than the thickness of the electrical contacts, measured perpendicular to the top and bottom surfaces.

[0067] Example 11 is a method for manufacturing a semiconductor package, the method comprising: providing a conductor frame with a chip carrier, a plurality of electrical contacts, four dummy conductors, and a frame, wherein the chip carrier and the plurality of electrical contacts are connected to the frame by the four dummy conductors; arranging a semiconductor chip on the chip carrier; encapsulating the semiconductor chip and the chip carrier, thereby producing a molded body, wherein the molded body has a top and an opposing bottom and four side faces connecting the top and bottom, wherein the plurality of electrical contacts is exposed on two of the side faces and wherein the other two side faces are metal-free side faces that do not contact the conductor frame; covering the exposed electrical contacts with a coating.and separating the semiconductor package from the frame by cutting off the four dummy conductors.

[0068] Example 12 is the method of Example 11, wherein a gap is arranged between the metal-free side surfaces and the frame of the conductor frame.

[0069] Example 13 is the method of Example 11 or 12, wherein the plurality of electrical contacts is arranged in two rows along the respective side faces of the molded body and wherein the four dummy conductors are arranged at both ends of both rows.

[0070] Example 14 is the method of one of Examples 11 to 13, wherein the four dummy conductors are connected to the plurality of electrical contacts by connecting bridges, the connecting bridges being arranged at the tips of the electrical contacts and perpendicular to the electrical contacts and the four dummy conductors.

[0071] Example 15 is the method of Example 14, wherein during the coating of the electrical contacts the semiconductor package is mechanically coupled to the frame only by the connecting bridges and dummy conductors.

[0072] Example 16 is the method according to one of Examples 11 to 15, further comprising: bending the plurality of electrical contacts and the four dummy conductors so that the electrical contacts and the four dummy conductors have a wing-shaped form.

[0073] Example 17 is the method according to one of Examples 11 to 16, wherein the electrical contacts are coated such that no more than the tips of the electrical contacts remain uncovered by the coating.

[0074] Example 18 is a device with means for carrying out the method according to one of Examples 11 to 17.

Claims

[1] Semiconductor packages (200), comprising: a semiconductor chip (110), a shaped body (120) that encapsulates the semiconductor chip (110) and has a top surface (121) and an opposite bottom surface (122) as well as four side surfaces (123) that connect the top and bottom surfaces (121, 122), a plurality of electrical contacts (130) arranged on two of the side surfaces (123) of the molded body (120), and a coating (210) that covers the electrical contacts (130) in such a way that no more than the tips (131) of the contacts (130) remain uncovered, wherein the other two side surfaces (123) are metal-free side surfaces (123), wherein the shaped body (120) has a cut surface (140) on one of the side surfaces (123) and the other side surfaces (123) are free of cut surfaces, and wherein the thickness of a casting burr (430) on the metal-free side surfaces (123) is less than the thickness of the electrical contacts (130), measured perpendicular to the top and bottom surfaces (121, 122). [2] Semiconductor package (200) according to claim 1, further comprising: a die pad (340), wherein the semiconductor chip (110) is arranged on the die pad (340), and the side surfaces of the die pad are free of any form of metal spar. [3] Semiconductor package (200) according to any of the preceding claims, wherein the coating (210) comprises or consists of Sn. [4] Semiconductor package (200) according to any of the preceding claims, wherein the metal-free side surfaces (123) have a length of 7 mm or more. [5] Semiconductor housing (200) according to one of the preceding claims, wherein the metal-free side surfaces (123) are free of any cavity arranged in a plane containing the electrical contacts (130). [6] Semiconductor housing (200) according to any of the preceding claims, wherein the electrical contacts (130) comprise Cu or are made of Cu. [7] Semiconductor housing (200) according to one of the preceding claims, wherein a length of the side surfaces (123) comprising the electrical contacts (130) is greater than a length of the metal-free side surfaces (123). [8] Semiconductor package (200) according to one of the preceding claims, wherein a creepage distance along the metal-free side surfaces (123) is 8 mm or more. [9] Method (600) for manufacturing a semiconductor package (200) according to any one of the preceding claims, wherein the method (600) comprises: Providing (601) a conductor frame (310) comprising a die pad (340), a plurality of electrical contacts (130), four dummy conductors (370) and a frame (320), wherein the die pad (340) and the plurality of electrical contacts (130) are connected to the frame (320) by the four dummy conductors (370), Arranging (602) a semiconductor chip (110) on the die pad (340), Molding (603) over the semiconductor chip (110) and the die pad (340) to produce a molded body (120), wherein the molded body (120) has a top (121) and a opposite bottom (122) and four side surfaces (123) connecting the top and bottom (121, 122), wherein the plurality of electrical contacts (130) is exposed on two of the side surfaces (123) and wherein the other two side surfaces (123) are metal-free side surfaces that do not come into contact with the conductor frame (310), Covering (604) the exposed electrical contacts (130) with a coating (210), and Separating (605) the semiconductor package (200) from the frame (320) by cutting off the four dummy conductors (370). [10] Method (600) according to claim 9, wherein a gap is arranged between the metal-free side surfaces (123) and the frame (320) of the conductor frame (310). [11] Method (600) according to claim 9 or 10, wherein the plurality of electrical contacts (130) is arranged in two rows along the respective side surfaces (123) of the molded body (120) and wherein the four dummy conductors (370) are arranged at both ends of both rows. [12] Method (600) according to one of claims 9 to 11, wherein the four dummy conductors (370) are connected to the multiple electrical contacts (130) by connecting bridges (350), wherein the connecting bridges (350) are arranged at the tips of the electrical contacts (130) and perpendicular to the electrical contacts (130) and the four dummy conductors (370). [13] Ladder frame (310), comprising: a frame (320), a die pad (340), electrical contacts (130), connecting bridges (330) and dummy conductor (370), wherein the die pad (340) and the electrical contacts (130) are connected to the frame (320) by the connecting bridges (330) and the dummy conductors (370), and wherein the connecting bridges (330) at the tip of each electrical contact (130) are connected to the electrical contacts (130). [14] Ladder frame (310) according to claim 13, wherein the die pad (340) is not directly connected to the dummy ladders (370). [15] Conductor frame (310) according to claim 13 or 14, wherein an inner end of the electrical contacts (130) is connected to the die pad (340) and wherein a first end of the dummy conductor (370) is connected to the connecting webs (330) and an opposite second end is connected to the frame (320).

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