DISPLAY DEVICE AND METHOD FOR CONTROLLING THE SAME

Abstract

Display device comprising: a display panel (110) having a plurality of subpixels (SP) sharing a single reference voltage line (RVL), each of the subpixels (SP) comprising a switching transistor (SWT), a drive transistor (DT), a sense transistor (SET), a storage capacitor (SC), and a light emitting element (150); a data driver (130) configured to supply a data voltage (Vdata) to the plurality of subpixels (SP); a gate driver (120) configured to supply a gate signal (SCAN) to the plurality of subpixels (SP); a timing control unit (140) configured to control the data driver (120) and the gate driver (130); a detector (170) configured to detect a threshold voltage (V TH) and a mobility (α) of the drive transistor (DT) to detect whether there is a short circuit between a gate electrode and an output terminal of the drive transistor (DT); a plurality of data lines (DL) for transmitting the data voltage (Vdata) from the data driver (130) to the plurality of subpixels (SP); a plurality of switches (SW) for switching electrical connections between the data driver (130) and the plurality of data lines (DL); an initialization switch (SPRE) connected to the reference voltage line (RVL) for applying a reference voltage (Vref) to the detection transistor (SET); and a sampling switch (SAM) configured to transmit a voltage from the detection transistor (SET) to the detector (170), wherein the detector (170) is configured to detect the mobility (α) of the drive transistor (DT) from a first time period (T1) to a fourth time period (T4), wherein the gate driver (120) is configured to apply a switch-on signal to the detection transistor (SET) and the switching transistor (SWT), the data driver (130) is configured to apply the data voltage (Vdata) to the switching transistor (SWT), and wherein during the first time period the reference voltage (Vref) is applied to the detection transistor (SET) by the initialization switch (SPRE), wherein during the second time period (T2) the plurality of switches (SW) are turned off to remove the electrical connection between the data driver (130) and the plurality of data lines (DL), wherein during the third time period (T3) the application of the reference voltage (Vref) to the detection transistor (SET) is switched off by the initialization switch (SPRE), and wherein during the fourth time period (T4) a voltage at the output terminal of the drive transistor (DT) is transmitted through the sampling switch (SAM) to the detector (170).

Description

BACKGROUNDTechnical field

[0001] The present disclosure relates to a display device and a method for driving a display device, and more particularly to a display device and a method for driving a display device that can detect whether a short circuit exists between a gate electrode and an output terminal of a drive transistor. Description of the state of the art

[0002] Display devices used by a monitor of a computer, a television, a mobile phone, or the like include an organic light-emitting display (OLED), which emits light independently, and a liquid crystal display (LCD), which requires a separate light source.

[0003] Among such various display devices, an organic light-emitting display device includes a display panel having a plurality of subpixels and drivers for driving the display panel and the subpixels arranged thereon. The drivers include a gate driver that supplies gate signals to the display panel and a data driver that supplies data voltages. When a signal such as a gate signal and a data voltage is supplied to a subpixel of the organic light-emitting display device, the selected subpixel emits light to display an image. A variety of transistors are arranged in the subpixels of the display panel. A short circuit may be generated between the electrodes of the transistors arranged in the subpixels during a manufacturing process or after the manufacturing process.

[0004] US 2017 / 0294166 A1 describes a display device comprising a display panel having a reference voltage providing section configured to apply a first reference voltage from a first reference voltage line to a plurality of readout lines, and a pixel section having a plurality of pixels connected to the readout lines, a scan driver providing a scan signal to the pixels via a plurality of scan lines, a data driver providing a data signal to the pixels via a plurality of data lines, a readout circuit converting voltages of the readout lines into digital data, and a controller turning off the power supply based on the digital data.

[0005] US 2011 / 0164025 A1 mentions a method for forming a threshold voltage detection circuit in a pixel that detects a threshold voltage shift of a transistor formed of amorphous silicon. By providing a threshold voltage detection transistor in each pixel that can short-circuit the gate and drain of a drive transistor, a gate voltage is discharged during a threshold voltage detection period separate from the light emission time, so that a threshold voltage of the drive transistor can be stored as a potential at the other end of a holding capacitor. SUMMARY

[0006] In view of the above, it is an object of the present disclosure to provide a display device that can detect whether a short circuit exists between a gate electrode and an output terminal of a driving transistor in a subpixel, and a method of driving the display device.

[0007] Another object of the present disclosure is to provide a display device that can detect whether a short circuit exists between two electrodes of a storage capacitor in a subpixel, and a method for driving the display device.

[0008] Yet another object of the present disclosure is to provide a display device that can address a detection error that may occur in a structure in which multiple subpixels share a reference voltage line.

[0009] Still another object of the present disclosure is to provide a display device capable of detecting in the same manner as a switching transistor and a detecting transistor of a subpixel are connected to separate lines, in a structure in which the switching transistor and the detecting transistor share a gate line.

[0010] Objects of the present disclosure are not limited to the above-mentioned objects, and other objects not mentioned above can be clearly understood by those skilled in the art from the following descriptions.

[0011] The object is achieved by the features of the independent claims. Preferred embodiments are given in the dependent claims.

[0012] According to one aspect of the present disclosure, there is provided a display device comprising: a display panel having a plurality of subpixels sharing a single reference voltage line, each of the subpixels comprising a switching transistor, a driving transistor, a sensing transistor, a storage capacitor, and a light-emitting element; a data driver configured to supply a data voltage to the plurality of subpixels; a gate driver configured to supply a gate signal to the plurality of subpixels; a timing controller configured to control the data driver and the gate driver; and a detector configured to detect a threshold voltage and a mobility of the driving transistor to detect whether a short circuit exists between a gate electrode and an output terminal of the driving transistor.

[0013] According to another aspect of the present disclosure, there is provided a method for driving a display device, the method comprising the steps of: detecting a threshold voltage of a driving transistor of each of a plurality of subpixels sharing a single reference voltage line; compensating the threshold voltage of the driving transistor based on results of detecting the threshold voltage of the driving transistor; detecting the mobility of the driving transistor; and determining whether a short circuit exists between a gate electrode and an output terminal of the driving transistor based on results of detecting the threshold voltage and the mobility of the driving transistor.

[0014] Other detailed matters of the exemplary embodiments are included in the detailed description and the drawings.

[0015] According to an exemplary embodiment of the present disclosure, it is possible to detect whether a short circuit exists between a gate electrode and an output terminal of a driving transistor of a subpixel.

[0016] According to another exemplary embodiment of the present disclosure, it is possible to detect whether a short circuit exists between two electrodes of a storage capacitor of a subpixel.

[0017] According to an exemplary embodiment of the present disclosure, it is possible to address a detection error that may occur in a structure in which subpixels of a single pixel are connected to a single reference voltage line.

[0018] According to an exemplary embodiment of the present disclosure, it is possible to achieve the same effect as that obtained when a detection signal is applied to the detection transistor while no scanning signal is applied to the switching transistor in a structure in which a switching transistor and a detection transistor of a subpixel receive the same signal from a single gate line.

[0019] The effects according to the present disclosure are not limited to the contents illustrated above, and more diverse effects are included in the present patent specification. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The accompanying drawings, which are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this application, illustrate embodiments of the disclosure and, together with the description, serve to explain various principles; in which: Fig. 1 is a view showing a display device according to an exemplary embodiment of the present disclosure; Fig. 2 is a circuit diagram of a subpixel of a display device according to an exemplary embodiment of the present disclosure; Fig. 3 is a circuit diagram of a single pixel with four subpixels in a display device according to an exemplary embodiment of the present disclosure; Fig. 4 is a waveform diagram illustrating a display device and a method of driving the display device according to an exemplary embodiment of the present disclosure; Fig. 5A and Fig. 5B are circuit diagrams illustrating a process of detecting a normal subpixel and a defective subpixel in a display device and a method of driving the display device according to an exemplary embodiment of the present disclosure; Fig. 6 is a waveform diagram illustrating a display device and a method of driving the display device according to an exemplary embodiment of the present disclosure; Fig. 7A and Fig. 7B are circuit diagrams illustrating a process for detecting a normal subpixel and a defective subpixel in a display device and a method for driving the display device according to an exemplary embodiment of the present disclosure; and Fig. 8 is a diagram illustrating timings for detecting a normal subpixel and a defective subpixel in a display device and a method for driving the display device according to an exemplary embodiment of the present disclosure. DETAILED DESCRIPTION

[0021] Advantages and features of the present disclosure and a method for achieving the advantages and features will become clear by reference to exemplary embodiments described in detail below together with the accompanying drawings. However, the present disclosure is not limited to the exemplary embodiments disclosed herein, but is implemented in various forms. The exemplary embodiments are provided only as examples so that those skilled in the art can fully understand the disclosures of the present disclosure and the scope of the present disclosure. Therefore, the present disclosure is defined only by the scope of the appended claims.

[0022] The shapes, sizes, ratios, angles, numbers, and the like illustrated in the accompanying drawings for describing the exemplary embodiments of the present disclosure are merely examples, and the present disclosure is not limited thereto. Furthermore, in the following description of the present disclosure, detailed explanation of known related technologies may be omitted to avoid unnecessarily obscuring the subject matter of the present disclosure. The terms such as "including," "having," and "comprising" used herein are generally intended to allow other components to be added, unless the terms containing the term "only" are used. Any reference to the singular may include the plural unless expressly stated otherwise.

[0023] Components are interpreted to encompass a common error range, even if not explicitly stated.

[0024] When the positional relationship between two parts is described using terms such as "on", "over", "under" and "next to", one or more parts may be located between the two parts unless the terms "immediate" or "direct" are used.

[0025] When an element or layer is placed "on top of" another element or layer, it may be placed directly on top of the other layer or element, or another layer or element may be sandwiched between them.

[0026] Although the terms "first," "second," and the like are used to describe various components, these components are not limited by these terms. These terms are used merely to distinguish one component from the other components. Therefore, a first component to be mentioned below may be a second component in a technical concept of the present disclosure.

[0027] Like reference numerals generally refer to like elements throughout the patent specification.

[0028] A size and a thickness of each component illustrated in the drawing are illustrated for convenience of description, and the present disclosure is not limited to the size and thickness of the illustrated component.

[0029] The features of various embodiments of the present disclosure may be partially or fully linked or combined with each other, and may be interlocked and operated in technically different ways, and the embodiments may be practiced independently of each other or in conjunction with each other.

[0030] Here, transistors used in a display device can be implemented as one or more of n-channel transistors (NMOS) and p-channel transistors (PMOS). The transistors can be implemented as an oxide semiconductor transistor with an oxide semiconductor as the active layer or an LTPS transistor with a low-temperature polysilicon (LTPS) as the active layer. Each of the transistors can include at least a gate electrode, a source electrode, and a drain electrode. The transistors can be implemented as thin-film transistors (TFTs) on the display panel. In the transistors, the charge carriers flow from the source electrode to the drain electrode. For an n-channel transistor (NMOS), where electrons are the charge carriers, the voltage at the source electrode is lower than the voltage at the drain electrode to allow the electrons to flow from the source electrode to the drain electrode.In an n-channel NMOS transistor, the electric current flows from the drain electrode to the source electrode, and the source electrode can be an output terminal. For a p-channel transistor (PMOS), where holes are the charge carriers, the voltage at the source electrode is higher than the voltage at the drain electrode to allow the holes to flow from the source electrode to the drain electrode. In a p-channel PMOS transistor, when holes flow from the source electrode to the drain electrode, the electric current flows from the source electrode to the drain electrode, and the drain electrode can be an output terminal. As such, it should be noted that the source and drain electrodes of a transistor are not fixed but can be interchanged depending on the applied voltage. Here, transistors are assumed to be n-channel (NMOS) transistors, but the present disclosure is not limited thereto.P-channel transistors can be used and the circuit configuration can be changed accordingly.

[0031] For transistors used as switching elements, a gate signal oscillates between a gate-on voltage and a gate-off voltage. The gate-on voltage is set to a voltage higher than the transistor's threshold voltage Vth, while the gate-off voltage is set to a voltage lower than the transistor's threshold voltage Vth. The transistor turns on in response to the gate-on voltage and turns off in response to the gate-off voltage. For an NMOS transistor, the gate-on voltage can be a high gate voltage (VGH) and the gate-off voltage can be a low gate voltage (VGL). For a PMOS transistor, the gate-on voltage can be a low gate voltage (VGL) and the gate-off voltage can be a high gate voltage (VGH).

[0032] Hereinafter, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0033] Fig. 1 is a view showing a display device according to an exemplary embodiment of the present disclosure. Referring to Fig. 1, a display device 100 includes a display panel 110, a gate driver 120, a data driver 130, and a timing controller 140.

[0034] The display panel 110 is a panel for displaying images. The display panel 110 may include a variety of circuits, wiring, and light-emitting elements arranged on a substrate. The display panel 110 may include a plurality of pixels, each of which is defined by one or more data lines DL and one or more gate lines GL that intersect each other. A pixel is connected to the one or more data lines DL and the one or more gate lines GL. The display panel 110 may include a display region defined by the plurality of pixels PX and a non-display region in which various signal lines, pads, etc. are formed. The display panel 110 may be implemented as a display panel used in various display devices, such as a liquid crystal display device, an organic light-emitting display device, and an electrophoretic display device.In the following description, the display panel 110 is described as a panel used in an organic light-emitting display device. However, it should be understood that the present disclosure is not limited thereto.

[0035] Timing controller 140 receives timing signals, such as a vertical synchronization signal, a horizontal synchronization signal, a data enable signal, and a dot clock, via a receiving circuit such as an LVDS (Low Voltage Differential Signaling) interface and a TMDS (Minimized Transient Differential Signaling) interface connected to a host computer system. Timing controller 140 generates timing control signals for controlling data driver 130 and gate driver 120 based on the received timing signals.

[0036] The data driver 130 supplies a data voltage Vdata to a plurality of subpixels SP. The data driver 130 may include a plurality of source drive integrated circuits (source drive ICs). The plurality of source drive ICs may receive digital video data RGB and a source timing control signal DDC from the timing control unit 140. The source drive ICs may convert the digital video data RGB into a gamma voltage in response to a source timing control signal DDC to generate a data voltage Vdata and may apply the data voltage Vdata via the data lines DL of the display panel 110. The source drive ICs may be connected to the data lines DL of the display panel 110 using a chip-on-glass (COG) process or an automated tape bonding (TAB) process. In addition, the source drive ICs may be formed on the display panel 110 or may be formed on a separate PCB and connected to the display panel 110.

[0037] The gate driver 120 supplies gate signals to the subpixels SP. The gate driver 120 may include a level shifter and a shift register. The level shifter may shift the level of a clock signal CLK input at the transistor-to-transistor logic (TTL) level from the timing controller 140 and then supply it to the shift register. The shift register may be formed in the non-display area of ​​the display panel 110 using, but is not limited to, a GIP technique. The shift register may include multiple stages for shifting gate signals to output them in response to the clock signal CLK and the drive signal. The multiple stages included in the shift register may sequentially output gate signals through the multiple output terminals.

[0038] The display panel 110 may include a plurality of subpixels SP. The plurality of subpixels SP may emit different colors. The plurality of subpixels SP may include, for example, a first subpixel SP1, a second subpixel SP2, a third subpixel SP3, and a fourth subpixel SP4. The first subpixel SP1, the second subpixel SP2, the third subpixel SP3, and the fourth subpixel SP4 may be, but are not limited to, a red subpixel, a green subpixel, a blue subpixel, and a white subpixel, respectively. Such subpixels SP may form a pixel PX. In particular, a first subpixel SP1, a second subpixel SP2, a third subpixel SP3, and a fourth subpixel SP4 may form a single pixel PX, and the display panel 110 may include a plurality of such pixels PX.

[0039] A driver circuit for driving a single subpixel SP is described in detail below with reference to Fig. 2 described.

[0040] Fig. 2 is a circuit diagram of a subpixel of a display device according to an exemplary embodiment of the present disclosure. Fig. 2 shows a circuit diagram of one of several subpixels SP of the display device 100.

[0041] With reference to Fig. 2, the subpixel SP may include a switching transistor SWT, a detection transistor SET, a drive transistor DT, a storage capacitor SC, and a light emitting element 150.

[0042] The light-emitting element 150 may include an anode, an organic layer, and a cathode. The organic layer may further include a variety of organic layers, such as a hole-injection layer, a hole-transport layer, an organic emission layer, an electron-transport layer, and an electron-injection layer. The anode of the light-emitting element 150 may be connected to the output terminal of the driving transistor DT, and a low-level voltage VSS may be applied to the cathode. Although an organic light-emitting element 150 may be used as the light-emitting element 150 in the embodiment shown in Fig. 2, the present disclosure is not limited thereto. An inorganic light-emitting diode, ie, an LED, may also be used as the light-emitting element 150.

[0043] With reference to Fig. 2, the switching transistor SWT is a transistor for transmitting the data voltage Vdata to a first node N1 corresponding to the gate electrode of the driving transistor DT. The switching transistor SWT may include a drain electrode connected to the data line DL, a gate electrode connected to the gate line GL, and a source electrode connected to the gate electrode of the driving transistor DT. The switching transistor SWT may be turned on by a scan signal SCAN applied from the gate line to transmit the data voltage Vdata supplied from the data line DL to the gate electrode of the driving transistor DT.

[0044] With reference to Fig. 2, the drive transistor DT is a transistor for driving the light-emitting element 150 by supplying a drive current to the light-emitting element 150. The drive transistor DT may include a gate electrode associated with the first node N1, a source electrode associated with the second node N2 and functioning as an output terminal, and a drain electrode associated with the third node N3 and functioning as an input terminal. The gate electrode of the drive transistor DT may be connected to the switching transistor SWT, the drain electrode may receive a high-level voltage VDD through a high-level voltage wiring VDDL, and the source electrode may be connected to the anode of the light-emitting element 150.

[0045] With reference to Fig. 2, the storage capacitor SC is a capacitor for holding a voltage equal to the data voltage Vdata for one frame. One electrode of the storage capacitor SC may be connected to the first node N1, and the other electrode of the storage capacitor SC may be connected to the second node N2.

[0046] Incidentally, as the driving time of each subpixel SP in the display device 100 increases, the circuit elements such as the driving transistor DT may deteriorate. Consequently, the characteristic values ​​of the circuit elements such as the driving transistor DT may change. The characteristic values ​​of the circuit elements may include the threshold voltage Vth of the driving transistor DT, the mobility α of the driving transistor DT, and so on. Such a change in the characteristic values ​​of the circuit elements may cause a change in the luminance of the respective subpixel SP. Therefore, a change in the characteristic values ​​of the circuit elements may be regarded as a change in the luminance of the subpixel SP.

[0047] In addition, the degree of change in the characteristic values ​​of the circuit elements of each of the subpixels SP may vary depending on the degree of deterioration of the circuit elements. Such a difference in the degree of change in the characteristic values ​​between the circuit elements may cause deviations in the luminance between the subpixels SP. Therefore, deviations in the characteristic values ​​of the circuit elements can be regarded as deviations in the luminance of the subpixel SP. A change in the characteristic values ​​of the circuit elements, i.e., a change in the luminance of the subpixel SP, and deviations in the characteristic values ​​between the circuit elements, i.e., deviations in the luminance between the subpixels SP, may reduce the accuracy of the luminance represented by the subpixels SP or may produce defects in the images.

[0048] In view of the above, the subpixel SP of the display device 100 according to an exemplary embodiment of the present disclosure may provide a feature for detecting the characteristic values ​​of the subpixel SP and a feature for compensating the characteristic values ​​of the subpixel SP based on the results of the detection.

[0049] As in Fig. 2, the subpixel SP may further comprise a sensing transistor SET for effectively controlling the voltage status at the source electrode of the driving transistor DT in addition to the switching transistor SWT, driving transistor DT, storage capacitor SC, and light emitting element 150.

[0050] With reference to Fig. 2, the sense transistor SET is connected between the source of the drive transistor DT and a reference voltage line RVL for supplying a reference voltage Vref, and its gate is connected to the gate line GL. Consequently, the sense transistor SET can be turned on by a sense signal SENSE applied through the gate line GL to apply the reference voltage Vref supplied through the reference voltage line RVL to the source of the drive transistor DT. Furthermore, the sense transistor SET can be used as one of voltage sensing paths for the source of the drive transistor DT.

[0051] With reference to Fig. 2, the switching transistor SWT and the detection transistor SET of the subpixel SP can share the single gate line GL. That is, the switching transistor SWT and the detection transistor SET can receive the same gate signal applied from the same gate line GL. Although, for convenience of explanation, the gate signal applied to the gate electrode of the switching transistor SWT is referred to as the scan signal SCAN, while the gate signal applied to the gate electrode of the detection transistor SET is referred to as the sense signal SENSE, it should be understood that the scan signal SCAN and the sense signal SENSE applied to a subpixel SP are the same signal transmitted from the same gate line GL.

[0052] With reference to Fig. 2, the display device 100 may include an analog-to-digital converter (ADC) that generates detection data by voltage detection to determine characteristic values ​​of the drive transistor DT and outputs them; a compensator 160 that determines the characteristic values ​​of the drive transistor DT using the detection data output from the analog-to-digital converter (ADC) and performs a compensation process to compensate the characteristic values ​​of the drive transistor DT; a digital-to-analog converter (DAC) that converts the data voltage Vdata into a digital value and outputs it; and a detector 170 that detects the threshold voltage Vth and the mobility α of the drive transistor DT and detects whether there is a short circuit between the gate electrode and the output terminal, i.e., the source electrode of the drive transistor DT. Although in Fig. 2, the subpixel may further include a memory for storing detection data and a compensation value calculated based on the compensation processing results. The analog-to-digital converter (ADC) and the digital-to-analog converter (DAC) may be included in the data driver 130, but the present disclosure is not limited thereto. Furthermore, the compensator 160 and the detector 170 may be included in the timing control unit 140, but the present disclosure is not limited thereto.

[0053] With reference to Fig. 2, the data driver 130 may include an initialization switch SPRE that controls whether a reference voltage Vref should be applied to a reference voltage line RVL, and a sampling switch SAM that controls whether to connect between the reference voltage line RVL and the analog-to-digital converter ADC. However, it should be understood that the present disclosure is not limited thereto. The initialization switch SPRE and the sampling switch SAM may be arranged externally of the data driver 130.

[0054] The initialization switch SPRE is a switch that controls the application of a voltage to the source electrode of the drive transistor DT in the subpixel SP, so that the source electrode of the drive transistor DT reflects the desired characteristic values ​​of the circuit elements, i.e., the characteristic values ​​of the drive transistor DT. When the initialization switch SPRE is turned on, the initialization switch SPRE can be connected to the reference voltage line RVL to apply the reference voltage Vref to the detection transistor SET. Consequently, the reference voltage Vref can be applied to the source electrode of the drive transistor DT by the turned-on detection transistor SET.

[0055] When the sampling switch SAM is turned on, it connects the reference voltage line RVL to the analog-to-digital converter ADC. To transfer the voltage from the sense transistor SET, which has sensed the source electrode of the drive transistor DT, to the compensator 160, the on-off timing of the sampling switch SAM can be controlled so that it is turned on when the source electrode of the drive transistor DT reflects desired characteristic values ​​of the circuit elements. When the sampling switch SAM is turned on, the analog-to-digital converter ADC can detect the voltage of the connected reference voltage line RVL.

[0056] When the analog-to-digital converter ADC detects the voltage of the reference voltage line RVL when the sense transistor SET is turned on and the resistance component of the drive transistor DT is ignorable, the voltage detected by the analog-to-digital converter ADC may be equal to the voltage at the source electrode of the drive transistor DT. The voltage detected by the analog-to-digital converter ADC may be, for example, a voltage for detecting the threshold voltage Vth of the drive transistor DT and / or the mobility α of the drive transistor DT, but is not limited thereto.

[0057] The compensator 160 can change the image data through the process of compensating the threshold voltage Vth of the driving transistor DT or the mobility α of the driving transistor DT to supply the changed data to the data driver 130. Consequently, the data driver 130 converts the changed data into a data voltage Vdata through the digital-to-analog converter DAC and supplies it to the respective subpixel SP, thereby performing the compensation process.

[0058] Based on the results of detecting the threshold voltage Vth and the mobility of the drive transistor DT, the detector 170 can detect whether there is a short circuit between the gate electrode and the output terminal, i.e., the source electrode of the drive transistor DT. In other words, the detector 170 can detect whether there is a short circuit between the two electrodes of the storage capacitor SC. The detector 170 will be described later with reference to Fig. 4 to 7B are described in more detail.

[0059] With return to Fig. 2, a switch SW may be arranged between the data driver 130 and the data line DL. Specifically, a plurality of switches SW may be arranged between the data driver 130 and the data lines DL, transmitting the data voltage Vdata from the data driver 130 to the subpixels SP to switch the electrical connection between the data driver 130 and the data lines DL. When the switch SW is turned on, the data driver 130 is connected to the data line DL, and when the switch SW is turned off, the data driver 130 is not connected to the data line DL. Consequently, when the switch SW is turned off, no voltage is applied to the drain electrode of the switching transistor SWT, so that the same effect as that obtained when the gate electrode of the driving transistor DT is floating can be achieved.

[0060] Below, an arrangement relationship between a plurality of subpixels SP and a reference voltage line RVL is described with reference to Fig. 3 described.

[0061] Fig. 3 is a circuit diagram of a single pixel PX with four subpixels SP of a display device according to an exemplary embodiment of the present disclosure.

[0062] With reference to Fig. 3, the single pixel PX comprises four subpixels SP. The pixel PX may, for example, comprise a first subpixel SP1, a second subpixel SP2, a third subpixel SP3, and a fourth subpixel SP4, as in Fig. 3. The first subpixel SP1, the second subpixel SP2, the third subpixel SP3, and the fourth subpixel SP4 may be, for example, a red subpixel, a green subpixel, a blue subpixel, and a white subpixel, respectively, but are not limited thereto.

[0063] With reference to Fig. 3, the first subpixel SP1, the second subpixel SP2, the third subpixel SP3, and the fourth subpixel SP4 share a reference voltage line RVL. That is, the detection transistor SET of the first subpixel SP1, the detection transistor SET of the second subpixel SP2, the detection transistor SET of the third subpixel SP3, and the detection transistor SET of the fourth subpixel SP4 may all be connected to the single reference voltage line RVL. In the display device 100 according to the exemplary embodiment of the present disclosure, the number of reference voltage lines RVL is reduced to simplify the design of the display device 100 and increase the aperture ratio.

[0064] Although all of the first subpixel SP1, the second subpixel SP2, the third subpixel SP3 and the fourth subpixel SP4 have the single reference voltage line RVL in the Fig. 3, the present disclosure is not limited thereto. Depending on the design of the display panel 110, two subpixels SP may share a reference voltage line RVL, three subpixels SP may share a reference voltage line RVL, and five or more subpixels SP may share a reference voltage line RVL.

[0065] In the display device 100 according to an exemplary embodiment of the present disclosure, the first subpixel SP1, the second subpixel SP2, the third subpixel SP3, and the fourth subpixel SP4 share the single reference voltage line RVL. That is, the detection transistor SET of the first subpixel SP1, the detection transistor SET of the second subpixel SP2, the detection transistor SET of the third subpixel SP3, and the detection transistor SET of the fourth subpixel SP4 may all be connected to the single reference voltage line RVL. Therefore, if one of the subpixels SP is a defective subpixel in which a short circuit is formed between the gate electrode and the source electrode of the driving transistor DT, an error may occur in the detection of the other subpixels SP that share the reference voltage line RVL.Consequently, it is necessary to accurately detect a defective subpixel with a short circuit between the gate electrode and the source electrode of the driving transistor DT.

[0066] Hereinafter, in the display device 100 and the method of driving the display device according to an exemplary embodiment of the present disclosure, the detector 170 for detecting a defective subpixel in which a short circuit is formed between the gate electrode and the source electrode of the driving transistor DT will be described with reference to Fig. 4 to 7B are described in more detail.

[0067] Fig. 4 is a waveform diagram for explaining a display device and a method of driving the display device according to an exemplary embodiment of the present disclosure. Fig. 5A and Fig. 5B are circuit diagrams illustrating a process for detecting a normal subpixel and a defective subpixel in a display device and a method for driving the display device according to an exemplary embodiment of the present disclosure. Fig. 4 is a waveform diagram for explaining a process for detecting a threshold voltage Vth of a driving transistor DT of a single subpixel SP. In the Fig. 5A and Fig. In the example shown in Figure 5B, the second subpixel SP2 is a defective subpixel with a short circuit between the gate electrode and the source electrode of the drive transistor DT, while the first subpixel SP1, the third subpixel SP3, and the fourth subpixel SP4 are normal subpixels without a short circuit between the gate electrode and the source electrode of the drive transistor DT. Fig. 5A is a circuit diagram for explaining a process of detecting the threshold voltage Vth of the driving transistor DT of the defective second subpixel SP2. Fig. 5B is a circuit diagram for explaining a process of detecting the threshold voltage Vth of the driving transistor DT of the normal first subpixel SP1. Fig. 5A and Fig. 5B are circuit diagrams during a third time period T3.

[0068] With initial reference to Fig. 4, a process for detecting the threshold voltage Vth of the drive transistor is described. The method for detecting the threshold voltage Vth described in Fig. 4 is also called source-follower topology.

[0069] During a first time period T1, the initialization switch SPRE is turned on and the sampling switch SAM is turned off, so that the gate driver 120 applies a high gate voltage, which is an on-signal, to the detection transistor SET and the switching transistor SWT through the gate line GL. Consequently, both the switching transistor SWT and the detection transistor SET are turned on by the scanning signal SCAN and the detection signal SENSE. Consequently, when the initialization switch SPRE is turned on, the reference voltage Vref can be supplied to the reference voltage line RVL and applied to the source electrode of the driving transistor DT through the turned-on detection transistor SET.In addition, the data voltage Vdata from the data driver 130 can be applied to the switching transistor SWT through the data line DL, and the data voltage Vdata can be applied to the gate electrode of the driving transistor DT through the switched-on switching transistor SWT.

[0070] Subsequently, during a second time period T2, the initialization switch SPRE is turned off, leaving the source of the drive transistor DT floating. That is, the application of the reference voltage Vref to the sense transistor SET is turned off by the initialization switch SPRE. Consequently, the voltage at the source of the drive transistor DT rises. The voltage at the source of the drive transistor DT is increased for a certain period of time, and the increase rate is gradually reduced until the voltage is saturated. The saturated voltage at the source of the drive transistor DT may be equal to the difference between the data voltage Vdata and the threshold voltage Vth.

[0071] When the voltage at the source of the drive transistor DT is saturated, the sampling switch SAM is turned on during the third time period T3. When the sampling switch SAM is turned on, the detection transistor SET is connected to the analog-to-digital converter ADC through the reference voltage line RVL. Consequently, the saturated voltage at the source of the drive transistor DT is supplied to the compensator 160 and the detector 170 through the sampling switch SAM and the analog-to-digital converter ADC. Consequently, the compensator 160 detects the saturated voltage at the source of the drive transistor DT. The voltage detected by the compensator 160 may be equal to a voltage obtained by subtracting the threshold voltage Vth from the data voltage Vdata (Vdata-Vth).

[0072] With reference to Fig. 5A, in order to detect the threshold voltage Vth of the second subpixel SP2, the data voltage Vdata is applied to the second subpixel SP2 through the data line DL, while the data voltage Vdata cannot be applied to the first subpixel SP1, the third subpixel SP3, and the fourth subpixel SP4, but 0 V can be applied to them. Consequently, the driving transistors DT of the first subpixel SP1, the third subpixel SP3, and the fourth subpixel SP4 are all turned off, and no signal is transmitted to the reference voltage line RVL from the first subpixel SP1, the third subpixel SP3, and the fourth subpixel SP4. On the other hand, since a short circuit is formed between the gate electrode and the source electrode of the driving transistor DT, that is, the two electrodes of the storage capacitor SC in the second subpixel SP2 are connected to each other, the data voltage Vdata is transmitted to the reference voltage line RVL as such during the third period T3.Consequently, it can be detected that the second subpixel SP2 is a defective subpixel or a normal subpixel.

[0073] With reference to Fig. 5B, next, in order to detect the threshold voltage Vth of the first subpixel SP1, the data voltage Vdata is applied to the first subpixel SP1 through the data line DL, while the data voltage Vdata cannot be applied to the second subpixel SP2, the third subpixel SP3, and the fourth subpixel SP4, but 0 V can be applied to them. Consequently, the driving transistors DT of the third subpixel SP3 and the fourth subpixel SP4 are all turned off, and no signal is transmitted to the reference voltage line RVL from the third subpixel SP3 and the fourth subpixel SP4. Incidentally, since the data voltage Vdata is not applied, but 0 V is applied to the driving transistor DT of the second subpixel SP2, the driving transistor DT should be turned off.However, since a short circuit is formed between the gate electrode and the source electrode of the driving transistor DT of the second subpixel SP2, that is, a short circuit is formed between the two electrodes of the storage capacitor SC, a voltage close to 0 V, that is, an underflow voltage, may be transmitted to the reference voltage line RVL as such during the third period T3. Consequently, the first subpixel SP1, which is a normal subpixel, may be detected as a defective subpixel due to the defective second subpixel SP2. When the threshold voltage Vth of each of the third subpixel SP3 and the fourth subpixel SP4, which are normal subpixels, is detected, they may also be detected as defective subpixels due to the second subpixel SP2, which is a defective subpixel.

[0074] To recap, during the process of detecting the threshold voltage Vth of the driving transistors DT, a defective subpixel with a short circuit between the gate electrode and the source electrode of the driving transistor DT can be detected as a normal subpixel, whereas a normal subpixel with no short circuit between the gate electrode and the source electrode of the driving transistor DT can be detected as a defective subpixel.

[0075] The detector 170 may determine the threshold voltage Vth of the driving transistor DT based on the information described above with reference to Fig. 4 described source-follower topology and can store the acquisition results in it or in a memory.

[0076] The compensator 160 identifies the threshold voltage Vth or a change in the threshold voltage Vth of the driving transistor DT in the subpixel SP based on the supplied detection signal SENSE and can perform the process of compensating the threshold voltage Vth. Consequently, the compensated data voltage Vdata can be output to the data line DL through the digital-to-analog converter DAC.

[0077] Fig. 6 is a waveform diagram for explaining a display device and a method of driving the display device according to an exemplary embodiment of the present disclosure. Fig. 7A and Fig. 7B are circuit diagrams illustrating a process for detecting a normal subpixel and a defective subpixel in a display device and a method for driving the display device according to an exemplary embodiment of the present disclosure. Fig. 6 is a waveform diagram for explaining a process of detecting the mobility α of a driving transistor DT of a subpixel SP. In the Fig. 7A and Fig. In the example shown in Figure 7B, the second subpixel SP2 is a defective subpixel with a short circuit between the gate electrode and the source electrode of the drive transistor DT, while the first subpixel SP1, the third subpixel SP3, and the fourth subpixel SP4 are normal subpixels without a short circuit between the gate electrode and the source electrode of the drive transistor DT. Fig. 7A is a circuit diagram for explaining a process of detecting the mobility α of the driving transistor DT of the second subpixel SP2, which is a defective subpixel. Fig. 7B is a circuit diagram for explaining a process of detecting the mobility α of the driving transistor DT of the first subpixel SP1, which is a normal subpixel. Fig. 7A and Fig. 7B are circuit diagrams during a fourth time period T4.

[0078] With initial reference to Fig. 6 describes a process for detecting the mobility α of the drive transistor DT.

[0079] During a first time period T1, the initialization switch SPRE is turned on and the sampling switch SAM is turned off, so that the gate driver 120 applies a high gate voltage, which is an on-signal, to the detection transistor SET and the switching transistor SWT through the gate line GL. Consequently, both the switching transistor SWT and the detection transistor SET are turned on by the scanning signal SCAN and the detection signal SENSE. Consequently, when the initialization switch SPRE is turned on, the reference voltage Vref can be supplied to the reference voltage line RVL and applied to the source electrode of the driving transistor DT through the turned-on detection transistor SET.In addition, the data voltage Vdata from the data driver 130 can be applied to the switching transistor SWT through the data line DL, and the data voltage Vdata can be applied to the gate electrode of the driving transistor DT through the switched-on switching transistor SWT.

[0080] Subsequently, a switch SW is turned off for a second time period T2. Consequently, the electrical connection between the data driver 130 and the data line DL is removed. When the switch SW is turned off, the drain electrode of the switching transistor SWT is floating, and thus the same effect as that obtained when the switching transistor SWT is turned off is achieved. In particular, even if the scanning signal SCAN is also supplied to the gate electrode of the switching transistor SWT, which shares the same gate line GL, as a high gate voltage due to the supplied gate signal to turn on the detection transistor SET, the same effect as that obtained when the gate electrode of the driving transistor DT is floating can be achieved by turning off the switch SW. As shown in Fig. 6, although the scanning signal SCAN applied to the switching transistor SWT is actually the high gate voltage during the second time period T2, the third time period T3 and the fourth time period T4, consequently, by turning off the switch SW, the scanning signal SCAN applied to the switching transistor SWT is converted into a signal SCAN' which is in Fig. 6, and hence it can be regarded as a low gate voltage during the second time period T2, the third time period T3 and the fourth time period T4.

[0081] During a third time period T3, the initialization switch SPRE is subsequently turned off, so that the source electrode of the drive transistor DT is floating. That is, the application of the reference voltage Vref to the sense transistor SET is turned off by the initialization switch SPRE. Consequently, the voltage at the source electrode of the drive transistor DT increases. The rate of increase of the voltage at the source electrode of the drive transistor DT is related to the current capability of the drive transistor DT, i.e., the mobility α. Therefore, the greater the mobility α of the drive transistor DT, the steeper the voltage at the source electrode of the drive transistor DT increases. The rate of increase of the voltage at the source electrode of the drive transistor DT can be defined as the amount of voltage change over time.

[0082] When a certain period of time elapses since the source electrode of the drive transistor DT is floating, the sampling switch SAM is turned on during the fourth period T4. When the sampling switch SAM is turned on, the detection transistor SET is connected to the analog-to-digital converter ADC through the reference voltage line RVL. Consequently, the boosted voltage at the source electrode of the drive transistor DT is supplied to the compensator 160 and the detector 170 through the sampling switch SAM and the analog-to-digital converter ADC during the fourth period T4. Consequently, the compensator 160 detects the voltage at the source electrode of the drive transistor DT.

[0083] With reference to Fig. 7A, when the mobility α of the second subpixel SP2 is detected when the switch SW is turned off, the switching transistors SWT of the first subpixel SP1, the second subpixel SP2, the third subpixel SP3, and the fourth subpixel SP4 are all turned off. Since the switching transistor SWT is turned off at this time, it can be detected that the second subpixel SP2 is a defective subpixel having a short circuit between the gate electrode and the source electrode of the driving transistor DT.

[0084] With reference to Fig. 7B, subsequently, when the mobility α of the first subpixel SP1 is detected when the switch SW is turned off, the switching transistors SWT of the first subpixel SP1, the second subpixel SP2, the third subpixel SP3, and the fourth subpixel SP4 are all turned off. Since the switching transistor SWT is turned off at this time, it can be detected that the first subpixel SP1 is a normal subpixel that does not have a short circuit between the gate electrode and the source electrode of the driving transistor DT.

[0085] To recap, during the process of detecting the mobility α of the driving transistor DT, a defective subpixel with a short circuit between the gate electrode and the source electrode of the driving transistor DT can be detected as a defective subpixel, whereas a normal subpixel without a short circuit between the gate electrode and the source electrode of the driving transistor DT can be detected as a normal subpixel.

[0086] As described above, the detector 170 can detect the mobility α of the drive transistor DT and can store the detection results therein or in a memory.

[0087] The detector 170 may detect the threshold voltage Vth and the mobility α of the drive transistor DT of each of the plurality of subpixels SP that share the single reference voltage line RVL, thereby detecting whether a short circuit exists between the gate electrode and the output terminal of the drive transistor DT. For example, the detector 170 may detect the threshold voltage Vth of the drive transistor DT of each of the plurality of subpixels SP and may detect the mobility α of the drive transistor DT by compensating for the threshold voltage Vth, thereby detecting a subpixel SP in which a short circuit is formed between the gate electrode and the output terminal of the drive transistor DT.

[0088] For example, when the first subpixel SP1 and the second subpixel SP2 share a reference voltage line RVL, if it is detected that the first subpixel SP1 is a defective subpixel and the second subpixel SP2 is a normal subpixel as a result of detecting the threshold voltage Vth of the driving transistor DT, and that the first subpixel SP1 is a normal subpixel and the second subpixel SP2 is a defective subpixel as a result of detecting the mobility α of the driving transistor DT, it can be determined that there is a short circuit between the gate electrode and the output terminal of the driving transistor DT of the second subpixel SP2.

[0089] For example, when the first subpixel SP1, the second subpixel SP2, the third subpixel SP3, and the fourth subpixel SP4 share a reference voltage line RVL, if it is detected that the first subpixel SP1, the third subpixel SP3, and the fourth subpixel SP4 are defective subpixels and the second subpixel SP2 is a normal subpixel as a result of detecting the threshold voltage Vth of the driving transistor DT, and that the first subpixel SP1, the third subpixel SP3, and the fourth subpixel SP4 are normal subpixels and the second subpixel SP2 is a defective subpixel as a result of detecting the mobility α of the driving transistor DT, it can be determined that there is a short circuit between the gate electrode and the output terminal of the driving transistor DT of the second subpixel SP2.

[0090] As described above, when a defective subpixel is detected by the detector 170, the compensator 160 may perform compensation by applying a compensation value of a normal subpixel to a defective subpixel to normalize it, or may perform compensation by applying the data voltage Vdata of the defective subpixel to the same value as the reference voltage Vref to remove the voltage change of the source electrode of the driving transistor DT of the defective subpixel during charging of the normal subpixel. However, it should be understood that the present disclosure is not limited to this. The compensator 160 may compensate the defective subpixel in a variety of compensation methods.

[0091] According to the display device 100 and the method for driving the display device 100 according to the exemplary embodiment of the present disclosure, it is possible to detect the mobility α of the drive transistor DT in such a manner that the gate electrode of the drive transistor DT is floating, even when the switch transistor SWT and the sense transistor SET share a gate line GL. To detect the mobility α of the drive transistor DT, the sense transistor SET must be turned on and the gate electrode of the drive transistor DT must be floating.However, when the switching transistor SWT and the sensing transistor SET share a gate line GL for driving DRD (Double Rate Drive) or achieving the duty cycle, a high gate voltage is transmitted through the gate line GL to turn on the sensing transistor SET, and the same high gate voltage is applied to the switching transistor SWT. Consequently, when the switching transistor SWT is turned on, the gate electrode of the driving transistor DT cannot be floating due to the data voltage Vdata transmitted through the data line DL. In this regard, in the display device 100 and the method of driving the display device 100 according to an exemplary embodiment of the present disclosure, a plurality of switches SW are arranged to remove the electrical connection between the data driver 130 and the plurality of data lines DL.Consequently, even when the high gate voltage is applied to the switching transistor SWT through the gate line GL, the same effect as that obtained when the gate electrode of the driving transistor DT is floating can be achieved by turning off the switch SW. Therefore, according to the display device 100 and the method of driving the display device 100 according to the exemplary embodiment of the present disclosure, it is possible to detect the mobility α of the driving transistor DT in such a manner that the gate electrode of the driving transistor DT is floating, even when the switching transistor SWT and the detecting transistor SET share a gate line GL.

[0092] Furthermore, according to the display device 100 and the method for driving the display device 100 according to the exemplary embodiment of the present disclosure, it is possible to detect whether there is a short circuit between the gate electrode and the output terminal of the drive transistor DT based on the results of detecting the threshold voltage Vth and the mobility α of the drive transistor DT, even when the switch transistor SWT and the detect transistor SET share a gate line GL and a plurality of subpixels SP share the single reference voltage line RVL.For example, if the second subpixel SP2 is a defective subpixel with a short circuit between the gate electrode and the source electrode of the driving transistor DT, while the first subpixel SP1, the third subpixel SP3, and the fourth subpixel SP4 are normal subpixels without a short circuit between the gate electrode and the source electrode of the driving transistor DT, since the first subpixel SP1, the second subpixel SP2, the third subpixel SP3, and the fourth subpixel SP4 share the reference voltage line RVL, as described with reference to FIG. Fig. 4 to 5B, the second subpixel SP2 can be determined as a normal subpixel, while as a result of detecting the threshold voltage Vth of the driving transistor DT, the first subpixel SP1, the third subpixel SP3, and the fourth subpixel SP4 can be determined as defective subpixels.

[0093] However, in the display device 100 and the method for driving the display device 100 according to the exemplary embodiment of the present disclosure, it is possible to accurately detect a defective subpixel having a short circuit between the gate electrode and the output terminal of the driving transistor DT based on the results of detecting the threshold voltage Vth and the mobility α of the driving transistor DT, as described above. In particular, as described above with reference to Fig. 6 to 7B, when only the second subpixel SP2 is a defective subpixel, the first subpixel SP1, the third subpixel SP3, and the fourth subpixel SP4 can be detected as normal subpixels, while the second subpixel SP2 can be detected as a defective subpixel as a result of detecting the mobility α of the driving transistor DT.Therefore, when a specific subpixel SP is detected as a normal subpixel while the other subpixels SP that share the reference voltage line RVL with the specific subpixel SP are detected as defective subpixels as a result of detecting the threshold voltage Vth of the driving transistor DT, and the specific subpixel SP is detected as a defective subpixel while the other subpixels SP that share the reference voltage line RVL with the specific subpixel SP are detected as normal subpixels as a result of detecting the mobility (α) of the driving transistor DT, it can be determined that the specific subpixel SP is a defective subpixel while the other subpixels SP are normal subpixels.In this way, in the display device 100 and the method of driving the display device 100 according to the exemplary embodiment of the present disclosure, it is possible to accurately detect a defective subpixel having a short circuit between the gate electrode and the output terminal of the driving transistor DT based on the results of detecting the threshold voltage Vth and the mobility α of the driving transistor DT for a plurality of subpixels SP.

[0094] Fig. 8 is a diagram illustrating timings for detecting a normal subpixel and a defective subpixel in a display device and a method for driving the display device according to an exemplary embodiment of the present disclosure.

[0095] Typically, the timing for detecting a normal subpixel and a defective subpixel can be divided into timings before and after the display device 100 is released. Before the display device 100 is released, it is detected whether a defective subpixel exists, and the compensation value for it is reflected in advance to complete the compensation for the defective subpixel at the time of release of the display device 100.

[0096] However, a defective subpixel may be generated later after the display device 100 is released. In this regard, according to the display device 100 and the method for driving the display device 100 according to an exemplary embodiment of the present disclosure, it is possible to detect a defective subpixel even after the display device 100 is released. Specifically, the detector 170 can detect a defective subpixel in an ON-RF mode performed in a power-on sequence, in an RT mode performed in vertical gaps VB between active periods AT during the display drive period, and in an OFF-RS mode performed in a power-off sequence.

[0097] In the ON-RF mode, when a power-on signal is generated in the display device 100 and consequently the display device 100 is turned on, the detector 170 can detect the threshold voltage Vth and the mobility α of the driving transistor DT in each of the subpixels SP and can detect a defective subpixel having a short circuit between the gate electrode and the source electrode of the driving transistor DT based on the detection results.

[0098] In RT mode, during the display drive period when images are displayed, the detector 170 can detect the threshold voltage Vth and the mobility α of the drive transistor DT in each of the subpixels SP, and can detect a defective subpixel with a short circuit between the gate electrode and the source electrode of the drive transistor DT based on the detection results. Specifically, in each frame during the vertical gaps, the detector 170 can detect the threshold voltage Vth and the mobility α of the drive transistor DT in each of the subpixels SP, and can detect a defective subpixel with a short circuit between the gate electrode and the source electrode of the drive transistor DT based on the detection results.

[0099] In the OFF-RS mode, when a turn-off signal is generated in the display device 100 and consequently the display device 100 is turned off, the detector 170 can detect the threshold voltage Vth and the mobility α of the driving transistor DT in each of the subpixels SP and can detect a defective subpixel having a short circuit between the gate electrode and the source electrode of the driving transistor DT based on the detection results.

[0100] As described above, in the display device 100 and the method of driving the display device 100 according to the exemplary embodiment of the present disclosure, the detector 170 can detect a defective subpixel in any of the ON-RF mode, the RT mode, and the OFF-RS mode. However, since the saturation time of the voltage at the source electrode of the drive transistor DT is required, it may take a long time during the process of detecting the threshold voltage Vth of the drive transistor DT. In this regard, in the display device 100 and the method of driving the display device 100 according to the exemplary embodiment of the present disclosure, the detector 170 can preferably detect a defective subpixel in the OFF-RS mode in which the display drive is not performed.

[0101] The exemplary embodiments of the present disclosure may also be described as follows:

[0102] According to one aspect of the present disclosure, a display device includes a display panel having a plurality of subpixels sharing a single reference voltage line, each of the subpixels including a switching transistor, a driving transistor, a sensing transistor, a storage capacitor, and a light-emitting element; a data driver configured to supply a data voltage to the plurality of subpixels; a gate driver configured to supply a gate signal to the plurality of subpixels; a timing controller configured to control the data driver and the gate driver; and a detector configured to sense a threshold voltage and a mobility of the driving transistor to detect whether a short circuit exists between a gate electrode and an output terminal of the driving transistor.

[0103] The timing control unit may include the detector.

[0104] A gate electrode of the sense transistor and a gate electrode of the switch transistor may be connected to the same gate line.

[0105] The detector may be configured to detect the threshold voltage of the drive transistor, detect the mobility of the drive transistor after its threshold voltage has been compensated, and detect whether a short circuit exists between the gate electrode and the output terminal of the drive transistor.

[0106] The detector can detect the threshold voltage of the drive transistor based on a source follower topology.

[0107] The display device may further comprise a plurality of data lines for transmitting the data voltage from the data driver to the plurality of subpixels; and a plurality of switches for switching electrical connections between the data driver and the plurality of data lines.

[0108] The display device may further comprise an initialization switch connected to the reference voltage line for applying a reference voltage to the sense transistor; and a sampling switch configured to transfer a voltage from the sense transistor to the detector, wherein the detector may detect the mobility of the drive transistor from a first time period to a fourth time period, wherein during the first time period, the gate driver may apply a turn-on signal to the sense transistor and the switching transistor, the data driver may apply the data voltage to the switching transistor, and the reference voltage may be applied to the sense transistor through the initialization switch, wherein during the second time period, the plurality of switches may be turned off to remove the electrical connection between the data driver and the plurality of data lines,wherein the application of the reference voltage to the detection transistor can be switched off by the initialization switch during the third time period, and wherein during the fourth time period a voltage at the output terminal of the drive transistor can be transmitted to the detector by the sampling switch.

[0109] The plurality of subpixels may include a first subpixel and a second subpixel, and wherein the detector may be configured to determine that a short circuit exists between a gate electrode and an output terminal of the drive transistor of the second subpixel when it is detected that the first subpixel is a defective subpixel while the second subpixel is a normal subpixel as a result of detecting the threshold voltage of the drive transistor, and that the first subpixel may be a normal subpixel while the second subpixel is a defective subpixel as a result of detecting the mobility of the drive transistor.

[0110] The detector may be configured to detect whether a short circuit exists between the gate electrode and the output terminal of the drive transistor after a turn-off signal of the display device is generated.

[0111] According to another aspect of the present disclosure, a method for driving a display device includes the steps of detecting a threshold voltage of a driving transistor of each of a plurality of subpixels sharing a single reference voltage line; compensating the threshold voltage of the driving transistor based on results of detecting the threshold voltage of the driving transistor; detecting the mobility of the driving transistor; and determining whether a short circuit exists between a gate electrode and an output terminal of the driving transistor based on results of detecting the threshold voltage and the mobility of the driving transistor.

[0112] The step of detecting the threshold voltage of the drive transistor and the step of detecting the mobility of the drive transistor may comprise applying a same gate signal to the switch transistor and the sense transistor of each of the plurality of subpixels.

[0113] The step of detecting the threshold voltage of the drive transistor and the step of compensating the threshold voltage of the drive transistor may be performed before the step of detecting the mobility of the drive transistor.

[0114] The step of determining whether a short circuit exists between the gate electrode and the output terminal of the drive transistor may include applying a turn-on signal to a sense transistor and a switching transistor of each of the plurality of subpixels, a data voltage to the switching transistor, and a reference voltage to the sense transistor; turning off the application of the data voltage to the switching transistor, turning off the application of the reference voltage to the sense transistor; and sensing a voltage at the output terminal of the drive transistor by the sense transistor.

[0115] The plurality of subpixels may comprise a first subpixel, a second subpixel, a third subpixel, and a fourth subpixel, and wherein the step of determining whether a short circuit exists between the gate electrode and the output terminal of the driving transistor comprises determining that a short circuit exists between a gate electrode and an output terminal of the driving transistor of the second subpixel when it is detected that the first subpixel, the third subpixel, and the fourth subpixel are defective subpixels while the second subpixel is a normal subpixel as a result of detecting the threshold voltage of the driving transistor, and that the first subpixel, the third subpixel, and the fourth subpixel are normal subpixels while the second subpixel is a defective subpixel as a result of detecting the mobility of the driving transistor.

[0116] Although the exemplary embodiments of the present disclosure have been described in detail with reference to the accompanying drawings, the present disclosure is not limited thereto and may be embodied in many different forms without departing from the technical concept of the present disclosure. Therefore, the exemplary embodiments of the present disclosure are provided for illustrative purposes only, but are not intended to limit the technical concept of the present disclosure. The scope of the technical concept of the present disclosure is not limited thereto. Therefore, it should be understood that the exemplary embodiments described above are illustrative in all aspects and do not limit the present disclosure.The scope of the present disclosure should be construed based on the following claims, and all technical concepts within the equivalent scope thereof should be construed as falling within the scope of the present disclosure.

Claims

[1] Display device comprising: a display panel (110) having a plurality of subpixels (SP) sharing a single reference voltage line (RVL), each of the subpixels (SP) comprising a switching transistor (SWT), a drive transistor (DT), a sense transistor (SET), a storage capacitor (SC), and a light emitting element (150); a data driver (130) configured to supply a data voltage (Vdata) to the plurality of subpixels (SP); a gate driver (120) configured to supply a gate signal (SCAN) to the plurality of subpixels (SP); a timing control unit (140) configured to control the data driver (120) and the gate driver (130); a detector (170) configured to detect a threshold voltage (V TH) and a mobility (α) of the drive transistor (DT) to detect whether there is a short circuit between a gate electrode and an output terminal of the drive transistor (DT); a plurality of data lines (DL) for transmitting the data voltage (Vdata) from the data driver (130) to the plurality of subpixels (SP); a plurality of switches (SW) for switching electrical connections between the data driver (130) and the plurality of data lines (DL); an initialization switch (SPRE) connected to the reference voltage line (RVL) for applying a reference voltage (Vref) to the detection transistor (SET); and a sampling switch (SAM) configured to transmit a voltage from the detection transistor (SET) to the detector (170), wherein the detector (170) is configured to detect the mobility (α) of the drive transistor (DT) from a first time period (T1) to a fourth time period (T4), wherein the gate driver (120) is configured to apply a switch-on signal to the detection transistor (SET) and the switching transistor (SWT), the data driver (130) is configured to apply the data voltage (Vdata) to the switching transistor (SWT), and wherein during the first time period the reference voltage (Vref) is applied to the detection transistor (SET) by the initialization switch (SPRE), wherein during the second time period (T2) the plurality of switches (SW) are turned off to remove the electrical connection between the data driver (130) and the plurality of data lines (DL), wherein during the third time period (T3) the application of the reference voltage (Vref) to the detection transistor (SET) is switched off by the initialization switch (SPRE), and wherein during the fourth time period (T4) a voltage at the output terminal of the drive transistor (DT) is transmitted through the sampling switch (SAM) to the detector (170). [2] The display device according to claim 1, wherein the timing control unit (140) comprises the detector (170). [3] A display device according to claim 1 or 2, wherein a gate electrode of the detection transistor (SET) and a gate electrode of the switching transistor (SWT) are connected to the same gate line (GL). [4] The display device according to claim 1, 2 or 3, wherein the detector (170) is configured to detect the threshold voltage (V TH ) of the drive transistor (DT), to detect the mobility (α) of the drive transistor (DT) after its threshold voltage (V TH) has been compensated, and to detect whether there is a short circuit between the gate electrode and the output terminal of the drive transistor (DT), and / or wherein the detector (170) is configured to detect the threshold voltage (V TH ) of the drive transistor (DT) based on a source follower topology. [5] Display device according to one of the preceding claims, wherein the plurality of subpixels (SP) comprise a first subpixel (SP1) and a second subpixel (SP2), and wherein the detector (170) is configured to determine that a short circuit exists between a gate electrode and an output terminal of the drive transistor (DT) of the second subpixel (SP2) when it is detected that, as a result of detecting the threshold voltage (V TH) of the drive transistor (DT), the first subpixel (SP1) is a defective subpixel while the second subpixel (SP2) is a normal subpixel, and that as a result of the detection of the mobility (α) of the drive transistor (DT), the first subpixel (SP1) is a normal subpixel while the second subpixel (SP2) is a defective subpixel. [6] A display device according to any one of the preceding claims, wherein the detector (170) is configured to detect whether a short circuit exists between the gate electrode and the output terminal of the drive transistor (DT) after a turn-off signal of the display device has been generated. [7] A method for controlling a display device, the method comprising the following steps: Detecting a threshold voltage (V TH ) a drive transistor (DT) of each of a plurality of subpixels (SP) sharing a single reference voltage line (RVL); Compensating the threshold voltage (V TH ) of the drive transistor (DT) based on results of the detection of the threshold voltage (V TH ) of the control transistor (DT); Detecting the mobility (α) of the drive transistor (DT); and Determine based on results of detection of threshold voltage (V TH ) and the mobility (α) of the drive transistor (DT), whether there is a short circuit between a gate electrode and an output terminal of the drive transistor (DT), wherein the step of detecting the threshold voltage (V TH ) of the drive transistor (DT) and the step of detecting the mobility (α) of the drive transistor (DT) comprises applying a same gate signal (SCAN, SENSE) to a switching transistor (SWT) and a detecting transistor (SET) of each of the plurality of subpixels (SP), wherein the step of detecting the mobility (α) of the drive transistor (DT) comprises: Applying a turn-on signal to a detection transistor (SET) and a switching transistor (SWT) of each of the plurality of subpixels (SP), a data voltage (Vdata) to the switching transistor (SWT), and a reference voltage (Vref) to the detection transistor (SET); Turning off the application of the data voltage (Vdata) to the switching transistor (SWT) of each of the plurality of subpixels (SP); Turning off the application of the reference voltage (Vref) to the detection transistor (SET); and Detecting a voltage at the output terminal of the drive transistor (DT) by the sense transistor (SET). [8] The method of claim 7, wherein the step of detecting the threshold voltage (V TH ) of the drive transistor (DT) and the step of compensating the threshold voltage (V TH) of the drive transistor (DT) before the step of detecting the mobility (α) of the drive transistor (DT). [9] The method according to claim 7 or 8, wherein the plurality of subpixels (SP) comprise a first subpixel (SP1), a second subpixel (SP2), a third subpixel (SP3) and a fourth subpixel (SP4) and wherein the step of determining whether there is a short circuit between the gate electrode and the output terminal of the drive transistor (DT) comprises: Determining that there is a short circuit between a gate electrode and an output terminal of the drive transistor (DT) of a second subpixel (SP2) when it is detected that, as a result of detecting the threshold voltage (V TH) of the drive transistor (DT), the first subpixel (SP1), the third subpixel (SP3) and the fourth subpixel (SP4) are defective subpixels, while the second subpixel (SP2) is a normal subpixel, and that as a result of detecting the mobility (α) of the drive transistor (DT), the first subpixel (SP1), the third subpixel (SP3) and the fourth subpixel (SP4) are normal subpixels, while the second subpixel (SP2) is a defective subpixel.

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